Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's.
Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode.
Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only)
Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
XGA: Fix crash when (S)VGA cards not selected as the primary display (e.g.: EGA, CGA. etc).
Better handling of the VGA on/off passthrough (vga_on variable).
MCA side: to avoid lfb issues, bit 0 of POS4 will be always enabled regardless of the ram size (most software uses the >16MB memory method).
Better handling of the BIOS ROM mapping and Memory Mapped I/O during the MCA PS/2 POST and resets, fixes 40 25 hang (once and for all).
Re-organized the ROM loading in ISA mode.
Improved the banking of the ATI 28800-5 cards (VGA Charger and VGA Wonder XL).
Improved the skew and horizontal display of some of the ET4000W32P cards as well as the cursor.
Made the Oak OTI 077 and PVGA WD90c30 cards use the Sierra 11487 (actually a clone is used in the real cards).
For the WD90c30, changed the way the hack is involved.
Reverted some changes of the S3 Vision/Trio that originally made glitches, now the glitches are gone and the accelerator renders fine.
Re-organized the Sierra 1148x RAMDAC's and added the 11486 (Mark 1).
MCA SVGA cards use the full 32-bit mapping.
Fixed ET4000/W32 (without letters) hardware cursor.
Fixed non-interlaced 1280x1024x8bpp Cirrus mode in the 5434.
Added a note regarding the Radius (HT209) 8bpp render.
Reworked the TGUI9440, but still WIP.
Various performance improvements;
Fixed USB UHCI HCHalt;
Cirrus Logic CL-GD 5422/24 fixes and removed them from the Dev branch;
The Storage controllers sections of Settings now has its own corresponding section of the configuration file;
Fixed the AT clock divisors for some Pentium OverDrive CPU's;
Added the ACPI RTC status (no ACPI RTC alarm event yet).
