OBattler
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22d84443a8
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DRAM row implementation, part 1.
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2023-07-12 00:15:43 +02:00 |
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Jasmine Iwanek
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1116aadb6f
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Another round of sonarlint work
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2023-07-04 10:53:44 -04:00 |
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Jasmine Iwanek
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ce451a2bf4
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More fixes for sonarcloud findings
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2023-05-28 21:02:17 -04:00 |
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Jasmine Iwanek
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aa2c07bed2
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Random header cleanups I noticed while porting things
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2022-11-05 22:12:35 -04:00 |
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Jasmine Iwanek
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4685da3fca
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clang-format in src/mem/
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2022-09-18 17:22:55 -04:00 |
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Jasmine Iwanek
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6233027c9e
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Named initializers in machine table
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2022-07-19 18:51:18 -04:00 |
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Alexander Babikov
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911821434e
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Fix variable initializtion warnings
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2022-04-14 07:13:49 +05:00 |
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Jasmine Iwanek
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438e05d100
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src/mem
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2022-03-13 09:47:11 -04:00 |
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Jasmine Iwanek
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4674756664
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More newline and whitespace cleanups
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2022-02-20 16:26:40 -05:00 |
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OBattler
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6c34c331c0
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And another fix.
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2022-02-06 01:16:08 +01:00 |
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OBattler
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bb3422764a
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Fixed compile-breaking mistakes in mem/spd.c.
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2022-02-06 00:44:25 +01:00 |
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OBattler
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bd0287d16f
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Fixed DRAM row boundaries on Intel 430LX and 430NX.
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2022-02-06 00:32:23 +01:00 |
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Jess Lovelace
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f18615ae87
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refactored device_t and all declarations
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2022-02-02 16:31:22 -05:00 |
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OBattler
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6661ff5dcc
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Abstracted away the machine bus'es and flags in order to make the rest of the emulator agnostic as to how they're stored.
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2021-12-13 01:23:06 +01:00 |
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OBattler
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a394a33500
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Conflict resolution.
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2021-10-19 18:18:15 +02:00 |
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RichardG867
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2416fec4a2
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Add 3 GB RAM support to SPD and win_settings
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2021-10-16 19:50:32 -03:00 |
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OBattler
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dbddb3e309
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Finished the ALADDiN-PRO II, implemented the Contaq/Cypress 82C596(A) and 82C597 chipsets, added the ASUS P5A, Gigabyte GA-5AX, PC CHIPS M729, and Green-B, removed the "Virtual PC 2007" device as it turns out it was actually SMBus all along, did some fixes to the ALi SMBUS, fixed start LM75 SMBus address and enabled it by default, and added a ASUS P5A-specific version of the Winbond W83781D hardware monitor.
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2021-07-12 05:56:06 +02:00 |
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OBattler
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9d62da4548
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And SPD.
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2021-07-04 18:24:23 +02:00 |
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OBattler
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4f6df76f10
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Revert "Revert "Merge branch 'feature/machine_and_kb' into master""
This reverts commit f2cd3756dd.
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2021-07-04 17:40:39 +02:00 |
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Daniel Gurney
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f2cd3756dd
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Revert "Merge branch 'feature/machine_and_kb' into master"
This reverts commit 6604a29d7e, reversing
changes made to 1d7fca0abd.
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2021-07-04 18:22:52 +03:00 |
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OBattler
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fd4817a87b
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All the current WIP work (warning: the PIT is currently using some temporary test rewrite that is going to be undone).
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2021-06-29 19:11:19 +02:00 |
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RichardG867
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8f92c6d6cc
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Clean up SPD type handling with unions
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2021-04-17 16:27:38 -03:00 |
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David Hrdlička
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9511b75b49
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Unify RAM size units in the machine table
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2020-12-04 07:01:16 +01:00 |
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RichardG867
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3fb42999b2
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Move SPD log() function to i2c_eeprom
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2020-11-30 20:16:04 -03:00 |
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RichardG867
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d6b1d2c63a
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I2C overhaul part 5: late, but there's still stuff to do
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2020-11-23 14:49:49 -03:00 |
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RichardG867
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739fdc46cc
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I2C overhaul part 2
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2020-11-20 19:23:14 -03:00 |
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RichardG867
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886dbe09ea
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DDC/I2C/SMBus overhaul (incomplete, commit for the night)
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2020-11-20 01:22:04 -03:00 |
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RichardG867
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01b6662809
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Add unified BCD macros for SPD and (in the future) VPCEXT
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2020-07-25 13:19:24 -03:00 |
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RichardG867
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9cecbfa33a
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Remove extraneous logging lines
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2020-06-26 22:16:56 -03:00 |
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RichardG867
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7775e52c0e
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Disable SPD logging
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2020-06-26 22:15:36 -03:00 |
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RichardG867
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012f01cc9f
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Fix Apollo DRB wraparound
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2020-06-26 22:15:21 -03:00 |
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RichardG867
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aea5461255
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Implement DRB locking for VIA Apollo chipsets
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2020-06-26 22:05:32 -03:00 |
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RichardG867
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2553dbce8f
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Unified DRB locking logic, added DRB locking to VIA VPX, and fixed SPD
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2020-06-26 21:03:46 -03:00 |
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RichardG867
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84e378695a
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Fix SPD presence detection
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2020-06-26 18:24:15 -03:00 |
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RichardG867
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93b909fe59
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Merge branch 'master' of https://github.com/86Box/86Box
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2020-06-26 18:05:57 -03:00 |
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RichardG867
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5115214d01
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DRB locking implementation
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2020-06-26 18:05:27 -03:00 |
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David Hrdlička
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23efba22f1
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include: move version defines out to version.h
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2020-06-26 13:28:10 +02:00 |
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OBattler
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ca55e2a12a
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More reorganization and finally merged the two makefiles.
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2020-06-13 12:32:09 +02:00 |
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