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Commit Graph

101 Commits

Author SHA1 Message Date
OBattler
979bd75acb Merge branch 'master' of https://github.com/86Box/86Box 2023-07-06 19:59:54 +02:00
OBattler
78f129c8ac Rewritten the PCI Type 2 access handling. 2023-07-06 19:55:59 +02:00
Jasmine Iwanek
1116aadb6f Another round of sonarlint work 2023-07-04 10:53:44 -04:00
Jasmine Iwanek
6c1e4a8e2c Some code smell fixes from sonarlint 2023-05-15 19:25:56 -04:00
OBattler
19d155cdd7 Keyboard controller file split and assorted clean-ups and fixes 2023-04-19 23:34:32 +02:00
Jasmine Iwanek
1860700eab Fix some small issues 2023-01-07 17:02:23 -05:00
Jasmine Iwanek
3fe4f75108 A bit more clang-format 2022-11-19 11:53:07 -05:00
OBattler
27ebb27db7 Makefile.mingw corrections and made the code pass much stricter checks (now mandated by Makefile.mignw) to ensure GCC 14 readiness. 2022-11-17 22:44:06 +01:00
Jasmine Iwanek
bd75bc141a Header cleanups 
Tabs to spaces
Consistency
 2022-11-13 21:15:47 -05:00
OBattler
de6a6909e5 The last OPTi 822 fixes. 2022-11-02 05:19:28 +01:00
OBattler
8c0facc3b4 PCI changes for OPTi 82c822 (will also be needed for the ALi M1435). 2022-11-02 04:03:55 +01:00
Jasmine Iwanek
e6dbaefeb1 clang-format in src/ 2022-09-18 17:19:21 -04:00
OBattler
f518a496f0 PCI changes. 2022-07-23 01:15:59 +02:00
Jasmine Iwanek
4674756664 More newline and whitespace cleanups 2022-02-20 16:26:40 -05:00
OBattler
4d2ed33ff2 Fixed the emulator. 2021-12-19 23:41:23 +01:00
OBattler
bc90f99350 Finally got rid of the AT and PCI global variables. 2021-12-19 20:00:27 +01:00
OBattler
953244c774 Implemented non-aligned PCI accesses. 2021-11-23 00:30:59 +01:00
OBattler
77d73ed3c2 Finished the Intel 450KX, changes to the memory and SMRAM API's, removed the ASUS P/I-P6RP4 from the Dev branch, added the CMD646 PCI IDE controller, and fixed some bugs on the CMD640. 2021-10-26 01:54:35 +02:00
OBattler
67367798a7 Merged various SMC FDC67C6xx Super I/O chips into one file, re-added the UMC88xx 486 chipsets (and four machines for it) based on work by tiseno100 and my own work, various other fixes, and added quite a few machines (including the AOpen AP5VM which now works), also added the remaining ALi M6117 machine (Protech SBC with Award BIOS), and made the Intel Advanced/ATX's on-board S3 Trio64V+ work, as well as the on-board S3 Trio64/V2 of the two Compaq Presarios. 2021-08-21 18:19:10 +02:00
Miran Grča
8ca1328c7e Merge pull request #1571 from 86Box/master 
Bring the branch up to par with master.
 2021-08-02 06:58:22 +02:00
OBattler
7f85f6acdf Some PCI IRQ changes to mitigate IRQ loss. 2021-07-23 05:51:26 +02:00
OBattler
4f6df76f10 Revert "Revert "Merge branch 'feature/machine_and_kb' into master"" 
This reverts commit f2cd3756dd.
 2021-07-04 17:40:39 +02:00
Daniel Gurney
f2cd3756dd Revert "Merge branch 'feature/machine_and_kb' into master" 
This reverts commit 6604a29d7e, reversing
changes made to 1d7fca0abd.
 2021-07-04 18:22:52 +03:00
OBattler
fd4817a87b All the current WIP work (warning: the PIT is currently using some temporary test rewrite that is going to be undone). 2021-06-29 19:11:19 +02:00
OBattler
bfbb4b9655 PCI now supports a fourth MIRQ. 2021-06-07 00:20:04 +02:00
RichardG867
82a3861805 Make PCI TRC reset all devices 2021-06-03 16:26:06 -03:00
OBattler
e04ebd69a2 PCI changes. 2021-04-06 07:30:11 +02:00
RichardG867
27115d80d3 Add AGP video card support and Voodoo 3 AGP 2021-03-14 21:31:02 -03:00
OBattler
0faf6692c9 WARNING: CONFIGS MIGHT PARTIALLY BREAK WHERE DEVICE NAMES HAVE CHANGED. 
Changes to device_t struct to accomodate the upcoming PCI IRQ arbitration rewrite;
Added device.c/h API to obtain name from the device_t struct;
Significant changes to win/win_settings.c to clean up the code a bit and fix bugs;
Ported all the CPU and AudioPCI commits from PCem;
Added an API call to allow ACPI soft power off to gracefully stop the emulator;
Removed the Siemens PCD-2L from the Dev branch because it now works;
Removed the Socket 5 HP Vectra from the Dev branch because it now works;
Fixed the Compaq Presario and the Micronics Spitfire;
Give the IBM PC330 its own list of 486 CPU so it can have DX2's with CPUID 0x470;
SMM fixes;
Rewrote the SYSENTER, SYSEXIT, SYSCALL, and SYSRET instructions;
Changed IDE reset period to match the specification, fixes #929;
The keyboard input and output ports are now forced in front of the queue when read, fixes a number of bugs, including the AMI Apollo hanging on soft reset;
Added the Intel AN430TX but Dev branched because it does not work;
The network code no longer drops packets if the emulated network card has failed to receive them (eg. when the buffer is full);
Changes to PCI card adding and renamed some PCI slot types, also added proper AGP bridge slot types;
USB UHCI emulation is no longer a stub (still doesn't fully work, but at least Windows XP chk with Debug no longer ASSERT's on it);
Fixed NVR on the the SMC FDC37C932QF and APM variants;
A number of fixes to Intel 4x0 chipsets, including fixing every register of the 440LX and 440EX;
Some ACPI changes.
 2020-11-16 00:01:21 +01:00
RichardG867
9d541c267d Temporary hack to allow ACPI SCI to share an IRQ with PCI devices 2020-10-22 22:45:27 -03:00
OBattler
795a6017d2 PIC rewrite, proper SMRAM API, complete SiS 471 rewrite and addition of 40x, 460, and 461, changes to mem.c/h, disabled Voodoo memory dumping on exit, bumped SDL Hardware scale quality to 2, bumped IDE/ATAPI drives to ATA-6, finally bumped emulator version to 3.0, redid the bus type ID's to allow for planned ATAPI hard disks, made SST flash set its high mappings to the correct address if the CPU is 16-bit, and added the SiS 401 AMI 486 Clone, AOpen Vi15G, and the Soyo 4SA2 (486 with SiS 496/497 that can boot from CD-ROM), assorted 286+ protected mode fixes (for slightly more accuracy), and fixes to 808x emulation (MS Word 1.0 and 1.10 for DOS now work correctly from floppy). 2020-10-14 23:15:01 +02:00
RichardG867
eb79cb1782 PCI/AGP bridge support, part 3 2020-09-20 19:13:09 -03:00
RichardG867
3314bd4035 PCI/AGP bridge support, part 1 2020-09-19 00:56:12 -03:00
OBattler
72cfa4dcb8 Implemented the Intel 82091AA Super I/O chip and added the Packard Bell PB520R, closes #825. 2020-07-11 03:37:25 +02:00
OBattler
72c1c36ec6 OPTi 5x7 no longer does excess logging, running of timers on the recompiler is now done on every fourth AT KBC port 61h read instead of every 3F4h read, added some safety precautions to io.c to handle the cases where a handler removes itself, implmented the STPC ELCR and refresh control, and fixed the messed up register reading in the PC87307 and PC87309 implementations. 2020-07-10 02:05:49 +02:00
OBattler
2655873162 A number of PCI fixes and P5MP3 corrections. 2020-06-21 05:23:49 +02:00
OBattler
1c354f6777 Disabled PCI logging. 2020-06-14 22:07:37 +02:00
OBattler
8837d5d882 Implemented the National Semiconductors PC87307, PC87309, PC87332, and PC97307 Super I/O chips, fixed a number of bugs, and removed two machines from the Dev branch due to them now having the correct Super I/O chips. 2020-06-14 21:59:45 +02:00
OBattler
92a1425896 Implemented the Intel 420EX combined northbridge and southbridge, added the ASUS PVI-486AP4, and overhauled SMRAM handling (which also implements some previously missing extended SMRAM features of the 440BX+ and VIA Apollo series of chipsets). 2020-06-12 23:29:12 +02:00
OBattler
464a6da62f Intel SIO overhaul, slight DMA clean-ups and SIO-related additions, made the PIIX/SMSC series of southbridges aware of CPU speed changes, and fixed a bug in the 86F loading code. 2020-06-11 12:52:50 +02:00
RichardG867
92616e7b1d Onboard audio device support + onboard ES1371 for Tsunami ATX 2020-05-19 21:15:25 -03:00
OBattler
e42a99cc0e Added a PCI APM device that has a reset function that clears and status back to 0x00 on device reset, fixes soft reset hangs on the ASUS P/I-P55TVP4, and also made it clear that the TC430HX is Intel. 2020-04-23 20:57:13 +02:00
OBattler
275dd5a2f7 ACPI, SMM, and PIIX fixes, fixes quite a few boards, also fixed the Via Apollo series northbridge ID's, some CPU instructions on both 808x and 286+, and added SMM to 486's (Intel and AMD), WinChip and WinChip 2, and VIA Cyrix III, also removed the TC430HX and the Toshiba machine from the Dev branch. 2020-04-16 21:56:19 +02:00
David Hrdlička
a505894a10 Move all include files to src/include 
- 86Box's own headers go to /86box
- munt's public interface goes to /mt32emu
- all slirp headers go to /slirp (might want to consider using only its public inteface)
- single file headers from other projects go in include root
 2020-03-29 19:53:29 +02:00
Daniel Gurney
0c509fd551 Remove version tree-wide 2020-03-25 00:46:02 +02:00
OBattler
b1aea66e41 Aded optional PCI slot logging to detect unassigned slots (used for detecting what slot the southbridge should use, for example). 2020-03-23 02:41:18 +01:00
OBattler
490c04fcae Current WIP code. 2020-02-29 19:12:23 +01:00
OBattler
6cfa5c5c04 Changes to PCI and two new functions to accomodate the VIA MVP3 chipset. 2020-01-11 22:31:50 +01:00
OBattler
56a8da6cf5 PCI Reset Control register now forces bit 4 to be written as 0, fixes resets through this register from the second soft reset onwards. 2019-11-08 08:06:02 +01:00
OBattler
84adef4c25 PCI TRC hard resets now also reset the AT keyboard controller. 2019-10-30 18:08:35 +01:00