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549 Commits

Author SHA1 Message Date
RichardG867
b9c68bf277 Initial commit for AC97 2021-07-11 16:58:52 -03:00
OBattler
a896953dd5 Current WIP ALi work. 2021-07-04 18:16:35 +02:00
OBattler
4f6df76f10 Revert "Revert "Merge branch 'feature/machine_and_kb' into master"" 
This reverts commit f2cd3756dd.
 2021-07-04 17:40:39 +02:00
Daniel Gurney
f2cd3756dd Revert "Merge branch 'feature/machine_and_kb' into master" 
This reverts commit 6604a29d7e, reversing
changes made to 1d7fca0abd.
 2021-07-04 18:22:52 +03:00
Miran Grča
6604a29d7e Merge branch 'feature/machine_and_kb' into master 2021-07-04 16:57:06 +02:00
OBattler
1d7fca0abd GW286 GEAR fixes. 2021-07-04 16:55:04 +02:00
OBattler
15279e4964 Finished the ALi M15xx and removed from Dev branch. 2021-07-01 01:43:59 +02:00
OBattler
fd4817a87b All the current WIP work (warning: the PIT is currently using some temporary test rewrite that is going to be undone). 2021-06-29 19:11:19 +02:00
TC1995
3c95cd4cd5 Added the PS/2 model 80 type 3 machine. 2021-06-15 17:38:31 +02:00
RichardG867
62afe31757 Remove EBGA368 due to poor research (CPUs are Samuel 2 and newer only) 2021-06-03 16:26:08 -03:00
RichardG867
b5a295e91d Continuing the game port overhaul: added support for Super I/O game ports not being broken out 2021-06-03 16:26:07 -03:00
Panagiotis
0571bdc006 Removed the IBM PS/2 Model 70. Replaced with the Olivetti 486 2021-05-04 11:24:55 +03:00
Panagiotis
78b2f7c9fb Memory changes and SIO done according to the Intel Classic R 2021-05-02 13:48:18 +03:00
Panagiotis
aae4163a8e Removed the PS/1 Model 2133. Introduced the Siemens D824. 2021-05-02 10:33:45 +03:00
OBattler
33df3f7c51 The 386DX/486 and Slot 1/2 combined CPU socket machines are now in their own groups. 2021-05-01 05:41:19 +02:00
OBattler
8044fced2d Split the 486 machines into three groups. 2021-05-01 02:32:35 +02:00
OBattler
278b73e339 Fixed the VLSI 82c480 chipset and removed the HP Vectra 486 from the Dev branch. 2021-04-28 08:59:52 +02:00
Alexander Babikov
66d09a189a Properly remove the FIC VIP-IO2 from the dev branch 2021-04-26 00:35:56 +05:00
Panagiotis
ba92f1df34 Finalize the SiS Pentiums 
- Implemented the SiS 5511
- The SiS 5571 can safely go off Dev Branch now
- Few fixes on the SiS 5598
 2021-04-25 13:23:41 +03:00
Panagiotis
11d4f18cfe SiS 5598 Implementation. 2021-04-21 21:54:23 +03:00
OBattler
17c3056681 Finished fixing the VIA chipset required for the FIC VIP-IO2, added a version of the W83787F Super I/O chip with secondary IDE, fixed the W83787F IDE handler, made AT NVR initialize with 0xff rather than 0x00 by default (which is actually correct), and removed the FIC VIP-IO2 from the Dev branch. 2021-04-20 03:24:30 +02:00
RichardG867
4a41e4d486 De-underscore PowerMate V, OpenAT and OpenXT 2021-04-17 19:23:22 -03:00
RichardG867
ec9b5cae73 Part 2 of The De-Underscoring: function names, ROM paths and some indentation cleanups 2021-04-17 17:12:02 -03:00
RichardG867
1e21629523 Limit PCjr to 4.77 MHz the proper way 2021-04-17 16:47:52 -03:00
RichardG867
d0d73b7ef5 Revert "The IBM PCjr is now limited to 8088 4.77 MHz, closes #1379." 
This reverts commit d060a38d91.

# Conflicts:
#	src/machine/machine_table.c
 2021-04-17 16:46:04 -03:00
RichardG867
dcbf4b5729 Merge branch 'master' of https://github.com/86Box/86Box 2021-04-17 16:43:32 -03:00
RichardG867
120fc553b0 Machine table limit cleanup, based on research into potentially undocumented jumper combinations 2021-04-17 16:43:25 -03:00
OBattler
ad3c3a3c6d Fixed a compile-breaking mistake in machine/machine_table.c. 2021-04-17 04:47:12 +02:00
OBattler
4989d99c1b Merge branch 'master' of https://github.com/86Box/86Box 2021-04-17 04:45:55 +02:00
OBattler
d060a38d91 The IBM PCjr is now limited to 8088 4.77 MHz, closes #1379. 2021-04-17 04:45:28 +02:00
RichardG867
023917f8c0 Fix machine table indentation 2021-04-16 16:20:46 -03:00
nerd73
8e3b09f323 Various 486 improvements 
- Added SL-Enhanced versions of Intel 486 CPUs and Enhanced AMD Am486DX2/DX4 CPUs
- Cleaned up the 486 CPU types and updated intel_4x0.c to reflect this
- Fixed some incorrect EDX reset and CPUID values
- Blacklisted non-SMM capable 486 CPUs on the Soyo 4SA2 motherboard
- Merged the non-OverDrive and OverDrive Intel DX4s because of further research confirming them to be functionally identical
- Removed SMM support on early 486 CPUs
 2021-04-15 21:38:03 -06:00
OBattler
3746b722c7 The two 486 machines with on-board SCSI controllers now have the MACHINE_SCSI flag. 2021-04-13 18:57:01 +02:00
nerd73
b0bff5007c TMC PAT54PV supports 50 mhz FSB speed 2021-04-09 23:46:47 -06:00
nerd73
84c4ae7e93 The PAT54PV bios blacklists AMD CPUs. 2021-04-09 21:26:28 -06:00
nerd73
a4f16a799e Add the TMC PAT54PV 
An ISA/VLB Socket 5 machine. Also makes KBC command A0 return 0x28 then 0 so that the BIOS can function.
 2021-04-09 20:24:47 -06:00
OBattler
3747c7f7fa Added the Compaq Presario 2240, closes #1207. 2021-04-07 02:14:01 +02:00
OBattler
695ebbb512 Merge branch 'master' of https://github.com/86Box/86Box 2021-04-06 22:17:03 +02:00
OBattler
4bd9b93980 Fixed the short name of the ASUS ISA-486, fixes #1357. 2021-04-06 22:16:52 +02:00
F10Setup
b9c67a71aa Renamed the 6571 to the 6573 2021-04-06 09:56:17 +03:00
OBattler
b7073cec98 To 63 MB actually. 2021-04-06 08:37:07 +02:00
OBattler
38a701a964 Increased the memory limit of the FIC 486-VC-HD to 64 MB. 2021-04-06 08:35:13 +02:00
Miran Grča
091b45c104 Merge branch 'master' into master 2021-04-06 07:24:30 +02:00
OBattler
afa73c5bd6 Removed the MSI MS-6198 that was not supposed to be there. 2021-04-06 07:18:53 +02:00
OBattler
0415351497 Added the Super PC/Turbo TX, ASUS P/I-486SP3, ASUS PVI-486SP3C, PC Partner MB520N, MSI MS-6168, and Packard bell Bora Pro. 2021-04-06 07:17:38 +02:00
Panagiotis
5d68fa68c0 Implemented the OPTi 822 VLB to PCI bridge 
Needed for early OPTi Pentium's but also 486's like the Packard Bell PB450 PCI. IRQ routing is hacking though!!
 2021-04-05 22:28:04 +03:00
Panagiotis
d73011cd4c Early implementation of the Intel 450KX 
450GX & 450KX are the first chipsets intended for the i686 era of processors. Mostly they were used on workstations and servers but also a few general boards. This is an early implementation, not complete due to 86Box limitations in terms of memory handling.
 2021-03-28 21:06:06 +03:00
F10Setup
1e89695407 Fixed a stupid mistake 2021-03-27 20:38:33 +02:00
Miran Grča
92a5e09659 Merge pull request #1329 from F10Setup/master 
Added the ValuePoint's on-board video
 2021-03-25 21:36:46 +01:00
F10Setup
590ab0983a Added the ValuePoint's on-board video 2021-03-25 11:01:57 +02:00