Commit Graph

762 Commits

Author SHA1 Message Date
RichardG867
120fc553b0 Machine table limit cleanup, based on research into potentially undocumented jumper combinations 2021-04-17 16:43:25 -03:00
RichardG867
4c46d21924 Clean up 450KX formatting 2021-04-17 16:22:00 -03:00
RichardG867
023917f8c0 Fix machine table indentation 2021-04-16 16:20:46 -03:00
nerd73
5e89a9d775 fix more compile issues 2021-04-15 23:34:53 -06:00
nerd73
791bae3560 Add the AMD Am486DXL and DXL2.
Has otherwise Intel-compatible SMM with an SMBase at 60000h.
2021-04-15 23:28:07 -06:00
nerd73
8e3b09f323 Various 486 improvements
- Added SL-Enhanced versions of Intel 486 CPUs and Enhanced AMD Am486DX2/DX4 CPUs
- Cleaned up the 486 CPU types and updated intel_4x0.c to reflect this
- Fixed some incorrect EDX reset and CPUID values
- Blacklisted non-SMM capable 486 CPUs on the Soyo 4SA2 motherboard
- Merged the non-OverDrive and OverDrive Intel DX4s because of further research confirming them to be functionally identical
- Removed SMM support on early 486 CPUs
2021-04-15 21:38:03 -06:00
OBattler
3746b722c7 The two 486 machines with on-board SCSI controllers now have the MACHINE_SCSI flag. 2021-04-13 18:57:01 +02:00
OBattler
1a7bcec0f4 The Soyo 4SA2 now correctly has the Winbond W83787F Super I/O chip. 2021-04-13 00:31:09 +02:00
Miran Grča
00f722bdf5 Merge pull request #1365 from nerd73/master
Fix minimum FSB on TMC PAT54PV
2021-04-11 07:36:44 +02:00
OBattler
8b6f9707d5 More CPU fixes, and SMM now implemented on Cyrix Cx486 and Cx5x86 CPU's as well as on Intel/AMI SX, DX, and SX2 CPU's. 2021-04-11 07:25:08 +02:00
OBattler
8175289c9d Am486 SMBASE is now correctly initialized to 30000, 60000 is for the Am486DXL and Am486DXL2, which we do not emulate. 2021-04-10 22:22:19 +02:00
nerd73
b0bff5007c TMC PAT54PV supports 50 mhz FSB speed 2021-04-09 23:46:47 -06:00
nerd73
84c4ae7e93 The PAT54PV bios blacklists AMD CPUs. 2021-04-09 21:26:28 -06:00
nerd73
a4f16a799e Add the TMC PAT54PV
An ISA/VLB Socket 5 machine. Also makes KBC command A0 return 0x28 then 0 so that the BIOS can function.
2021-04-09 20:24:47 -06:00
OBattler
3747c7f7fa Added the Compaq Presario 2240, closes #1207. 2021-04-07 02:14:01 +02:00
OBattler
695ebbb512 Merge branch 'master' of https://github.com/86Box/86Box 2021-04-06 22:17:03 +02:00
OBattler
4bd9b93980 Fixed the short name of the ASUS ISA-486, fixes #1357. 2021-04-06 22:16:52 +02:00
F10Setup
b9c67a71aa Renamed the 6571 to the 6573 2021-04-06 09:56:17 +03:00
OBattler
b7073cec98 To 63 MB actually. 2021-04-06 08:37:07 +02:00
OBattler
38a701a964 Increased the memory limit of the FIC 486-VC-HD to 64 MB. 2021-04-06 08:35:13 +02:00
Miran Grča
091b45c104 Merge branch 'master' into master 2021-04-06 07:24:30 +02:00
OBattler
afa73c5bd6 Removed the MSI MS-6198 that was not supposed to be there. 2021-04-06 07:18:53 +02:00
OBattler
0415351497 Added the Super PC/Turbo TX, ASUS P/I-486SP3, ASUS PVI-486SP3C, PC Partner MB520N, MSI MS-6168, and Packard bell Bora Pro. 2021-04-06 07:17:38 +02:00
OBattler
03fdcf7a9e The Tandy machines now add a FDC with port 3F7 with the disk change line, fixes #1340. 2021-04-06 06:18:56 +02:00
Panagiotis
5d68fa68c0 Implemented the OPTi 822 VLB to PCI bridge
Needed for early OPTi Pentium's but also 486's like the Packard Bell PB450 PCI. IRQ routing is hacking though!!
2021-04-05 22:28:04 +03:00
David Hrdlička
dfbbe08a07 rewrite the emulator to use UTF-8 internally 2021-03-30 09:46:49 +02:00
Panagiotis
d73011cd4c Early implementation of the Intel 450KX
450GX & 450KX are the first chipsets intended for the i686 era of processors. Mostly they were used on workstations and servers but also a few general boards. This is an early implementation, not complete due to 86Box limitations in terms of memory handling.
2021-03-28 21:06:06 +03:00
F10Setup
1e89695407 Fixed a stupid mistake 2021-03-27 20:38:33 +02:00
Miran Grča
92a5e09659 Merge pull request #1329 from F10Setup/master
Added the ValuePoint's on-board video
2021-03-25 21:36:46 +01:00
Panagiotis
bcd90a221d Re-added the Super I/O back to the Hot 433A 2021-03-25 11:17:48 +02:00
Panagiotis
0f84a510af Fix the 486 machines 2021-03-25 11:16:24 +02:00
F10Setup
590ab0983a Added the ValuePoint's on-board video 2021-03-25 11:01:57 +02:00
Panagiotis
050c16424c Seperated the UMC 8886, Added the UMC 8890 2021-03-25 11:01:54 +02:00
Miran Grča
22bf154153 Update machine_table.c
Fixed the Machine table entry for the Commodore SL386SX-25, fixes #1324.
2021-03-25 03:43:02 +01:00
OBattler
be8c03b3c0 Upated some machine files to no longer use the egareads and egawrites variables, should fix compilation. 2021-03-24 19:42:47 +01:00
David Hrdlička
10cc122925 fix Clang/WinSDK warnings 2021-03-21 03:28:37 +01:00
RichardG867
6fb31016f6 FW-6400GX has no ISA slots 2021-03-19 16:32:08 -03:00
OBattler
f3dfd74655 Fixed arrow keys on the Tandy machines... this time for real. 2021-03-17 02:39:13 +01:00
RichardG867
fd2167ceeb Fix build 2021-03-16 17:55:01 -03:00
RichardG867
83299a5965 Machine table indentation fixes 2021-03-16 17:35:27 -03:00
RichardG867
31331b08d1 Merge branch 'master' of https://github.com/86Box/86Box 2021-03-16 17:31:24 -03:00
RichardG867
d2959556af Machine table fixes 2021-03-16 15:06:56 -03:00
Panagiotis
b63a20c109 Added the ECS Elite UM8810PAIO
A Phoenix based UMC 486 PCI board
2021-03-16 13:55:43 +02:00
Panagiotis
c88c208daa Disable PS/2 from the UMC boards
Although the chipset supports PS/2, the BIOS do not.
2021-03-16 10:33:43 +02:00
Miran Grča
82b26f75be Merge pull request #1303 from richardg867/master
AGP and clock control
2021-03-15 22:50:31 +01:00
RichardG867
ca354f5854 Fix M1543 PCI slot mess 2021-03-14 20:29:46 -03:00
RichardG867
d42aad40d6 Remove ICS clock generator from P2B-LS due to incorrect speeds being set on boot 2021-03-14 19:45:22 -03:00
Miran Grča
261d345a3f Merge pull request #1302 from tiseno100/master
First batch implementation of the UMC HB4 chipset
2021-03-13 19:52:25 +01:00
Panagiotis
202d7faee9 Removed the ECS 486
It's not used anymore
2021-03-13 11:45:44 +02:00
Panagiotis
7c6e5bda4a First batch implementation of the UMC HB4 chipset 2021-03-13 11:44:07 +02:00