claunia/86Box
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
3,244 Commits 1 Branch 0 Tags
1d27587182e1f65a3d0fc898bb08fca7b804d633
Commit Graph

51 Commits

Author SHA1 Message Date
tiseno100
47290280b1 Implemented the Intel 440FX boards and the Poisk 2 
Prior to the PC87307 addition, the Intel 440FX boards can finally be added
 2020-06-15 11:37:24 +03:00
OBattler
9c6f0d806e A slight reorganization of the source tree and fixed a warning in disk/mo.c. 2020-06-13 10:17:57 +02:00
tiseno100
5956d22d06 Replaced the position of PCI reg 0x0c as it was causing problems if you allocated many PCI cards 2020-06-12 19:35:21 +03:00
tiseno100
3988f6fa45 Added the Acer V60N 
An i686 Acer BIOS board. Works as intended
 2020-06-12 19:18:28 +03:00
RichardG867
f65b51b0f3 MPS table patcher for the ASUS P/I-P65UP5 2020-06-07 16:47:16 -03:00
David Hrdlička
dfa28eb8e9 Revert "Machine path reorganisation" 
This reverts commit 0a48dbcfcd.
 2020-05-22 22:32:46 +02:00
tiseno100
0a48dbcfcd Machine path reorganisation 
The machine roms have been reorganized according to class(8086 - 286), CPU model (286 - 486) & Socket(Socket 4 - PGA370). Few exceptions are some manufacturer ROMs
 2020-05-22 17:41:42 +03:00
tiseno100
2e1778e1bd Removed the Intel VS440FX 
It doesn't POST and on all of that, not helpful at all on PC87307 development.
 2020-05-05 12:10:15 +03:00
RichardG867
3d5f9de060 ASUS P/I-P65UP5 2020-04-26 13:43:06 -03:00
tiseno100
73b51bf573 Dev branch all machines with missing SIO chips + added the VS440FX 
This board returns D4 POST with no output. Needs further examination. Meant for the future PC87307 implementation.

Also all boards that miss their SIO chips got Dev Branched just in case 2.10 gets released while some miss their SIO.
 2020-04-25 18:59:37 +03:00
tiseno100
9b42dff06c Added the Biostar 8500ttc + all Socket 8 motherboard use their official capacities 2020-04-15 08:58:52 +03:00
tiseno100
dabe6756a5 Removed the Tyan's off board. Replaced them with some stable boards 2020-04-14 22:33:48 +03:00
tiseno100
125b77ece5 Added the Micronics M6MI 2020-04-14 21:56:34 +03:00
OBattler
d75e901a83 Moved the Intel i686 CPU's and related machines out of the Dev branch. 2020-04-10 20:01:26 +02:00
tiseno100
e51a208341 Added few changes 
- Added a skeletal 596B(Doesn't work properly)
- Splitted the Socket 8, Slot 1 & Socket 370 machines to their respective files
 2020-04-01 17:26:28 +03:00
nerd73
9710c74f51 Replace the 6ABX3 with a better working machine 2020-03-29 13:05:07 -06:00
David Hrdlička
a505894a10 Move all include files to src/include 
- 86Box's own headers go to /86box
- munt's public interface goes to /mt32emu
- all slirp headers go to /slirp (might want to consider using only its public inteface)
- single file headers from other projects go in include root
 2020-03-29 19:53:29 +02:00
OBattler
c715600ebc Merge pull request #648 from richardg867/master 
W83781D hardware monitoring improvements
 2020-03-29 07:15:26 +02:00
RichardG867
189ad2693a W83781D hardware monitoring improvements 2020-03-28 18:50:47 -03:00
tiseno100
6571e1153c Added initial Apollo Pro emulation 
- Added the Apollo Pro Northbridge
- Added a PC Partner board (APRO + 586B Southbridge) **COMPATIBLE WITH VIA C3!**
 2020-03-26 18:29:20 +02:00
nerd73
a14429dbee Machine table revisions 
- Fixes maximum RAM amounts on some motherboards
- Adds finalized 430TX roster
- Removes VLB from all PCI boards as none of our emulated PCI boards have VLB
 2020-03-25 21:10:14 -06:00
RichardG867
fb4db7aaf9 Only check for Klamath on dev branch 2020-03-25 22:48:47 -03:00
RichardG867
80f1493d73 Actually move the P2B-LS code to non-dev builds 2020-03-25 22:45:18 -03:00
RichardG867
b734fd00fb 440ZX supports 512MB the same way 440BX supports 1GB: unofficially 2020-03-25 21:39:42 -03:00
RichardG867
6a9106050f Add SPD to the Bora Pro 2020-03-25 21:38:38 -03:00
RichardG867
d3ecbd800f Merge branch 'master' of https://github.com/86Box/86Box 
# Conflicts:
#	src/machine/m_at_socket8.c
 2020-03-25 21:37:38 -03:00
RichardG867
d1be6a014f Implement SPD 2020-03-25 21:35:35 -03:00
tiseno100
b1a421a2e9 Incorrect Encoding. Fixed 2020-03-25 12:31:54 +02:00
tiseno100
aee772d773 mistyped directory 2020-03-25 12:28:10 +02:00
OBattler
dbd49625e1 Merge pull request #622 from richardg867/master 
Hardware monitor voltage reading improvements
 2020-03-24 23:56:41 +01:00
RichardG867
18688a74cd Hardware monitor voltage reading improvements 2020-03-24 19:53:09 -03:00
Daniel Gurney
0c509fd551 Remove version tree-wide 2020-03-25 00:46:02 +02:00
OBattler
44f648bc31 Merge branch 'temp' of https://github.com/86Box/86Box into temp 2020-03-24 22:46:49 +01:00
OBattler
7574227fdf PIIX changes - PB640 PIIX no longer exists (turns out it's just a normal PIIX and its original implementation was wrong at the time the PB640 was added) and separated the PIIX4E from PIIX4. 2020-03-24 22:43:58 +01:00
richardg867
8b8600d6bf Change hardware monitor VCORE around on the P2B-LS 
More CPUs use a 2.0V vcore so make Klamath's 2.8V the exception rather than the rule.
 2020-03-24 17:19:52 -03:00
nerd73
c007121062 Merge branch 'temp' into temp 2020-03-23 16:06:32 -06:00
OBattler
43f2bb849b Merge branch 'temp' into temp 2020-03-23 22:02:52 +01:00
tiseno100
35895fcddd include a note about the 440ZX 2020-03-23 22:29:51 +02:00
nerd73
169bd9bdab Make everything compile correctly 
Everything should compile fine now.
 2020-03-23 13:05:44 -06:00
nerd73
1ced5064ec Merge branch 'temp' into temp 2020-03-22 20:06:21 -06:00
OBattler
c7ca66bd70 Merge pull request #617 from richardg867/temp 
SMBus framework + Winbond W83781D hardware monitor
 2020-03-23 02:46:43 +01:00
OBattler
ae1f1529ea The P2B now correctly uses the W83877EF. 2020-03-23 02:38:03 +01:00
RichardG867
dd70542d78 SMBus support + Winbond W83781D hardware monitor 2020-03-22 22:11:55 -03:00
tiseno100
57a02531ac Added the Soltek SL-63A1 
A weaker S370 board
 2020-03-21 10:38:34 +02:00
tiseno100
0d945fbf47 Added the ECS P6BXT-A+ 2020-03-21 10:04:11 +02:00
RichardG867
18562b5f7d ASUS P2B-LS board 2020-03-20 23:27:23 -03:00
nerd73
111d82fa0c Preliminary VIA Cyrix III emulation 
This adds preliminary emulation of the first-gen Samuel core, used in the VIA Cyrix III CPU, at clock speeds from 66 to 700 MHz. This also moves the 440BX emulation out of the dev-branch.

Things working:
- CPUID
- Windows 98SE
- Timings seem identical between WinChip/W2's integer section and this

Things left to do:
- 3DNow on old dynarec
- Half-speed FPU (currently simulated with WinChip 1 timings instead of WinChip 2)
 2020-03-01 15:06:35 -07:00
OBattler
a9ffc5b8c9 Even more fixes - the 6ABX3 now is fully implemented and works, except for the Super I/O chip. 2020-03-01 00:35:18 +01:00
OBattler
d26dfc8f0e More fixe and renamed the 440BX machine to 6ABX3. 2020-03-01 00:23:47 +01:00
OBattler
490c04fcae Current WIP code. 2020-02-29 19:12:23 +01:00