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1dcd2f830517ee6cc15cd32a4e9ff7f94445faae
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739 Commits

Author SHA1 Message Date
Jasmine Iwanek
1b4408cf38 Deal with incorrect formatting offset in cpu_table 2024-07-21 18:18:47 -04:00
Jasmine Iwanek
ecc7f965a8 Named initializers for IBM & Cyrix CPU's 2024-07-21 18:18:47 -04:00
OBattler
6781ea56dd Merge branch 'master' of https://github.com/86Box/86Box 2024-07-02 01:47:49 +02:00
OBattler
eab504f388 x86seg.c: Make sure not to read beyond the end of the stack segment on stack transfers, fixes erroneous page faults when transferring 16-bit stacks to 32-bit stacks, fixes OS/2 2.0 build 6.141. 2024-07-02 01:47:42 +02:00
Jasmine Iwanek
13dac1020f Named-initializers for 80386DX CPU's 2024-06-28 23:42:28 -04:00
Jasmine Iwanek
571bab3efd Named-initializers for 80386SX CPU's 2024-06-28 23:42:28 -04:00
OBattler
bbe035b62a Implement special selector pushing behavior and improve the opcode length heuristic for CS limit checks, fixes #4552. 2024-06-23 02:28:22 +02:00
Cacodemon345
2b3d3ad5bd Make sure timers don't go completely out of sync upon altering TSC via WRMSR 2024-06-18 20:21:23 +06:00
OBattler
a369bc2d05 Reimplement S3 ViRGE reset and move PCI TRC CPU reset to outside the recompiled block, fixes #2903. 2024-06-12 20:46:27 +02:00
OBattler
969830ad83 New recompiler: Add a sanity check, fixes crash with RapidCAD, fixes #4487 . 2024-06-12 01:58:44 +02:00
OBattler
751f2af382 And primitives.h. as well. 2024-06-10 02:23:13 +02:00
OBattler
f4cc13d622 The forgotten .c file. 2024-06-10 02:14:55 +02:00
OBattler
56b3a27b33 SoftFloat: Move the const's to a .c file and make the .h only contain extern's. 2024-06-10 02:14:42 +02:00
OBattler
2273f563a5 Moved the offending SoftFloat-related stuff to x87_sf.h, fixes warnings. 2024-06-10 00:08:48 +02:00
TC1995
0f29bcddf1 Upgrade to softfloat3e. 
This should solve licensing problems as well.
 2024-06-09 23:08:46 +02:00
OBattler
4b77ef6823 286: Make LOCK legal with all instructions, per the Programmers' Reference Manual. 2024-06-09 19:58:16 +02:00
OBattler
38557b33dc Removed the VM_FLAG access from DRx access again. 2024-05-25 17:24:43 +02:00
Alexander Babikov
a07ffdecab Restore the debug register operation on 486+ 
But put it behind a compile-time option due to performance hits
Also add the DE flag to CPUID on supported CPUs
 2024-05-24 03:35:08 +05:00
OBattler
d23c2a613d 286/386 interpreter: reinstall VM_FLAG check on accessin the debug registers. 2024-05-24 00:10:04 +02:00
Miran Grča
54178355b8 And in cpu.h. 2024-04-25 19:11:25 +02:00
Miran Grča
8928f5d771 Variable to override the 286/386 interpreter. 2024-04-25 19:10:40 +02:00
OBattler
15e3876e21 Prepare WD76C10 for 286/386 interpreter selection, exempt IBM 486BL and all Cyrix'es from the 286/386 interpreter. 2024-04-24 06:06:09 +02:00
OBattler
8e21ba4699 SoftFloat: Fix 8087/287 comparison of infinites. 2024-03-27 13:59:37 +01:00
OBattler
12e4d1b083 SoftFloat: Correctly treat +INF and -INF as equal on 8087 and 287, fixes 287 detection in MCPDiag. 2024-03-26 23:29:06 +01:00
OBattler
0b0cb84bf7 FPU: Re-enabled SoftFloat on 808x and implement the missing FBLD instruction, closes #4300. 2024-03-25 19:59:26 +01:00
OBattler
244038b84c LOCK: It is sometimes legal when cpu_mod == 3, fixes hangs with Compaq Portable III 386 TEST. 2024-03-03 21:24:00 +01:00
OBattler
71ecdc1b55 No longer raise TS# when (CS & 0xFFF8) is zero and (CS & 0x0004) is not, fixes #4214. 2024-02-29 06:52:45 +01:00
OBattler
6de7c7cd5e Fixed LOCK legality with prefixes, closes #4189. 2024-02-23 07:10:15 +01:00
OBattler
fcabd353d9 Check IOPL on 286 task segments. 2024-02-22 00:56:28 +01:00
OBattler
733c26d04a Return no mask when the TSS type is 286, closes #4177. 2024-02-19 19:09:35 +01:00
OBattler
e3e30e7536 Fixed a very stupid typo in the 286/386 version of the LOCK instruction that was breaking OS/2 Warp 3.0. 2024-02-19 15:41:49 +01:00
OBattler
19f6954410 Reverted some CPU-related changes. 2024-02-19 15:20:59 +01:00
Miran Grča
f7c995738c Fixed a bug in the 386 implementation of LOCK. 2024-02-14 02:29:31 +01:00
OBattler
2ab99dda0b Made LOCK instruction legality more accurate on 386, closes #4132. 2024-02-10 03:05:56 +01:00
OBattler
3f8952a558 More (S)VGA horizontal blanking fixes and CPU CR0 bit 4 fixes. 2024-02-09 18:02:33 +01:00
OBattler
30e7a49558 Fix compile-breaking mistakes in cpu/386.c. 2024-02-09 12:15:28 +01:00
OBattler
5a3d74d64f 286/386 interpreter fixes - the correct opcode arrays are now used and fixed the debug registers. 2024-02-09 12:14:35 +01:00
Alexander Babikov
996769095b Implement most missing P6 MSRs 
Remove the 6 extraneous performance counter MSRs which
haven't existed on P6
 2024-02-07 12:31:43 +05:00
Alexander Babikov
e54b57641c Implement missing IBM, AMD and Cyrix MSRs 2024-02-07 12:31:42 +05:00
Alexander Babikov
65f40ca71d Implement missing WinChip C6/2 and Cyrix III MSRs 2024-02-07 12:31:42 +05:00
Alexander Babikov
1b9bf568f2 Implement missing Pentium MSRs 
Includes obscure behavior, like undocumented "high" MSRs
 2024-02-07 12:31:41 +05:00
Alexander Babikov
8143ccdc9b K5 reorganization 
Rename SSA/5 to Model 0 and 5k86 to Model 1/2/3 and swap their ordering
Remove the Model 0 CPUs from the Model 1 (5k86) table
 2024-02-07 12:31:40 +05:00
Alexander Babikov
8520e6be85 Show actual clocks for CPUs w/ Performance Ratings 2024-02-07 12:31:40 +05:00
Alexander Babikov
2a3d13d306 Various consistency changes 2024-02-07 12:31:39 +05:00
Alexander Babikov
1e4455d98c Add comments with MSR and CPUID flag names 
Reorganize the MSR struct
 2024-02-07 12:31:38 +05:00
Alexander Babikov
b860156350 Remove an accidentally committed duplicate file 2024-02-07 12:31:38 +05:00
Alexander Babikov
1bb31f3937 Remove the AP61 hack completely 
It's no longer needed
 2024-02-07 12:31:37 +05:00
Alexander Babikov
963525ff2e Correct the CPUID SEP bit on AMD K6-2 and later 
They use the standard bit 11, not he AMD-specific bit 10
 2024-02-07 12:31:37 +05:00
Alexander Babikov
aef257378e Add PGE to AMD K5 and K6-2C/III/2+/III+ 2024-02-07 12:31:36 +05:00
Alexander Babikov
37cf0b6845 Separate Pentium and Cx6x86 MSR handling 2024-02-07 12:31:35 +05:00