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1dcd2f830517ee6cc15cd32a4e9ff7f94445faae
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739 Commits

Author SHA1 Message Date
Cacodemon345
7b29c30819 Implement immediate IMUL operands (#13) 
* Implement immediate IMUL operands

Implement PUSH segment underflow behaviour on SP = 1 values for 8018x

* Limit bit-shifts and rotates to 31 on Intel 8018x

* NEC/8018x ENTER/LEAVE instructions

* NEC/8018x bound checking instruction
 2022-09-07 08:50:30 -04:00
Cacodemon345
2b0dff2ec6 Implement immediate versions of PUSH operations (#12) 
Implement immediate versions of bit-shifting operations

Make word read/write operations not overflow when offset is 0xFFFF on 8018x
 2022-09-06 16:59:39 -04:00
Cacodemon345
3dbfcf1fd3 NEC SUB4S and CMP4S instructions (#11) 
* NEC SUB4S and CMP4S instructions

* Return to original IP properly in case of POP PS

* NEC REPC/REPNC instructions

* Make NEC BRKEM instruction a fatal for now

* Fix wrong segment addresses in some NEC instructions
 2022-09-06 12:29:54 -04:00
Cacodemon345
e93cd46c78 NEC ADD4S instruction (#10) 2022-09-05 16:27:09 -04:00
Cacodemon345
323f7e7a62 NEC INS/EXT instructions (#9) 2022-09-05 06:18:10 -04:00
Jasmine Iwanek
cc72ab21e8 Some missing bits 2022-09-04 17:11:14 -04:00
Jasmine Iwanek
03bf62cccf Temporary for testing 2022-09-04 16:02:52 -04:00
Cacodemon345
199bbed5ee NEC CLR1 instructions (#8) 
Wraps up the fixed bitfield manipulation instructions
 2022-09-04 16:00:29 -04:00
Cacodemon345
2280685526 NEC SET1 instructions (#7) 
Mask the bit argument properly
 2022-09-04 15:50:38 -04:00
Cacodemon345
db6eac6e2f Mark recently-added instructions as handled (#6) 2022-09-04 15:38:42 -04:00
Cacodemon345
6b55fa3d2e NEC NOT1 instruction (#5) 
Fix bit value usage of TEST1 instruction
 2022-09-04 15:25:08 -04:00
Cacodemon345
474ab60c97 NEC TEST1 instruction (#4) 2022-09-04 15:11:04 -04:00
Cacodemon345
71dde8658b Implement more NEC V20/V30 and 8018x instructions (#3) 
* Implement more NEC V20/V30 and 8018x instructions

* PUSHA/PUSH R
* POPA/POP R
* RO(L/R)4 r/m (NEC only)

* Fix critical mistake
 2022-09-04 12:30:21 -04:00
Cacodemon345
18d15758f5 Don't set ZF on MUL/MULU operations on NEC V20/V30 (#2) 2022-09-03 14:27:05 -04:00
Cacodemon345
028cbe7b4e NEC V20/V30: Cycle count fixes (#1) 
* Correct the names of NEC V20/V30 in Settings

Make NEC V30 have correct CPU types

* Treat NEC V20 as a Intel 8088 variant
 2022-09-03 05:55:53 -04:00
Jasmine Iwanek
9eaee6e20d Merge branch '86Box:master' into nec-v20 2022-08-31 16:42:10 -04:00
Jasmine Iwanek
672c15076c Merge branch '86Box:master' into nec-v20 2022-08-21 17:07:34 -04:00
RichardG867
d41bf191a5 Merge branch 'master' of ssh://github.com/86Box/86Box 2022-08-18 17:23:47 -03:00
RichardG867
48b372c60a gdbstub: Always ignore dynarec choice when compiled in 2022-08-18 17:23:41 -03:00
Miran Grča
ee651ae48f Update x86_ops_bcd.h 
Reverted the AAM instruction to again set the divisor to 10 when 0 is specified.
 2022-08-14 20:47:36 +02:00
Alexander Babikov
603cdcbb37 Clear unfilled registers when returning CPUID results on K6-2/III/+ CPUs 2022-08-13 15:41:00 +05:00
Jasmine Iwanek
eabf8b7e6c Merge branch '86Box:master' into nec-v20 2022-08-10 13:12:27 -04:00
OBattler
2a6a061556 nmi_raise() actually raises NMI, should fix ES1371 legacy device and other stuff. 2022-08-09 04:34:48 +02:00
OBattler
745c9f3eb5 Another fix. 2022-08-08 02:24:20 +02:00
OBattler
4bd7cf3653 Made AAM with base 0 work as before, fixes Microsoft Flight Simulator 98. 2022-08-07 23:35:12 +02:00
Cacodemon345
c743d36028 386: Set BS flag in DR6 other interpreter as well 2022-08-04 18:04:40 +06:00
Cacodemon345
64195df373 386: set bit 14 of DR6 to 1 on INT 01 with TF set 2022-08-04 16:43:21 +06:00
Cacodemon345
ab154faf88 x86: mov r, DR6 now always writes bits 4-11 and bits 16-31 as 1 2022-08-04 16:35:27 +06:00
Jasmine Iwanek
a31612b440 Merge branch '86Box:master' into nec-v20 2022-08-02 23:47:12 -04:00
OBattler
754058e2e5 AAM and AAD instruction fixes, fixes #2551. 2022-08-01 23:40:11 +02:00
Jasmine Iwanek
b3bca26471 Merge branch 'master' into nec-v20 2022-07-24 17:20:53 -04:00
OBattler
5292dcab32 Warning fixes. 2022-07-24 03:05:51 +02:00
Jasmine Iwanek
c430fbe84c Assorted cleanups I've discovered over time 2022-07-21 22:08:36 -04:00
OBattler
c6d7f4a95b Do not disable the timer in cpu_fast_off_reset() because the timers have already been reinitialized at this point. 2022-07-21 19:51:34 +02:00
Jasmine Iwanek
5f1e64fab7 Merge branch 'master' into nec-v20 2022-07-19 20:00:03 -04:00
Jasmine Iwanek
6233027c9e Named initializers in machine table 2022-07-19 18:51:18 -04:00
OBattler
645c4e6902 ALi M6117-related CPU fixes. 2022-07-18 23:38:06 +02:00
Jasmine Iwanek
f9904e6e0c Merge branch '86Box:master' into nec-v20 2022-07-16 01:30:56 -04:00
OBattler
63e52cb832 Fixes to cpu/386_common.c. 2022-07-16 04:06:46 +02:00
OBattler
27713f6557 More CPU. 2022-07-16 03:22:41 +02:00
OBattler
a35c4aa674 CPU changes. 2022-07-16 03:21:21 +02:00
OBattler
2fd712d092 CPU changes. 2022-07-16 03:12:24 +02:00
OBattler
2c9bfa979f ALi M1489 and a CPU fix. 2022-07-16 02:47:39 +02:00
OBattler
da5d451386 Preparation for SMI# and NMI# changes. 2022-07-16 02:45:46 +02:00
Jasmine Iwanek
f373d3d8fe Merge branch '86Box:master' into nec-v20 2022-07-15 15:14:07 -04:00
TC1995
b80fda4280 The IBM 386/486 cpu's are based on modified Intel 386 designs and, as such, should behave like the them on the x86 flag ops. 2022-07-15 12:34:41 +02:00
Jasmine Iwanek
4f08c464f2 Merge branch '86Box:master' into nec-v20 2022-06-28 12:11:21 -04:00
TC1995
63b4209414 And finally, more fixes to the XGA implementation including: 
Cursor and mapping on Windows 2.x' 286/808x XGA driver.
Pattern and DMA bus master fixes to OS/2 2.x/Warp's XGA driver.
Software reset no longer causes glitches to the screen using XGA (x86.c)
 2022-06-27 17:01:02 +02:00
Cacodemon345
ce34c4cb16 x87_ops: Use __asm for consistency with the other inline assembly block 2022-06-19 16:01:23 +06:00
Jasmine Iwanek
8d6fec4f0d Merge branch '86Box:master' into nec-v20 2022-05-22 22:48:46 -04:00