8514/A changes:
1. Correct interlaced display resolution.
2. Added a limit to cursor coordinates.
3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS.
4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping).
Cirrus related:
1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual).
IBM VGA:
1. Built-in/option rom-less VGA don't need the "available" flag.
ATI Mach8/32:
1. As with 8514/A, corrected interlaced display.
XGA-1/-2:
1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs.
2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init.
3. The Memory Mapped R/W sides now account for instance in their address range.
4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading.
5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT.
6. More logs when enabled to see any future bugs.
ET3000AX: the chip in question should not support 1MB of video memory.
ET4000AX: the early TC6058AF revision can support 1MB of video memory (e.g.: Diamond Speedstar BIOS D3.10, undumped anyway), and actually don't update the rowoffset to 256 when using such chip in 320x200x256 mode. Fixes the copper demo in said chip revision.
IBM/ATI 8514/A side:
Made mode switches more immediate when actually switching from VGA to 8514/A and viceversa.
Tseng ET4000AX/W32 series side:
Actually use bit 2 of index 0x3f for the horizontal blank start bit 8 instead of bit 4 (horizontal retrace start), fixes skew issues with the et4000w32i rev B. card with resolutions like 1024x768 at 15 or 16bpp and others.
* Fix duplicated logic in vid_svga.c
* Voodoo 3/Banshee emulation now has blanking extensions applied
* S3 ViRGE and Matrox video cards as well
* Tseng ET4000-series cards as well
* Fix off-by-one error in vid_cl54xx.c
Trident cards are yet to be investigated. XGA and 8514/A are yet to be made blanking extensions compliant. Mach64, Paradise/WDC and OAK OTI cards remain as-is for now.
Fixed ET4000/W32 (without letters) hardware cursor.
Fixed non-interlaced 1280x1024x8bpp Cirrus mode in the 5434.
Added a note regarding the Radius (HT209) 8bpp render.
Reworked the TGUI9440, but still WIP.
Changes to device_t struct to accomodate the upcoming PCI IRQ arbitration rewrite;
Added device.c/h API to obtain name from the device_t struct;
Significant changes to win/win_settings.c to clean up the code a bit and fix bugs;
Ported all the CPU and AudioPCI commits from PCem;
Added an API call to allow ACPI soft power off to gracefully stop the emulator;
Removed the Siemens PCD-2L from the Dev branch because it now works;
Removed the Socket 5 HP Vectra from the Dev branch because it now works;
Fixed the Compaq Presario and the Micronics Spitfire;
Give the IBM PC330 its own list of 486 CPU so it can have DX2's with CPUID 0x470;
SMM fixes;
Rewrote the SYSENTER, SYSEXIT, SYSCALL, and SYSRET instructions;
Changed IDE reset period to match the specification, fixes#929;
The keyboard input and output ports are now forced in front of the queue when read, fixes a number of bugs, including the AMI Apollo hanging on soft reset;
Added the Intel AN430TX but Dev branched because it does not work;
The network code no longer drops packets if the emulated network card has failed to receive them (eg. when the buffer is full);
Changes to PCI card adding and renamed some PCI slot types, also added proper AGP bridge slot types;
USB UHCI emulation is no longer a stub (still doesn't fully work, but at least Windows XP chk with Debug no longer ASSERT's on it);
Fixed NVR on the the SMC FDC37C932QF and APM variants;
A number of fixes to Intel 4x0 chipsets, including fixing every register of the 440LX and 440EX;
Some ACPI changes.
