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5f64a6f85159510d59f87ae64c3391cad2bf7df7
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51 Commits

Author SHA1 Message Date
OBattler
5f64a6f851 SiS Rabbit (85c310) shadow RAM handling rewrite (fixes IDE, same as on the ACC chipset) and fixed a warning in the AD1848 code. 2020-06-07 01:54:19 +02:00
tiseno100
66c4ea194d Added the "fixed" Rabbit code 2020-06-06 07:50:11 +03:00
OBattler
df72311429 Merge branch 'master' of https://github.com/86Box/86Box 2020-06-06 05:47:29 +02:00
OBattler
ca3ef2bc5b Fixed ACC2168 chipset shadow RAM state setting because it was completely wrong, fixes IDE problems (yes, really) on the AMI 386DX Clone. 2020-06-06 05:47:07 +02:00
tiseno100
0af3f90c8f Added the 440EX 2020-06-05 23:12:36 +03:00
OBattler
b4fee61fa2 Merge pull request #782 from nerd73/master 
Add the AMI Excalibur, a VLB OPTi 596/597 machine.
 2020-06-05 19:20:45 +02:00
tiseno100
b04908f2a1 440LX implementation 2020-06-05 19:30:39 +03:00
nerd73
51572530ff Remove waitstates from register 02. 2020-06-05 10:28:03 -06:00
nerd73
3f0adb5211 Add the AMI Excalibur, a VLB OPTi 596/597 machine. 
Also adds emulation of the OPTi 5x7 chipset, and introduces a clock divider for VLB on 64-bit bus systems.
 2020-06-05 10:22:59 -06:00
tiseno100
c9003894ed Few minor changes on the VPX 2020-05-07 17:51:53 +03:00
tiseno100
ff29e04490 Added the missing 2 RW bitfields on command. 2020-04-29 11:39:25 +03:00
tiseno100
570034cb09 Improved the VIA VPX code 
Moved host bridge write code via_vpx_write.
Default registers are now on via_vpx_init.
Read only registers are hardcoded.
 2020-04-29 10:50:53 +03:00
tiseno100
ea357593bd removed the function switch off write 2020-04-17 12:41:27 +03:00
tiseno100
16c1584412 Apollo VPX bringup 
This commit brings Apollo VPX emulation on 86Box. It includes the Zida Tomato TX100 board. Meant mostly to check issues at WinBioses
 2020-04-17 12:34:39 +03:00
OBattler
275dd5a2f7 ACPI, SMM, and PIIX fixes, fixes quite a few boards, also fixed the Via Apollo series northbridge ID's, some CPU instructions on both 808x and 286+, and added SMM to 486's (Intel and AMD), WinChip and WinChip 2, and VIA Cyrix III, also removed the TC430HX and the Toshiba machine from the Dev branch. 2020-04-16 21:56:19 +02:00
OBattler
61f0ae7954 Better ACPI implementation (currently only on PIIX4/PIIX4E/SMSC southbridges), finished the SMSC southbridge (but the Atrend BIOS still hangs, need to figure out why), and fixed Tandy EEPROM saving. 2020-04-13 20:01:47 +02:00
OBattler
d75e901a83 Moved the Intel i686 CPU's and related machines out of the Dev branch. 2020-04-10 20:01:26 +02:00
OBattler
2a0b3eb9c5 Added PAE, ported K6, P6, and WinChip 2 timings to the old recompiler, added a bunch of CPU's to the old recompiler, done some x87 fixes for both recompilers, added PAE, and fixed root directory entries for single-sided 5.25" DD floppies in the New Floppy Image dialog. 2020-04-10 01:08:52 +02:00
OBattler
b8b198a56a Fixed SMM, overhauled the emulation of the VIA northbridges, and added the Via Apollo VP3. 2020-04-01 08:59:29 +02:00
TC1995
9cce85008a Reworked the CS8230 chipset using the 86box device model. 2020-03-31 00:46:47 +02:00
David Hrdlička
a505894a10 Move all include files to src/include 
- 86Box's own headers go to /86box
- munt's public interface goes to /mt32emu
- all slirp headers go to /slirp (might want to consider using only its public inteface)
- single file headers from other projects go in include root
 2020-03-29 19:53:29 +02:00
OBattler
66e159e0bf Fixed SMM, now it works correctly, and is now also operating on all CPU's from 386 onwards. 2020-03-29 18:12:43 +02:00
tiseno100
6571e1153c Added initial Apollo Pro emulation 
- Added the Apollo Pro Northbridge
- Added a PC Partner board (APRO + 586B Southbridge) **COMPATIBLE WITH VIA C3!**
 2020-03-26 18:29:20 +02:00
nerd73
98e6a48cef A port of the ECS 386/32 machine from PCem. 2020-03-24 21:53:19 -06:00
Daniel Gurney
0c509fd551 Remove version tree-wide 2020-03-25 00:46:02 +02:00
OBattler
98dd03f69d More minor fixes. 2020-03-24 02:34:20 +01:00
OBattler
937befa4e7 Fixed in IDE and 4x0 code. 2020-03-24 02:24:49 +01:00
nerd73
c007121062 Merge branch 'temp' into temp 2020-03-23 16:06:32 -06:00
OBattler
9870b9e0bb Minor 440BX fixes and added the 440ZX. 2020-03-23 21:57:24 +01:00
nerd73
d555614739 Merge branch 'temp' into temp 2020-03-23 02:29:33 -06:00
OBattler
0a6f4e1b87 Slight chipset clean-ups and ported the JMP FAR new recompiler commit from PCem. 2020-03-23 08:50:59 +01:00
nerd73
746b5e42ff Fix a compile-breaking issue 2020-03-01 20:25:49 -07:00
nerd73
111d82fa0c Preliminary VIA Cyrix III emulation 
This adds preliminary emulation of the first-gen Samuel core, used in the VIA Cyrix III CPU, at clock speeds from 66 to 700 MHz. This also moves the 440BX emulation out of the dev-branch.

Things working:
- CPUID
- Windows 98SE
- Timings seem identical between WinChip/W2's integer section and this

Things left to do:
- 3DNow on old dynarec
- Half-speed FPU (currently simulated with WinChip 1 timings instead of WinChip 2)
 2020-03-01 15:06:35 -07:00
OBattler
a9ffc5b8c9 Even more fixes - the 6ABX3 now is fully implemented and works, except for the Super I/O chip. 2020-03-01 00:35:18 +01:00
OBattler
490c04fcae Current WIP code. 2020-02-29 19:12:23 +01:00
TC1995
c884438414 Fixed file version of scamp and corrected the machine.h header. 2020-01-22 17:31:34 +01:00
TC1995
299c47925e Added the SCAMP chipset, onboard AVGA2 and corresponding machine (Commodore SL386SX-25). 2020-01-22 17:26:36 +01:00
David Hrdlička
a575bd7e8b fix more issues reported by coverity 2020-01-15 18:48:22 +01:00
OBattler
e44e60c660 Fixed the fourth batch of problems. 2020-01-15 05:24:33 +01:00
OBattler
932ad5595a Fixed the third batch of problems. 2020-01-15 04:58:28 +01:00
OBattler
af023ff5dd Fixed the second batch of problems 2020-01-15 03:48:33 +01:00
OBattler
ae9f8fb639 Fixed a potential NULL pointer dereference in the SCAT code. 2020-01-15 02:20:55 +01:00
OBattler
8928ef3f66 Fixed an overrun in win/win_ui.c, a few newly introduced bugs, and a warning in the MPU-401 code. 2020-01-15 01:03:54 +01:00
OBattler
f8222dc780 Sanitized a part of the SCAT code. 2020-01-14 21:04:07 +01:00
OBattler
da82e6a5eb Finished the VIA machine. 2020-01-14 02:14:39 +01:00
Melissa Goad
199db4acbe Fixes from OBattler 2020-01-13 18:50:12 -06:00
Melissa Goad
aa73f2215f Preliminary port of PCem's FIC VA-503P motherboard 2020-01-13 18:50:09 -06:00
OBattler
7e8efb29fd Added CPU external cache enable/disable for the SiS 471, SiS 496/497, and Intel 4x0 chipsets. 2019-10-21 03:47:44 +02:00
OBattler
4f2cdf3b39 Redid the SCAT ROMCS handling again (required changes in mem.c/h), fixes #435. 2019-10-19 01:24:42 +02:00
OBattler
6627282efb Implemented software-requested DMA block transfers, fixes #405, and also fixes UMBPCI's DMACHK ISA DMA tests; 
Reworked a few things and re-implemented memory write protection in the SCAT emulation, to require less unusual mappings;
Removed two files that should not be there;
Made sure all graphics cards' memory mappings are mapped as MEM_MAPPING_EXTERNAL;
Added MEM_MAPPING_ROMCS flag to signal that a mapping responds to MEMCS* and made the BIOS and Intel flash mappings use it.
 2019-09-28 17:32:05 +02:00