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66a5b0fb11d277d95d7a7ef172b2ac878f6a2d2c
Commit Graph

214 Commits

Author SHA1 Message Date
RichardG867
6fc0890f23 Remove underscore from Multitech PC500 2021-10-19 12:22:13 -03:00
RichardG867
5d0b068ec0 Remove SiS 5598 machines and code as agreed upon 2021-10-16 20:22:12 -03:00
RichardG867
b6bca8ae60 Remove VT8601 machine per machine_and_kb branch 2021-10-16 19:19:04 -03:00
RichardG867
128f32961d Replace WCF-681 with BCM GT694VA 2021-10-16 19:18:09 -03:00
OBattler
bb4590a738 Added the Multitech PC-500, closes #1275. 2021-09-14 15:45:23 +02:00
Lubomir Rintel
f482ad54f6 Add the Victor V86P Machine 
This is a portable computer based around 80C86 processor and Chips &
Technologies chip set. It features a 640x200 monochromatic LCD display,
and up to two 720k 3.25" floppy drives.

It can optionally contain a hard drive controller along with 20M 3.25" MFM
hard drive in place of one floppy drives, which is not emulated yet.
Also not emulated is the expanded memory over 640K.

At least two versions of BIOS have been seen in the wild -- one from
89/09/04 another from 09/12/20.

The MD5 checksums of the ROM images (a pair of chips for each BIOS versions
and a character ROM) are as follows:

  SHA1(ce39ab220de25bbd824dbd5c7411c88f3a8d7430) =
  roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_090489_Even.rom

  SHA1(9b374cf5aa48186577293c3a83250cdc1aed7c9a) =
  roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_090489_Odd.rom

  SHA1(57015c8b85aecb10890d4ddd4a0d133e1ba4ca49) =
  roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_122089_Even.rom

  SHA1(1d3217e9fde7410167cd462ad82b360bf546b9d0) =
  roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_122089_Odd.rom

  SHA1(59ff86fcfea479b02075c32da12c6c1579d71df5) =
  roms/machines/v86p/v86pfont.rom
 2021-09-07 21:34:18 +02:00
RichardG867
d61e3b1e94 Add AMR bus for optional AC97 audio on CUV4X-LS 2021-07-30 00:17:49 -03:00
OBattler
949dea3524 Added IBM PCjr cartridge support. 2021-07-29 20:34:55 +02:00
Daniel Gurney
f2cd3756dd Revert "Merge branch 'feature/machine_and_kb' into master" 
This reverts commit 6604a29d7e, reversing
changes made to 1d7fca0abd.
 2021-07-04 18:22:52 +03:00
OBattler
15279e4964 Finished the ALi M15xx and removed from Dev branch. 2021-07-01 01:43:59 +02:00
OBattler
fd4817a87b All the current WIP work (warning: the PIT is currently using some temporary test rewrite that is going to be undone). 2021-06-29 19:11:19 +02:00
TC1995
3c95cd4cd5 Added the PS/2 model 80 type 3 machine. 2021-06-15 17:38:31 +02:00
RichardG867
62afe31757 Remove EBGA368 due to poor research (CPUs are Samuel 2 and newer only) 2021-06-03 16:26:08 -03:00
RichardG867
b5a295e91d Continuing the game port overhaul: added support for Super I/O game ports not being broken out 2021-06-03 16:26:07 -03:00
Panagiotis
0571bdc006 Removed the IBM PS/2 Model 70. Replaced with the Olivetti 486 2021-05-04 11:24:55 +03:00
Panagiotis
aae4163a8e Removed the PS/1 Model 2133. Introduced the Siemens D824. 2021-05-02 10:33:45 +03:00
OBattler
33df3f7c51 The 386DX/486 and Slot 1/2 combined CPU socket machines are now in their own groups. 2021-05-01 05:41:19 +02:00
OBattler
8044fced2d Split the 486 machines into three groups. 2021-05-01 02:32:35 +02:00
OBattler
278b73e339 Fixed the VLSI 82c480 chipset and removed the HP Vectra 486 from the Dev branch. 2021-04-28 08:59:52 +02:00
Alexander Babikov
66d09a189a Properly remove the FIC VIP-IO2 from the dev branch 2021-04-26 00:35:56 +05:00
Panagiotis
ba92f1df34 Finalize the SiS Pentiums 
- Implemented the SiS 5511
- The SiS 5571 can safely go off Dev Branch now
- Few fixes on the SiS 5598
 2021-04-25 13:23:41 +03:00
Panagiotis
11d4f18cfe SiS 5598 Implementation. 2021-04-21 21:54:23 +03:00
OBattler
17c3056681 Finished fixing the VIA chipset required for the FIC VIP-IO2, added a version of the W83787F Super I/O chip with secondary IDE, fixed the W83787F IDE handler, made AT NVR initialize with 0xff rather than 0x00 by default (which is actually correct), and removed the FIC VIP-IO2 from the Dev branch. 2021-04-20 03:24:30 +02:00
RichardG867
4a41e4d486 De-underscore PowerMate V, OpenAT and OpenXT 2021-04-17 19:23:22 -03:00
RichardG867
ec9b5cae73 Part 2 of The De-Underscoring: function names, ROM paths and some indentation cleanups 2021-04-17 17:12:02 -03:00
nerd73
a4f16a799e Add the TMC PAT54PV 
An ISA/VLB Socket 5 machine. Also makes KBC command A0 return 0x28 then 0 so that the BIOS can function.
 2021-04-09 20:24:47 -06:00
OBattler
3747c7f7fa Added the Compaq Presario 2240, closes #1207. 2021-04-07 02:14:01 +02:00
F10Setup
b9c67a71aa Renamed the 6571 to the 6573 2021-04-06 09:56:17 +03:00
Miran Grča
091b45c104 Merge branch 'master' into master 2021-04-06 07:24:30 +02:00
OBattler
afa73c5bd6 Removed the MSI MS-6198 that was not supposed to be there. 2021-04-06 07:18:53 +02:00
OBattler
0415351497 Added the Super PC/Turbo TX, ASUS P/I-486SP3, ASUS PVI-486SP3C, PC Partner MB520N, MSI MS-6168, and Packard bell Bora Pro. 2021-04-06 07:17:38 +02:00
Panagiotis
5d68fa68c0 Implemented the OPTi 822 VLB to PCI bridge 
Needed for early OPTi Pentium's but also 486's like the Packard Bell PB450 PCI. IRQ routing is hacking though!!
 2021-04-05 22:28:04 +03:00
Panagiotis
d73011cd4c Early implementation of the Intel 450KX 
450GX & 450KX are the first chipsets intended for the i686 era of processors. Mostly they were used on workstations and servers but also a few general boards. This is an early implementation, not complete due to 86Box limitations in terms of memory handling.
 2021-03-28 21:06:06 +03:00
Miran Grča
92a5e09659 Merge pull request #1329 from F10Setup/master 
Added the ValuePoint's on-board video
 2021-03-25 21:36:46 +01:00
F10Setup
590ab0983a Added the ValuePoint's on-board video 2021-03-25 11:01:57 +02:00
Panagiotis
050c16424c Seperated the UMC 8886, Added the UMC 8890 2021-03-25 11:01:54 +02:00
Panagiotis
b63a20c109 Added the ECS Elite UM8810PAIO 
A Phoenix based UMC 486 PCI board
 2021-03-16 13:55:43 +02:00
Panagiotis
7c6e5bda4a First batch implementation of the UMC HB4 chipset 2021-03-13 11:44:07 +02:00
Panagiotis
1136e2b715 Implemented the VIA EBGA 368 platform 2021-02-22 11:40:48 +02:00
EngiNerd89
56f794e66c Merge branch 'master' of https://github.com/86Box/86Box.git into EngiNerd 2021-02-11 20:10:43 +01:00
EngiNerd89
a2c53e1a94 Re-added fully complete and working Olivetti and NCR 386SX-class machines. 
Moved Olivetti M290 to dev branch.
(Very) partially implemented Olivetti EVA gate array (used in M290).
 2021-02-11 19:07:24 +01:00
RichardG867
976e8ca273 Un-devbranch STPC 2021-02-08 17:15:09 -03:00
EngiNerd89
f026ac6eea Merge branch 'master' of https://github.com/86Box/86Box.git into EngiNerd 2021-02-07 00:24:21 +01:00
EngiNerd89
b7e2e239e8 Added chipset and xta interface to Philips machines. 
Major refactoring.
 2021-02-06 23:58:39 +01:00
Miran Grča
8200ef5db6 Revert "Added new NCR and Olivetti machines" 2021-01-25 19:30:45 +01:00
EngiNerd89
6f5f3530b1 Removed duplicated function headers 2021-01-23 19:11:55 +01:00
EngiNerd89
2bac676e70 Merge branch 'master' of https://github.com/86Box/86Box.git into EngiNerd 2021-01-23 19:03:36 +01:00
EngiNerd89
ec929b455e Improved memory management of Olivetti machines. 
Added On-board video card for NCR 3302
 2021-01-23 17:59:02 +01:00
Panagiotis
b465a6a3ec Added an AMI ALi M1489 board 
This includes also the Goldstar Prime3B Super I/O
 2021-01-20 13:37:39 +02:00
EngiNerd89
a4de9d514b Implemented some Olivetti M300-family machines. 
Implemented NCR PC916SX
Implemented PC87310 SuperIO
 2021-01-17 14:39:45 +01:00