Commit Graph

128 Commits

Author SHA1 Message Date
TC1995
63b5e7e052 MCA Cirrus 2401 fix.
Eliminate the 2401 display error on MCA machines using the Cirrus cards.
2023-08-17 17:50:36 +02:00
OBattler
f7b5a566cb Added the OPTi 82c602, on-board CL-GD 5430, and also gave the PC87306 Super I/O chip its full NVR capabilities, fixes #2877. 2023-08-15 06:45:02 +02:00
Jasmine Iwanek
02e41927e3 Dribs and drabs which have escaped 2023-08-12 13:07:00 -04:00
Jasmine Iwanek
81bb5e564b Better fallthrough annotation macro. 2023-08-09 20:09:36 -04:00
Jasmine Iwanek
167146a5c4 sonarlint vid_cl54xx.c 2023-08-09 16:41:54 -04:00
OBattler
c30d5d90b7 PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable. 2023-08-07 03:04:52 +02:00
Jasmine Iwanek
ee695e71f9 More sonarlint work 2023-07-25 17:59:22 -04:00
Jasmine Iwanek
d1127e68fa Even more sonarlint work 2023-06-04 23:39:14 -04:00
OBattler
018c9ca39b Fixed the VRAM size on the Reply MCA Cirrus Logic card. 2023-04-16 23:44:45 +02:00
Cacodemon345
7898109b66 Add SVGA multi-monitor support
Cirrus Logic CL-GD5436/CL-GD5446 works as secondary video adapters
2023-01-22 16:50:21 +06:00
Jasmine Iwanek
1860700eab Fix some small issues 2023-01-07 17:02:23 -05:00
Cacodemon345
d4ed4a57df cl54xx: Device ID remains constant and read only 2022-12-21 15:41:11 +06:00
Cacodemon345
82c9ce1d21 CL-GD5436 leaves GR0 and GR1 untouched 2022-12-21 15:10:19 +06:00
Cacodemon345
261e20ba73 cl54xx: clear GR1 and GR0 when disabling enabled extensions 2022-12-21 14:35:56 +06:00
Cacodemon345
e6a87f3c3f cl54xx: clear only FLAG_EXT_WRITE and FLAG_ADDR_BY16 2022-12-21 11:21:48 +06:00
Jasmine Iwanek
aa2c07bed2 Random header cleanups I noticed while porting things 2022-11-05 22:12:35 -04:00
OBattler
8b63f5995e Correctly clear all extensions when extended write modes are disabled, fixes #2800. 2022-11-06 00:15:30 +01:00
Jasmine Iwanek
883e7c256a clang format in src/video (#2654) 2022-08-31 20:19:29 -03:00
TC1995
fc48e5a284 Fixed the rom loading of the boca cirrus 5428 bios. 2022-07-30 21:55:41 +02:00
Jasmine Iwanek
43339bd44a Add orchid varients of the GD5430 and 5434 2022-07-29 00:40:49 -04:00
Jasmine Iwanek
ac68a2e5ee Boca Reseach 4610 2022-07-27 19:09:42 -04:00
Cacodemon345
3d9f0b560c Add Reply Video Adapter for MCA (Cirrus CL-GD5426) 2022-07-26 01:06:40 +06:00
OBattler
1d0177289a PCI graphics cards initialization fixes. 2022-07-19 00:15:25 +02:00
Cacodemon345
8a3367ff6f Multi-monitor support (backend preparation part) 2022-07-03 01:18:23 +06:00
Alexander Babikov
710d34db97 Remove unused variables and functions 2022-04-14 07:13:50 +05:00
Jasmine Iwanek
d28cec126a src/video 2022-04-12 17:26:07 -04:00
Jasmine Iwanek
3b73ce330c src/video 2022-03-18 18:07:09 -04:00
Jasmine Iwanek
801f81fbda clean up device_config_t formatting 2022-02-26 23:31:28 -05:00
Jasmine Iwanek
4674756664 More newline and whitespace cleanups 2022-02-20 16:26:40 -05:00
OBattler
6f2b93923c A lot of fixes - everything now seems to work properly. 2022-02-03 03:10:06 +01:00
Jess Lovelace
8d962bef15 yet another fix commit 2022-02-02 16:31:23 -05:00
Jess Lovelace
f18615ae87 refactored device_t and all declarations 2022-02-02 16:31:22 -05:00
RichardG867
5af0db8075 Fix ROM filename casing 2021-11-21 13:33:22 -03:00
RichardG867
447269eb39 Machine table and ROM fixes and cleanups 2021-11-21 13:17:30 -03:00
OBattler
3cdcf010f2 Fixed the Commodore 386X-25 on-board CL-GD 5402 ROM path. 2021-11-19 15:26:32 +01:00
TC1995
e29dafa17a Changes list 5:
Added the AT&T 2xc498 Precision RAMDAC.
Added 1MB configurations to the Cirrus Logic GD5434 as well as re-organized the memory size options of the other Cirrus cards.
Separated the et4000w32/i blitter from the standard et4000w32p blitter and properly implemented the X/Y Count route.
Added several Diamond Cirrus cards.
Added Number Nine S3 cards (868 and 968-based).
Fixed the WD90c30 1MB modes.
Re-organized the video card names.
2021-11-18 23:58:04 +01:00
OBattler
3d5096753d Fixed the Cirrus Logic CL-GD 54xx reset handler to avoid excess mapping disables on non-PCI cards. 2021-10-07 15:44:56 +02:00
OBattler
66db0f11a4 Implemented reset handlers for Cirrus, S3, and S3 ViRGE cards. 2021-10-07 01:15:02 +02:00
TC1995
49d86a5004 Removed code that is not ready yet. 2021-07-12 22:19:20 +02:00
TC1995
fd5ac14f26 Fixed scrolling anomalies in the EGA and SVGA card cores for Commander Keen to work right without glitches. 2021-07-12 22:12:27 +02:00
Daniel Gurney
f2cd3756dd Revert "Merge branch 'feature/machine_and_kb' into master"
This reverts commit 6604a29d7e, reversing
changes made to 1d7fca0abd.
2021-07-04 18:22:52 +03:00
OBattler
fd4817a87b All the current WIP work (warning: the PIT is currently using some temporary test rewrite that is going to be undone). 2021-06-29 19:11:19 +02:00
TC1995
dd8559f851 Cleared svga->fast when appropriate so that word writes can be executed right, fixes graphical glitches under Win95 using the 5422/5424. 2021-06-17 19:07:51 +02:00
TC1995
a8f86df2a5 Properly fix the by16 addressing of the Cirrus 542x. 2021-05-31 13:53:44 +02:00
TC1995
963b530d10 Ported the Cirrus by16 fix. 2021-05-30 23:40:56 +02:00
TC1995
7a3e98b1e5 One more fix for the Cirrus. 2021-05-30 02:56:51 +02:00
TC1995
35b5301670 Fix build headers and dumb cirrus undeclared parts. 2021-05-30 02:01:16 +02:00
TC1995
d63ce5ab82 Port of the reworked svga memory addressing, normal chain4 mapping and ma13/14 mapping for non-CGA modes.
Fixed ET4000/W32 (without letters) hardware cursor.
Fixed non-interlaced 1280x1024x8bpp Cirrus mode in the 5434.
Added a note regarding the Radius (HT209) 8bpp render.
Reworked the TGUI9440, but still WIP.
2021-05-30 01:52:43 +02:00
RichardG867
7881dadd5c Add DPMS support to Cirrus Logic 2021-04-14 17:04:08 -03:00
David Hrdlička
dfbbe08a07 rewrite the emulator to use UTF-8 internally 2021-03-30 09:46:49 +02:00