OBattler
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95e98b1b20
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Added the two Silicon Valley machiens and fixes 386 FPU flag on reset.
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2025-08-14 16:29:09 +02:00 |
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Jasmine Iwanek
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a96146742e
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Fix another warn in 808x.c
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2025-07-28 01:52:40 -04:00 |
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Jasmine Iwanek
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6d6d5931bf
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Fix several codeql warns
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2025-07-27 20:59:55 -04:00 |
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Cacodemon345
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916533499a
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Add 10ms interval option (not exposed yet to UI)
Fix percentage counter
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2025-07-09 12:59:16 +06:00 |
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Cacodemon345
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ddea070faa
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Fix cycle period of dynarec
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2025-07-08 16:51:53 +06:00 |
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OBattler
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773ebf6254
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Fix V20/V30 CPU speeds.
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2025-07-08 05:59:04 +02:00 |
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OBattler
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42c0077703
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808x: Suspend trap for 1 instruction after POPF and do not do it after IRET.
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2025-07-08 05:21:44 +02:00 |
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OBattler
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a2354599c6
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Vx0: Always resume from interrupt on HLT, even if I_FLAG is not set.
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2025-07-08 05:08:23 +02:00 |
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OBattler
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4a468246cc
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808x: Rename wait() to wait_cycs() to avoid conflict with the Apple SDK.
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2025-06-30 00:52:00 +02:00 |
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OBattler
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ad5aa6e52f
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Attempt to undefine wait to avoid the conflicts on Mac.
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2025-06-30 00:18:59 +02:00 |
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OBattler
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e601f25805
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x87: Fix the rounding_modes warnings.
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2025-06-30 00:17:33 +02:00 |
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Cacodemon345
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b44042ef1c
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x86-specific FADD (SSE2 version)
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2025-06-30 02:08:48 +06:00 |
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Cacodemon345
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96734590ca
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x86-specific FADD implementation
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2025-06-30 01:10:58 +06:00 |
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Jasmine Iwanek
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026f765495
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Some codeql fixes
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2025-06-29 00:12:06 -04:00 |
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Jasmine Iwanek
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3a26b9d46b
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Many warning fixes
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2025-06-28 23:54:07 -04:00 |
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OBattler
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25f0a26ea1
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Vastly improve the ALi M1409 emulation (all of shadow RAM now work, as does bus speed and external cache setting), and fix the "Writing unimplemented Cyrix register FF" error as well.
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2025-05-29 09:45:49 +02:00 |
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OBattler
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b3147ee473
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LOCK instruction: ensure it is always illegal on opcodes 90h and ECh.
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2025-05-18 02:20:18 +02:00 |
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OBattler
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ddd271f6ee
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Honore the fixed bits of flags when pushing them to the stack, fixes #5093.
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2025-05-17 21:02:06 +02:00 |
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OBattler
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a0b80e04cd
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Remove the unused mmu_perm stuff.
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2025-05-06 03:18:46 +02:00 |
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OBattler
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1e81473d34
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Fix MMX_ENTER() exceptions.
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2025-05-05 05:59:20 +02:00 |
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OBattler
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9b93e71b23
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#included the missing plat_fallthrough.h.
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2025-04-27 18:57:21 +02:00 |
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OBattler
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5b4db319bf
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Opcode D6 is now an alias of opcode D7 (XLAT) on NEC Vx0, closes #5516.
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2025-04-27 18:50:45 +02:00 |
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Cacodemon345
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e076c1051d
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Fix x87_op being outside of structure, fixing crashes in ARM64 NDR
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2025-04-26 23:23:34 +06:00 |
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OBattler
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b15f25ffa4
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Fixed old recompiler compiling in a kludgy way because it appears there's no STORE_IMM_ADDR_W.
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2025-04-22 09:46:58 +02:00 |
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OBattler
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8790395a05
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Fix the FXSAVE/FXRSTOR instructions.
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2025-04-22 09:13:38 +02:00 |
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Miran Grča
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a434a98495
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Merge pull request #5455 from Torinde/patch-3
VIA Cyrix III (Samuel) - add codename
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2025-04-21 02:28:23 +02:00 |
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OBattler
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8aa15fa21f
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The update value handler should be at Pentium Pro, not Cyrix Cx6x86.
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2025-04-11 20:27:41 +02:00 |
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OBattler
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95a6aa0bdf
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Fix the LxS fix again.
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2025-04-11 19:29:40 +02:00 |
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Torinde
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9032af002d
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VIA Cyrix III (Samuel) - add codename
To distinguish from Cyrix-heritage Joshua CPUs. #5451
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2025-04-09 12:17:50 +02:00 |
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OBattler
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3b5966eb46
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LDS/LES/LFS/LGS/LSS: Fix segment wraparounds in 16-bit address mode.
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2025-04-07 06:03:19 +02:00 |
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RichardG867
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4bd374a7df
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Don't apply the Deschutes cacheability fix to Covington
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2025-04-02 16:55:57 -03:00 |
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RichardG867
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f56f636248
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Report 4 GB cacheable memory on Deschutes CPUs, fixes modern Linux limiting itself to 512 MB on some machines
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2025-04-02 16:27:10 -03:00 |
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Cacodemon345
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abbae5efd2
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Cleanups
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2025-03-26 23:18:36 +06:00 |
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Cacodemon345
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ad4e90e345
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Finally fix RETEM
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2025-03-26 23:01:09 +06:00 |
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Cacodemon345
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2b107725bd
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Custom NMI handling for i8080 emulation
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2025-03-26 20:17:13 +06:00 |
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Cacodemon345
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99e8d13afa
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Implement NEC V20/V30's i8080 emulation mode
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2025-03-26 20:04:43 +06:00 |
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OBattler
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609f34cc49
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Only flush write MMU cache on WP flag toggle as read and execute MMU cache is not affected by the flag.
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2025-03-23 15:36:05 +01:00 |
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Cacodemon345
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a9c97abfb6
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Pre-calculate pow table for FXTRACT instruction
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2025-03-20 21:52:48 +06:00 |
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OBattler
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2cd99f0c70
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X86 segmentation: apparently, the CPU can execute a data segment in some cases, used by LINK and CodeView, fixes #5283.
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2025-03-19 07:54:54 +01:00 |
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OBattler
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395f23cf57
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More Cyrix fixes.
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2025-03-19 03:12:36 +01:00 |
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OBattler
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70dcdee72b
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Some Cyrix MII table/ID fixes and added some Cyrix CPU blocking for the NuPRO 592 and the P5MMS98.
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2025-03-18 19:21:00 +01:00 |
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OBattler
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79134f3b21
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Assorted Cyrix (and Codegen opcode Mod R/M passing table) fixes - fixes Windows 98 SE on Cyrix 6x86's with power management enabled.
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2025-03-17 03:40:52 +01:00 |
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OBattler
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dd4e493f64
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Applied the fix to the optional 486 implementation as well.
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2025-03-17 00:07:41 +01:00 |
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OBattler
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52a16529dc
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386 Interpreter: Fix execute breakpoints.
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2025-03-16 23:54:55 +01:00 |
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OBattler
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9f200fe2e8
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386 Interpreter: Check for debug breakpoint before segment limit and presence checking.
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2025-03-16 21:20:15 +01:00 |
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Miran Grča
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3058acff0c
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Merge pull request #5358 from Cacodemon345/x87-fpu-interpreter
Use `fpclassify` for FXAM instead of manual comparison
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2025-03-16 18:40:23 +01:00 |
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OBattler
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1c5d432d3c
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Disable special segment selector pushing behavior on Pentium onwards, fixes MSVC builds of ReactOS.
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2025-03-16 18:37:32 +01:00 |
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Cacodemon345
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271a125301
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Use fpclassify for FXAM instead of manual comparison
NaN detection for interpreter floating point compare on ARM64
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2025-03-16 23:33:40 +06:00 |
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OBattler
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aef06552fb
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Some missing breaks in the Cyrix register writes.
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2025-03-14 15:34:37 +01:00 |
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OBattler
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78f50c5b04
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Move the Cyrix 6x86 out of the Dev branch.
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2025-03-06 00:17:16 +01:00 |
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