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516 Commits

Author SHA1 Message Date
OBattler
2ad7b7c345 Fixed the C&T 82C100 hardware EMS implementation and increased the V86P's maximum RAM to 1 MB. 2021-09-08 01:49:31 +02:00
Miran Grča
c5864a46d8 Merge pull request #1676 from 86Box/master 
Bring the branch up to par with master.
 2021-09-08 00:08:23 +02:00
Lubomir Rintel
f482ad54f6 Add the Victor V86P Machine 
This is a portable computer based around 80C86 processor and Chips &
Technologies chip set. It features a 640x200 monochromatic LCD display,
and up to two 720k 3.25" floppy drives.

It can optionally contain a hard drive controller along with 20M 3.25" MFM
hard drive in place of one floppy drives, which is not emulated yet.
Also not emulated is the expanded memory over 640K.

At least two versions of BIOS have been seen in the wild -- one from
89/09/04 another from 09/12/20.

The MD5 checksums of the ROM images (a pair of chips for each BIOS versions
and a character ROM) are as follows:

  SHA1(ce39ab220de25bbd824dbd5c7411c88f3a8d7430) =
  roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_090489_Even.rom

  SHA1(9b374cf5aa48186577293c3a83250cdc1aed7c9a) =
  roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_090489_Odd.rom

  SHA1(57015c8b85aecb10890d4ddd4a0d133e1ba4ca49) =
  roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_122089_Even.rom

  SHA1(1d3217e9fde7410167cd462ad82b360bf546b9d0) =
  roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_122089_Odd.rom

  SHA1(59ff86fcfea479b02075c32da12c6c1579d71df5) =
  roms/machines/v86p/v86pfont.rom
 2021-09-07 21:34:18 +02:00
OBattler
d30ad04a88 UMC UM88xx fixes, ALi M1429 documentation, and added the DataExpert 386SX, PC Chips M919, Samsung SPC7700P-LW, and Acrosser AR-B1423C. Also renamed the ALi M1429G AMI WinBIOS 486 to Kaimei 486. 2021-08-24 21:11:00 +02:00
OBattler
67367798a7 Merged various SMC FDC67C6xx Super I/O chips into one file, re-added the UMC88xx 486 chipsets (and four machines for it) based on work by tiseno100 and my own work, various other fixes, and added quite a few machines (including the AOpen AP5VM which now works), also added the remaining ALi M6117 machine (Protech SBC with Award BIOS), and made the Intel Advanced/ATX's on-board S3 Trio64V+ work, as well as the on-board S3 Trio64/V2 of the two Compaq Presarios. 2021-08-21 18:19:10 +02:00
OBattler
df00d0ac58 Added three ALi M1487/89 machines and that 430VX machine with Award 4.50PG BIOS. 2021-08-07 12:28:33 +02:00
OBattler
5ecf3ac6cb Merged the ALi M1217 into the M6117 (that's based on the M1217), moved the M6117 out of the Dev branch, removed the broken M6117 Acrosser, and added three M1217 machines. This finishes the ALi work. 2021-08-05 18:16:17 +02:00
OBattler
5b81bad4e8 And a restoration. 2021-08-04 09:19:21 +02:00
OBattler
66da8a9905 And another. 2021-08-04 09:14:47 +02:00
Miran Grča
8ca1328c7e Merge pull request #1571 from 86Box/master 
Bring the branch up to par with master.
 2021-08-02 06:58:22 +02:00
RichardG867
d61e3b1e94 Add AMR bus for optional AC97 audio on CUV4X-LS 2021-07-30 00:17:49 -03:00
RichardG867
4c307fd945 Merge branch 'master' of https://github.com/86Box/86Box into feature/savquest 2021-07-29 20:00:30 -03:00
OBattler
949dea3524 Added IBM PCjr cartridge support. 2021-07-29 20:34:55 +02:00
RichardG867
b2b2120d8f Merge branch 'master' of https://github.com/86Box/86Box into feature/savquest 2021-07-18 16:33:09 -03:00
OBattler
38e4ba61b5 Limited the speeds of the Olivetti M19 to a maximum of 7.16 MHz since evidently our version of the BIOS does not support 8 MHz at all. 2021-07-15 20:09:24 +02:00
OBattler
8c4d08e9df A number of machine fixes and PIT clock (crystal/bus speed) and CPU are now initialized before everything else, fixes Olivetti M19 with 8088 4.77 MHz and also fixes switching between 286/386SX and 386DX+ machines. 2021-07-15 20:03:19 +02:00
OBattler
dbddb3e309 Finished the ALADDiN-PRO II, implemented the Contaq/Cypress 82C596(A) and 82C597 chipsets, added the ASUS P5A, Gigabyte GA-5AX, PC CHIPS M729, and Green-B, removed the "Virtual PC 2007" device as it turns out it was actually SMBus all along, did some fixes to the ALi SMBUS, fixed start LM75 SMBus address and enabled it by default, and added a ASUS P5A-specific version of the Winbond W83781D hardware monitor. 2021-07-12 05:56:06 +02:00
RichardG867
b9c68bf277 Initial commit for AC97 2021-07-11 16:58:52 -03:00
OBattler
a896953dd5 Current WIP ALi work. 2021-07-04 18:16:35 +02:00
OBattler
4f6df76f10 Revert "Revert "Merge branch 'feature/machine_and_kb' into master"" 
This reverts commit f2cd3756dd.
 2021-07-04 17:40:39 +02:00
Daniel Gurney
f2cd3756dd Revert "Merge branch 'feature/machine_and_kb' into master" 
This reverts commit 6604a29d7e, reversing
changes made to 1d7fca0abd.
 2021-07-04 18:22:52 +03:00
Miran Grča
6604a29d7e Merge branch 'feature/machine_and_kb' into master 2021-07-04 16:57:06 +02:00
OBattler
1d7fca0abd GW286 GEAR fixes. 2021-07-04 16:55:04 +02:00
OBattler
15279e4964 Finished the ALi M15xx and removed from Dev branch. 2021-07-01 01:43:59 +02:00
OBattler
fd4817a87b All the current WIP work (warning: the PIT is currently using some temporary test rewrite that is going to be undone). 2021-06-29 19:11:19 +02:00
TC1995
3c95cd4cd5 Added the PS/2 model 80 type 3 machine. 2021-06-15 17:38:31 +02:00
RichardG867
62afe31757 Remove EBGA368 due to poor research (CPUs are Samuel 2 and newer only) 2021-06-03 16:26:08 -03:00
RichardG867
b5a295e91d Continuing the game port overhaul: added support for Super I/O game ports not being broken out 2021-06-03 16:26:07 -03:00
Panagiotis
0571bdc006 Removed the IBM PS/2 Model 70. Replaced with the Olivetti 486 2021-05-04 11:24:55 +03:00
Panagiotis
78b2f7c9fb Memory changes and SIO done according to the Intel Classic R 2021-05-02 13:48:18 +03:00
Panagiotis
aae4163a8e Removed the PS/1 Model 2133. Introduced the Siemens D824. 2021-05-02 10:33:45 +03:00
OBattler
33df3f7c51 The 386DX/486 and Slot 1/2 combined CPU socket machines are now in their own groups. 2021-05-01 05:41:19 +02:00
OBattler
8044fced2d Split the 486 machines into three groups. 2021-05-01 02:32:35 +02:00
OBattler
278b73e339 Fixed the VLSI 82c480 chipset and removed the HP Vectra 486 from the Dev branch. 2021-04-28 08:59:52 +02:00
Alexander Babikov
66d09a189a Properly remove the FIC VIP-IO2 from the dev branch 2021-04-26 00:35:56 +05:00
Panagiotis
ba92f1df34 Finalize the SiS Pentiums 
- Implemented the SiS 5511
- The SiS 5571 can safely go off Dev Branch now
- Few fixes on the SiS 5598
 2021-04-25 13:23:41 +03:00
Panagiotis
11d4f18cfe SiS 5598 Implementation. 2021-04-21 21:54:23 +03:00
OBattler
17c3056681 Finished fixing the VIA chipset required for the FIC VIP-IO2, added a version of the W83787F Super I/O chip with secondary IDE, fixed the W83787F IDE handler, made AT NVR initialize with 0xff rather than 0x00 by default (which is actually correct), and removed the FIC VIP-IO2 from the Dev branch. 2021-04-20 03:24:30 +02:00
RichardG867
4a41e4d486 De-underscore PowerMate V, OpenAT and OpenXT 2021-04-17 19:23:22 -03:00
RichardG867
ec9b5cae73 Part 2 of The De-Underscoring: function names, ROM paths and some indentation cleanups 2021-04-17 17:12:02 -03:00
RichardG867
1e21629523 Limit PCjr to 4.77 MHz the proper way 2021-04-17 16:47:52 -03:00
RichardG867
d0d73b7ef5 Revert "The IBM PCjr is now limited to 8088 4.77 MHz, closes #1379." 
This reverts commit d060a38d91.

# Conflicts:
#	src/machine/machine_table.c
 2021-04-17 16:46:04 -03:00
RichardG867
dcbf4b5729 Merge branch 'master' of https://github.com/86Box/86Box 2021-04-17 16:43:32 -03:00
RichardG867
120fc553b0 Machine table limit cleanup, based on research into potentially undocumented jumper combinations 2021-04-17 16:43:25 -03:00
OBattler
ad3c3a3c6d Fixed a compile-breaking mistake in machine/machine_table.c. 2021-04-17 04:47:12 +02:00
OBattler
4989d99c1b Merge branch 'master' of https://github.com/86Box/86Box 2021-04-17 04:45:55 +02:00
OBattler
d060a38d91 The IBM PCjr is now limited to 8088 4.77 MHz, closes #1379. 2021-04-17 04:45:28 +02:00
RichardG867
023917f8c0 Fix machine table indentation 2021-04-16 16:20:46 -03:00
nerd73
8e3b09f323 Various 486 improvements 
- Added SL-Enhanced versions of Intel 486 CPUs and Enhanced AMD Am486DX2/DX4 CPUs
- Cleaned up the 486 CPU types and updated intel_4x0.c to reflect this
- Fixed some incorrect EDX reset and CPUID values
- Blacklisted non-SMM capable 486 CPUs on the Soyo 4SA2 motherboard
- Merged the non-OverDrive and OverDrive Intel DX4s because of further research confirming them to be functionally identical
- Removed SMM support on early 486 CPUs
 2021-04-15 21:38:03 -06:00
OBattler
3746b722c7 The two 486 machines with on-board SCSI controllers now have the MACHINE_SCSI flag. 2021-04-13 18:57:01 +02:00