Commit Graph

55 Commits

Author SHA1 Message Date
win2kgamer
0c4be448e8 Fix BIOS loading for the Dell Dimension XPS P60 2025-08-27 18:03:13 -05:00
OBattler
a3f5ea358f Machine mergers and added the Olivetti PCS 44/C. 2025-08-26 18:00:25 +02:00
OBattler
a11dfd5025 The first batch of machine file updates. 2025-08-23 00:13:05 +02:00
OBattler
28e7f86296 Added the Sanyo MBC-17, Sharp AX 286, ECS Socket 4 machine, LG Multinet x52, and Taken Socket 4/5 machine, also IDE PIO mode 3+ fixes, and ATA-3 IDE drives now default to PIO mode 3 maximum instead of 0. 2025-08-15 20:59:07 +02:00
OBattler
d2c8dab342 Finished the great internal machine reorganization and added the FIC PO-6000. 2025-08-13 23:43:51 +02:00
OBattler
dbd748636e Hook up Bidirectional LPT, EPP, and ECP to all Super I/O chips (missing is vendor-specific Configuration Register B behavior but that's next on my list), fixed Super I/O chip mistakes for a number of machines, split 286/386SX/M6117D machines into three separate files and reordered them as well. 2025-08-11 16:36:30 +02:00
OBattler
0637b316ad Added keyboard type selection. 2025-07-27 15:23:43 +02:00
rushieda
143639ad88 BIOS version switcher fixes and improvements on available machines 2025-07-14 16:28:02 +03:00
OBattler
979eb934a8 Acer V12P: Remove on-board SCSI. 2025-06-29 06:42:51 +02:00
toggo9
034902ee5e another V12P fix (to make compile possible again) 2025-06-28 21:35:46 +02:00
toggo9
bbf90d857e Move the Acer V12P code. 2025-06-28 20:48:50 +02:00
toggo9
9e3b4c2c08 Add Acer V12P machine code. 2025-06-28 20:46:37 +02:00
Miran Grča
c58ef2be81 IBM PS/ValuePoint P60: Remove RZ-1000 - primary IDE is controlled by the Super I/O chip, fixes #5628. 2025-05-25 11:03:21 +02:00
OBattler
e083daf4bb Fix on-board audio on the GXL and the jumpers on the XPS P60 and 560/L. 2025-05-24 06:17:16 +02:00
OBattler
baba4b704f PS/ValuePoint P60: Only primary IDE, in accordance with the IBM hardware reference. 2025-05-07 19:49:03 +02:00
OBattler
04a92704d1 And the PS/ValuePoint P60 as well. 2025-05-07 19:42:18 +02:00
OBattler
44376db7f2 Ambra DP60: It is the original Batman, so no RZ-1000, and FDC37C665 controlling primary IDE. 2025-05-07 19:29:15 +02:00
OBattler
c3debc5e27 Implement the RZ-1000 PCI IDE controller needed by some Intel machines. 2025-05-06 03:21:54 +02:00
OBattler
fb449f39a4 Intel Premiere/PCI and Premiere/PCI II: Use a dual-channel IDE controller, fixes #5442. 2025-04-07 07:41:59 +02:00
OBattler
babac31894 Fixed a compile-breaking mistake. 2025-04-02 18:46:35 +02:00
OBattler
98efd05dda Alfredo, Batman's Renvenge, and Plato: Pre-initialize NVR to 0x00 instead of 0xFF and give them the correct Phoenix keyboard controller, fixes hang after the first soft reset. 2025-04-02 18:45:27 +02:00
rushieda
fbd1a16eeb Add the AT&T Globalyst 330 (Pentium/Socket 4) 2025-01-25 00:22:59 +03:00
plant
6ad5a7d836 Merge branch '86Box:master' into master 2025-01-01 15:51:38 -07:00
plant
9b107ebeae Add Micronics M5Pi.
This is a Socket 4 430LX machine using the Phoenix Ax86 BIOS.
Also adds a single channel version of the W83769F to support it's specific IDE setup.
2025-01-01 15:51:12 -07:00
TC1995
ab6756b400 Some machine changes of the day (January 1st, 2025)
1. Added the Award 430NX-based (Socket 5) ASUS P54NP4 with the right configuration.
2. Based on the pictures of the board, the IDE controller is not built-in in the ASUS P5MP3, but on a riser card, iirc, therefore, make IDE optional.
2025-01-01 23:06:19 +01:00
OBattler
a10407a0aa The Gigabyte GA-586IS and GA-586IP now have correctly an AT keyboard controller, fixes #4783. 2024-09-02 00:11:14 +02:00
Jasmine Iwanek
05e7d9239c Standardize fdc_type into fdc_current
Also make it into an array
2024-07-20 14:49:24 -04:00
OBattler
d52b606cec SiS PCI flags corrections. 2024-04-04 03:10:29 +02:00
OBattler
285accae5b Gigabyte 430LX and 430NX machine fixes. 2024-02-02 05:34:38 +01:00
cartifanwlr
9ee49a6977 Machine flag cleanups round 5: Socket 4/5 2024-01-30 15:45:09 +03:00
cartifanwlr
9fcc59e2ca Revert "Rename 586MC1 to GA-586IS"
This reverts commit 3390aa8d03.
2024-01-29 14:36:54 +03:00
cartifanwlr
3390aa8d03 Rename 586MC1 to GA-586IS 2024-01-28 09:19:12 +03:00
Conrad Kostecki
69780ecc02 Intel Premiere/PCI ED: update bios to 1013AF2
This updates the filename to match the newer 1013AF2 BIOS.

Signed-off-by: Conrad Kostecki <conikost@gentoo.org>
2023-12-30 13:59:04 +01:00
Alexander Babikov
39581e9110 Revert a testing change that shouldn't have been there 2023-10-10 13:47:52 +05:00
OBattler
ed4c57e94c Fixed some Intel board CPU switches. 2023-10-10 06:43:07 +02:00
OBattler
b203b28350 Assorted copyright header fixes. 2023-08-14 21:51:47 +02:00
TC1995
f240e8cb0c Video changes:
1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM).
2. Implemented the MCA behalf of the Mach32 and its corresponding reset function.
3. Properly implemented (more or less) true color, including 24-bit BGR rendering
4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color.
5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine.
6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT).
7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB.
8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI.
9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA.
10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode.
11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead.
12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
Jasmine Iwanek
ee695e71f9 More sonarlint work 2023-07-25 17:59:22 -04:00
Jasmine Iwanek
a7236a9022 Make dual video card code use array 2023-02-06 07:29:18 -05:00
Jasmine Iwanek
1860700eab Fix some small issues 2023-01-07 17:02:23 -05:00
Jasmine Iwanek
a40630ba63 Even more tabs to spaces 2023-01-07 14:09:51 -05:00
Jasmine Iwanek
bd75bc141a Header cleanups
Tabs to spaces
Consistency
2022-11-13 21:15:47 -05:00
OBattler
de6a6909e5 The last OPTi 822 fixes. 2022-11-02 05:19:28 +01:00
OBattler
8c0facc3b4 PCI changes for OPTi 82c822 (will also be needed for the ALi M1435). 2022-11-02 04:03:55 +01:00
OBattler
015283e5db Preliminary OPTi 822 rewrite. 2022-10-31 05:44:32 +01:00
Jasmine Iwanek
ff39a77afc clang-format in src/machine 2022-07-27 17:01:04 -04:00
Jasmine Iwanek
6233027c9e Named initializers in machine table 2022-07-19 18:51:18 -04:00
Jasmine Iwanek
4674756664 More newline and whitespace cleanups 2022-02-20 16:26:40 -05:00
Miran Grča
401bb868cd Fixed PB520R ROM loading to also load the forgotten 4096 bytes 2022-02-05 13:34:53 +01:00
OBattler
c0a66022d4 Introduced the NVR hacks to the remaining boards with cache errors. 2021-11-30 00:25:03 +01:00