Jasmine Iwanek
a40630ba63
Even more tabs to spaces
2023-01-07 14:09:51 -05:00
Jasmine Iwanek
ae4f9aedaa
clang-format in src/include/86box/
2022-09-18 17:22:54 -04:00
Adrien Moulin
2aa5d8f5b2
PIT: add alternative faster PIT
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This is enabled by default on 486+ CPUs and can be forced disabled/enabled with pit_mode=0/1
2022-07-23 13:38:10 +02:00
Adrien Moulin
2ed8ad907c
ACPI: replace 3.58MHz timer with an overflow timer
2022-07-15 23:42:40 +02:00
Jasmine Iwanek
7fc893bdb0
Include guards on our headers
2022-02-18 19:42:21 -05:00
Daniel Gurney
f2cd3756dd
Revert "Merge branch 'feature/machine_and_kb' into master"
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This reverts commit 6604a29d7e , reversing
changes made to 1d7fca0abd .
2021-07-04 18:22:52 +03:00
OBattler
fd4817a87b
All the current WIP work (warning: the PIT is currently using some temporary test rewrite that is going to be undone).
2021-06-29 19:11:19 +02:00
OBattler
76f3f08d78
The Intel SIO and PIIX* southbridges now have the undocumented (by the datasheets, but fully documented by the Intel motherboard technical specifications) second PIT on ports 48h-4Bh.
2021-04-13 03:47:46 +02:00
OBattler
4dae3c7338
Slight PIT fixes and optimizations and the forgotten updated Super I/O chip include.
2021-04-06 07:35:03 +02:00
RichardG867
dfee1165ea
Add custom ISA/PCI/AGP clock facility, and fix PIT clock calculation oversight for CPU clocks ending in (but not equal to) 33 and 66 MHz
2021-03-14 19:42:21 -03:00
OBattler
72c1c36ec6
OPTi 5x7 no longer does excess logging, running of timers on the recompiler is now done on every fourth AT KBC port 61h read instead of every 3F4h read, added some safety precautions to io.c to handle the cases where a handler removes itself, implmented the STPC ELCR and refresh control, and fixed the messed up register reading in the PC87307 and PC87309 implementations.
2020-07-10 02:05:49 +02:00
OBattler
275dd5a2f7
ACPI, SMM, and PIIX fixes, fixes quite a few boards, also fixed the Via Apollo series northbridge ID's, some CPU instructions on both 808x and 286+, and added SMM to 486's (Intel and AMD), WinChip and WinChip 2, and VIA Cyrix III, also removed the TC430HX and the Toshiba machine from the Dev branch.
2020-04-16 21:56:19 +02:00
OBattler
61f0ae7954
Better ACPI implementation (currently only on PIIX4/PIIX4E/SMSC southbridges), finished the SMSC southbridge (but the Atrend BIOS still hangs, need to figure out why), and fixed Tandy EEPROM saving.
2020-04-13 20:01:47 +02:00
David Hrdlička
a505894a10
Move all include files to src/include
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- 86Box's own headers go to /86box
- munt's public interface goes to /mt32emu
- all slirp headers go to /slirp (might want to consider using only its public inteface)
- single file headers from other projects go in include root
2020-03-29 19:53:29 +02:00