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a68ac70c470f1ceea09c324cfa1dcd8c2489f35c
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77 Commits

Author SHA1 Message Date
OBattler
da9546c82a Fixed FDC37C665 UART 2 handler and some ALi M1487/89 bugs. 2021-08-12 11:09:24 +02:00
OBattler
bfcc36ac8e Fixed 82091AA Serial port disabling. 2021-08-04 14:46:42 +02:00
RichardG867
3c99788071 More UM8669F semantics stuff 2021-08-03 16:48:15 -03:00
RichardG867
8889e9477f Switch UM8669F dummy device to the more technically correct PNPFFFF 2021-08-03 16:39:46 -03:00
RichardG867
a25eeed228 Improve VIA 686 Super I/O and hardware monitor to match probed hardware behavior 2021-08-03 13:03:33 -03:00
Daniel Gurney
f2cd3756dd Revert "Merge branch 'feature/machine_and_kb' into master" 
This reverts commit 6604a29d7e, reversing
changes made to 1d7fca0abd.
 2021-07-04 18:22:52 +03:00
OBattler
fd4817a87b All the current WIP work (warning: the PIT is currently using some temporary test rewrite that is going to be undone). 2021-06-29 19:11:19 +02:00
OBattler
f0da82fa2b The LG Prime3C no longer calls the IDE handler on register write if it is the variant without IDE. 2021-06-07 00:12:53 +02:00
OBattler
dc6e07a162 SMC FDC73C93x Super I/O chip fixes. 2021-06-07 00:11:45 +02:00
OBattler
80a6f81a97 SM(S)C FDC37M60x Super I/O chip rewrite. 2021-06-07 00:10:56 +02:00
OBattler
368c92780a Added a version of the Winbond W83787F Super I/O chip with IDE enabled by default, fixes IDE on the Flytech 386. 2021-06-03 23:15:34 +02:00
RichardG867
b5a295e91d Continuing the game port overhaul: added support for Super I/O game ports not being broken out 2021-06-03 16:26:07 -03:00
RichardG867
c8c4aac167 ISAPnP tweaks: allow initialization with a null ROM; disable fatals for bad resource data; only change state on enable/disable if a change occurred. 2021-06-03 16:26:05 -03:00
RichardG867
77f311b179 Game port overhaul 2021-06-03 16:26:05 -03:00
RichardG867
1de2e3dd2f Crystal CS4237, part 2 2021-06-03 16:26:04 -03:00
Panagiotis
5129e1e331 Reverted commentary again 2021-05-02 13:48:58 +03:00
Panagiotis
78b2f7c9fb Memory changes and SIO done according to the Intel Classic R 2021-05-02 13:48:18 +03:00
Panagiotis
c1240af39b I copy paste commentaries 2021-05-02 10:35:22 +03:00
Panagiotis
aae4163a8e Removed the PS/1 Model 2133. Introduced the Siemens D824. 2021-05-02 10:33:45 +03:00
OBattler
adb019e2db Corrected the indentation in sio/it8661f.c and disabled the execess logging. 2021-04-29 19:48:24 +02:00
OBattler
8fe4decd95 More PS/1 model 2133 fixes. 2021-04-29 07:36:16 +02:00
Panagiotis
c5be6e3e0a Added the missing IT8661F 2021-04-21 22:05:59 +03:00
OBattler
17c3056681 Finished fixing the VIA chipset required for the FIC VIP-IO2, added a version of the W83787F Super I/O chip with secondary IDE, fixed the W83787F IDE handler, made AT NVR initialize with 0xff rather than 0x00 by default (which is actually correct), and removed the FIC VIP-IO2 from the Dev branch. 2021-04-20 03:24:30 +02:00
OBattler
0415351497 Added the Super PC/Turbo TX, ASUS P/I-486SP3, ASUS PVI-486SP3C, PC Partner MB520N, MSI MS-6168, and Packard bell Bora Pro. 2021-04-06 07:17:38 +02:00
RichardG867
5940b3f12e ISAPnP: only invalidate card references when disabling the card 2021-04-03 19:02:11 -03:00
RichardG867
985e498d6d Rewrite UM8669F Super I/O to use the ISAPnP framework 2021-04-02 23:48:23 -03:00
David Hrdlička
10cc122925 fix Clang/WinSDK warnings 2021-03-21 03:28:37 +01:00
OBattler
0c9cc06238 Fixes to the UMC UM8669F Super I/O chip - now reconfiguring device ports actually works. 2021-03-20 04:45:38 +01:00
EngiNerd89
2bac676e70 Merge branch 'master' of https://github.com/86Box/86Box.git into EngiNerd 2021-01-23 19:03:36 +01:00
EngiNerd89
ec929b455e Improved memory management of Olivetti machines. 
Added On-board video card for NCR 3302
 2021-01-23 17:59:02 +01:00
Panagiotis
b465a6a3ec Added an AMI ALi M1489 board 
This includes also the Goldstar Prime3B Super I/O
 2021-01-20 13:37:39 +02:00
EngiNerd89
a4de9d514b Implemented some Olivetti M300-family machines. 
Implemented NCR PC916SX
Implemented PC87310 SuperIO
 2021-01-17 14:39:45 +01:00
Panagiotis
6960fb31d5 Added the Flytech 386 
A replacement for the US Technologies 386. It's a late 386SX board released around 1996. Comes with parts commonly found on late 486 and mid Pentium systems.
 2021-01-13 11:50:43 +02:00
David Hrdlička
96eb8d806e Add copyright headers 2021-01-12 18:26:18 +01:00
David Hrdlička
11b6604196 Add CMake build files 2021-01-12 18:22:40 +01:00
OBattler
09c20cb508 Fixed the SMC FDC73C665 Super I/O chip. 2021-01-05 22:41:40 +01:00
Panagiotis
5d7ea72881 Added the Mylex MVI486 
A 486 Industrial board using the Mylex BIOS
 2020-12-31 21:49:47 +02:00
Panagiotis
2566d15a4c Added the missing FDC37M60x Super I/O 
For the Vectra VEi8 implementation
 2020-12-30 22:39:25 +02:00
Panagiotis
7268bfa06d Added the Vectra VEi8 
A 686 Vectra using the Award BIOS
 2020-12-30 22:37:51 +02:00
Panagiotis
0146761945 Implemented the LG Prime 3C SIO 
Some terrible Super I/O used in terrible motherboards. Good to have :b
 2020-12-29 22:03:37 +02:00
Miran Grča
5e91b451fb Merge pull request #1176 from tiseno100/master 
Early SiS 50x rework
 2020-12-18 17:10:59 +01:00
OBattler
7577dbab78 Finished the SiS 50x work and added the two ASUS'es. 2020-12-18 17:09:54 +01:00
RichardG867
1068519960 Fix VT82C686 Super I/O configuration enable bit 2020-12-16 20:17:16 -03:00
OBattler
607230ae18 Fixed the VIA machines. 2020-11-18 03:30:13 +01:00
OBattler
0faf6692c9 WARNING: CONFIGS MIGHT PARTIALLY BREAK WHERE DEVICE NAMES HAVE CHANGED. 
Changes to device_t struct to accomodate the upcoming PCI IRQ arbitration rewrite;
Added device.c/h API to obtain name from the device_t struct;
Significant changes to win/win_settings.c to clean up the code a bit and fix bugs;
Ported all the CPU and AudioPCI commits from PCem;
Added an API call to allow ACPI soft power off to gracefully stop the emulator;
Removed the Siemens PCD-2L from the Dev branch because it now works;
Removed the Socket 5 HP Vectra from the Dev branch because it now works;
Fixed the Compaq Presario and the Micronics Spitfire;
Give the IBM PC330 its own list of 486 CPU so it can have DX2's with CPUID 0x470;
SMM fixes;
Rewrote the SYSENTER, SYSEXIT, SYSCALL, and SYSRET instructions;
Changed IDE reset period to match the specification, fixes #929;
The keyboard input and output ports are now forced in front of the queue when read, fixes a number of bugs, including the AMI Apollo hanging on soft reset;
Added the Intel AN430TX but Dev branched because it does not work;
The network code no longer drops packets if the emulated network card has failed to receive them (eg. when the buffer is full);
Changes to PCI card adding and renamed some PCI slot types, also added proper AGP bridge slot types;
USB UHCI emulation is no longer a stub (still doesn't fully work, but at least Windows XP chk with Debug no longer ASSERT's on it);
Fixed NVR on the the SMC FDC37C932QF and APM variants;
A number of fixes to Intel 4x0 chipsets, including fixing every register of the 440LX and 440EX;
Some ACPI changes.
 2020-11-16 00:01:21 +01:00
Alexander Babikov
53bb559446 Fix compilation warnings. 2020-11-14 05:46:57 +05:00
RichardG867
5c66a6d0d6 Clean up VT82C686 Super I/O register writes 2020-10-30 17:08:14 -03:00
RichardG867
f1ffa9b8ec Merge branch 'master' of https://github.com/86Box/86Box 
# Conflicts:
#	src/chipset/via_pipc.c
 2020-10-29 14:07:05 -03:00
OBattler
af7e376938 Fixed logical device I/O port handling on the FDC37C932FR, fixes the FDC on the Gateway 2000 Tigereye. 2020-10-24 21:51:42 +02:00
RichardG867
86feb28064 Add FDC DMA remapping on VT82C686 Super I/O 2020-10-22 17:45:31 -03:00