Commit Graph

27 Commits

Author SHA1 Message Date
Jasmine Iwanek
4e6f29a7d5 malloc to calloc 2025-02-01 15:38:36 -05:00
Jasmine Iwanek
81b8038bc5 Clean up .available & .poll 2025-02-01 03:38:52 -05:00
RichardG867
d697d9bca1 OPTi 5x7: Fix another out of bounds on register write 2024-08-22 14:50:10 -03:00
RichardG867
a7cff71892 OPTi 5x7: Fix out of bounds on register read 2024-08-22 13:16:29 -03:00
Jasmine Iwanek
998cfe5cc8 Constification 2023-07-25 17:59:24 -04:00
Jasmine Iwanek
922c4335ae Next round of sonarlint cleanups 2023-06-27 21:17:13 -04:00
Jasmine Iwanek
21adfd4d50 Next round of sonarlint cleanups 2023-06-26 18:28:13 -04:00
Jasmine Iwanek
3fe4f75108 A bit more clang-format 2022-11-19 11:53:07 -05:00
Jasmine Iwanek
bd75bc141a Header cleanups
Tabs to spaces
Consistency
2022-11-13 21:15:47 -05:00
OBattler
015283e5db Preliminary OPTi 822 rewrite. 2022-10-31 05:44:32 +01:00
Jasmine Iwanek
3753a9f8b2 clang-format in src/chipset/ 2022-09-18 17:19:21 -04:00
Jasmine Iwanek
a52f0cca79 src/chipset 2022-03-13 09:21:08 -04:00
Jasmine Iwanek
4674756664 More newline and whitespace cleanups 2022-02-20 16:26:40 -05:00
Jess Lovelace
f18615ae87 refactored device_t and all declarations 2022-02-02 16:31:22 -05:00
Panagiotis
5d68fa68c0 Implemented the OPTi 822 VLB to PCI bridge
Needed for early OPTi Pentium's but also 486's like the Packard Bell PB450 PCI. IRQ routing is hacking though!!
2021-04-05 22:28:04 +03:00
Panagiotis
988478a095 Tiny typo fix 2021-02-14 11:57:03 +02:00
Panagiotis
db4ef02a88 Unite the E & F segment recalcs into one Macro 2021-02-14 11:55:16 +02:00
Panagiotis
41cd6b48f8 More work at the Shadow recalc code of the Python
Divided and documented into multiple macros
2021-02-14 11:46:22 +02:00
Panagiotis
54a36d82b9 Shadow recalc on the Python doesn't need ternaries 2021-02-14 11:14:11 +02:00
Panagiotis
8b7d643452 Sanitize some old chipset code (Part 3)
Fixed the Indentation of the Intel 82335, removed useless includes and numerous bugfixes on the OPTi Python.
2021-02-13 12:31:04 +02:00
OBattler
0faf6692c9 WARNING: CONFIGS MIGHT PARTIALLY BREAK WHERE DEVICE NAMES HAVE CHANGED.
Changes to device_t struct to accomodate the upcoming PCI IRQ arbitration rewrite;
Added device.c/h API to obtain name from the device_t struct;
Significant changes to win/win_settings.c to clean up the code a bit and fix bugs;
Ported all the CPU and AudioPCI commits from PCem;
Added an API call to allow ACPI soft power off to gracefully stop the emulator;
Removed the Siemens PCD-2L from the Dev branch because it now works;
Removed the Socket 5 HP Vectra from the Dev branch because it now works;
Fixed the Compaq Presario and the Micronics Spitfire;
Give the IBM PC330 its own list of 486 CPU so it can have DX2's with CPUID 0x470;
SMM fixes;
Rewrote the SYSENTER, SYSEXIT, SYSCALL, and SYSRET instructions;
Changed IDE reset period to match the specification, fixes #929;
The keyboard input and output ports are now forced in front of the queue when read, fixes a number of bugs, including the AMI Apollo hanging on soft reset;
Added the Intel AN430TX but Dev branched because it does not work;
The network code no longer drops packets if the emulated network card has failed to receive them (eg. when the buffer is full);
Changes to PCI card adding and renamed some PCI slot types, also added proper AGP bridge slot types;
USB UHCI emulation is no longer a stub (still doesn't fully work, but at least Windows XP chk with Debug no longer ASSERT's on it);
Fixed NVR on the the SMC FDC37C932QF and APM variants;
A number of fixes to Intel 4x0 chipsets, including fixing every register of the 440LX and 440EX;
Some ACPI changes.
2020-11-16 00:01:21 +01:00
OBattler
72c1c36ec6 OPTi 5x7 no longer does excess logging, running of timers on the recompiler is now done on every fourth AT KBC port 61h read instead of every 3F4h read, added some safety precautions to io.c to handle the cases where a handler removes itself, implmented the STPC ELCR and refresh control, and fixed the messed up register reading in the PC87307 and PC87309 implementations. 2020-07-10 02:05:49 +02:00
OBattler
39a46797d2 Fixed shadowing on the OPTi 82c5x7, OPTi 82c495 now has Port 92h, and implemented the OPTi 82c611/611A VLB IDE controlled required by the Excalibur. 2020-07-07 20:43:28 +02:00
nerd73
546f0a83e7 Implement C0000-DFFFF shadowing on the OPTi 5x7 chipset 2020-06-29 22:06:27 -06:00
nerd73
09ffa05f89 Improvements to the OPTi 597 machine.
- Add emulation of the FDC37C661 Super I/O
- Fix Pentium VLB timing (was running VLB at 2x bus speed instead of 1/2 bus speed)
- Fix the cache register on the OPTi 5x7 chipset
- The actual minimum RAM amount is 2 MB, not 1 MB.
- Fix chipset naming consistency
2020-06-23 15:04:10 -06:00
nerd73
51572530ff Remove waitstates from register 02. 2020-06-05 10:28:03 -06:00
nerd73
3f0adb5211 Add the AMI Excalibur, a VLB OPTi 596/597 machine.
Also adds emulation of the OPTi 5x7 chipset, and introduces a clock divider for VLB on 64-bit bus systems.
2020-06-05 10:22:59 -06:00