Commit Graph

804 Commits

Author SHA1 Message Date
RichardG867
b9c68bf277 Initial commit for AC97 2021-07-11 16:58:52 -03:00
RichardG867
2eba22295a VIA southbridge fixes, including dynamic SMBus clock 2021-07-08 18:55:05 -03:00
TC1995
6acbf62f42 Ported the latest changes from PCem. 2021-07-05 01:21:02 +02:00
Daniel Gurney
f2cd3756dd Revert "Merge branch 'feature/machine_and_kb' into master"
This reverts commit 6604a29d7e, reversing
changes made to 1d7fca0abd.
2021-07-04 18:22:52 +03:00
Miran Grča
6604a29d7e Merge branch 'feature/machine_and_kb' into master 2021-07-04 16:57:06 +02:00
OBattler
1d7fca0abd GW286 GEAR fixes. 2021-07-04 16:55:04 +02:00
OBattler
15279e4964 Finished the ALi M15xx and removed from Dev branch. 2021-07-01 01:43:59 +02:00
OBattler
fd4817a87b All the current WIP work (warning: the PIT is currently using some temporary test rewrite that is going to be undone). 2021-06-29 19:11:19 +02:00
TC1995
3c95cd4cd5 Added the PS/2 model 80 type 3 machine. 2021-06-15 17:38:31 +02:00
EngiNerd89
2d97a02473 Merge branch 'master' of https://github.com/86Box/86Box.git into EngiNerd 2021-06-13 21:45:53 +02:00
OBattler
368c92780a Added a version of the Winbond W83787F Super I/O chip with IDE enabled by default, fixes IDE on the Flytech 386. 2021-06-03 23:15:34 +02:00
RichardG867
62afe31757 Remove EBGA368 due to poor research (CPUs are Samuel 2 and newer only) 2021-06-03 16:26:08 -03:00
RichardG867
b5a295e91d Continuing the game port overhaul: added support for Super I/O game ports not being broken out 2021-06-03 16:26:07 -03:00
RichardG867
19d2bda4ce Confirm P2B-LS onboard SCSI and LAN slot numbers (props to computerguy08 on Discord) 2021-06-03 16:26:06 -03:00
RichardG867
77f311b179 Game port overhaul 2021-06-03 16:26:05 -03:00
EngiNerd89
d504452930 Fixed FDC issues in Philips P3120 2021-05-30 19:32:50 +02:00
OBattler
e695cb0e3b CRTC on CGA-like graphics chips is now on the entire 3D0 to 3D7 port range, fixes scrolling in some old games. 2021-05-22 03:16:02 +02:00
Panagiotis
0571bdc006 Removed the IBM PS/2 Model 70. Replaced with the Olivetti 486 2021-05-04 11:24:55 +03:00
Panagiotis
78b2f7c9fb Memory changes and SIO done according to the Intel Classic R 2021-05-02 13:48:18 +03:00
Panagiotis
aae4163a8e Removed the PS/1 Model 2133. Introduced the Siemens D824. 2021-05-02 10:33:45 +03:00
OBattler
33df3f7c51 The 386DX/486 and Slot 1/2 combined CPU socket machines are now in their own groups. 2021-05-01 05:41:19 +02:00
OBattler
246bab239f A small indentation fix. 2021-05-01 02:33:15 +02:00
OBattler
8044fced2d Split the 486 machines into three groups. 2021-05-01 02:32:35 +02:00
OBattler
1b3a870388 Forgotten changes to the MCA PS/2 machines. 2021-04-29 07:37:05 +02:00
OBattler
8fe4decd95 More PS/1 model 2133 fixes. 2021-04-29 07:36:16 +02:00
OBattler
eee5e476ad The PS/1 model 2133 no longer remaps A0000-FFFFF to the top of memory, fixes #1410. 2021-04-28 20:26:01 +02:00
OBattler
278b73e339 Fixed the VLSI 82c480 chipset and removed the HP Vectra 486 from the Dev branch. 2021-04-28 08:59:52 +02:00
TC1995
97e6c912eb Fixed NVRAM initialization (floppies, hdd's, etc...) for the PS/1 computers. 2021-04-26 00:15:15 +02:00
Alexander Babikov
b1fb9def6e Fix the BIOS path for Olivetti M290 2021-04-26 01:18:41 +05:00
Alexander Babikov
66d09a189a Properly remove the FIC VIP-IO2 from the dev branch 2021-04-26 00:35:56 +05:00
Alexander Babikov
8a4f54b6c0 Remove unused Makefile options 2021-04-26 00:29:39 +05:00
Panagiotis
ba92f1df34 Finalize the SiS Pentiums
- Implemented the SiS 5511
- The SiS 5571 can safely go off Dev Branch now
- Few fixes on the SiS 5598
2021-04-25 13:23:41 +03:00
Panagiotis
11d4f18cfe SiS 5598 Implementation. 2021-04-21 21:54:23 +03:00
OBattler
17c3056681 Finished fixing the VIA chipset required for the FIC VIP-IO2, added a version of the W83787F Super I/O chip with secondary IDE, fixed the W83787F IDE handler, made AT NVR initialize with 0xff rather than 0x00 by default (which is actually correct), and removed the FIC VIP-IO2 from the Dev branch. 2021-04-20 03:24:30 +02:00
RichardG867
4a41e4d486 De-underscore PowerMate V, OpenAT and OpenXT 2021-04-17 19:23:22 -03:00
RichardG867
ec9b5cae73 Part 2 of The De-Underscoring: function names, ROM paths and some indentation cleanups 2021-04-17 17:12:02 -03:00
RichardG867
1e21629523 Limit PCjr to 4.77 MHz the proper way 2021-04-17 16:47:52 -03:00
RichardG867
d0d73b7ef5 Revert "The IBM PCjr is now limited to 8088 4.77 MHz, closes #1379."
This reverts commit d060a38d91.

# Conflicts:
#	src/machine/machine_table.c
2021-04-17 16:46:04 -03:00
RichardG867
dcbf4b5729 Merge branch 'master' of https://github.com/86Box/86Box 2021-04-17 16:43:32 -03:00
RichardG867
120fc553b0 Machine table limit cleanup, based on research into potentially undocumented jumper combinations 2021-04-17 16:43:25 -03:00
RichardG867
4c46d21924 Clean up 450KX formatting 2021-04-17 16:22:00 -03:00
OBattler
ad3c3a3c6d Fixed a compile-breaking mistake in machine/machine_table.c. 2021-04-17 04:47:12 +02:00
OBattler
4989d99c1b Merge branch 'master' of https://github.com/86Box/86Box 2021-04-17 04:45:55 +02:00
OBattler
d060a38d91 The IBM PCjr is now limited to 8088 4.77 MHz, closes #1379. 2021-04-17 04:45:28 +02:00
RichardG867
023917f8c0 Fix machine table indentation 2021-04-16 16:20:46 -03:00
nerd73
5e89a9d775 fix more compile issues 2021-04-15 23:34:53 -06:00
nerd73
791bae3560 Add the AMD Am486DXL and DXL2.
Has otherwise Intel-compatible SMM with an SMBase at 60000h.
2021-04-15 23:28:07 -06:00
nerd73
8e3b09f323 Various 486 improvements
- Added SL-Enhanced versions of Intel 486 CPUs and Enhanced AMD Am486DX2/DX4 CPUs
- Cleaned up the 486 CPU types and updated intel_4x0.c to reflect this
- Fixed some incorrect EDX reset and CPUID values
- Blacklisted non-SMM capable 486 CPUs on the Soyo 4SA2 motherboard
- Merged the non-OverDrive and OverDrive Intel DX4s because of further research confirming them to be functionally identical
- Removed SMM support on early 486 CPUs
2021-04-15 21:38:03 -06:00
OBattler
3746b722c7 The two 486 machines with on-board SCSI controllers now have the MACHINE_SCSI flag. 2021-04-13 18:57:01 +02:00
OBattler
1a7bcec0f4 The Soyo 4SA2 now correctly has the Winbond W83787F Super I/O chip. 2021-04-13 00:31:09 +02:00