Commit Graph

58 Commits

Author SHA1 Message Date
OBattler
2fbd377092 DMA master reset register now clears the status register;
Implemented DMA mask reset register.
2016-11-14 04:55:48 +01:00
OBattler
677cf7598c DMA channel 0 page setting is now writable on 386 and later machines;
DMA channel 4 now correctly works as a cascade.
2016-11-13 23:44:16 +01:00
OBattler
995c62ab06 DMA channels 6 and 7 page setting writes now work. 2016-11-13 23:19:31 +01:00
TC1995
0f035b42ea Added preliminary Adaptec 154x emulation, needs fixing in the Read 10 command.
Made ATAPI derived from SCSI.
Added proper S/G emulation for SCSI DMA.
Added SCSI CD-ROM emulation, preserving all the former ATAPI commands as well.
2016-11-12 15:06:38 +01:00
OBattler
beb4e7869d The FDC READ TRACK command should now operate properly. 2016-11-11 03:16:41 +01:00
OBattler
6318e2bb17 Rewritten parts of the 86F handler to minimize false CRC errors and misidentification of sectors;
Replaced IMG handler with one that now proxies to the 86F handler;
Applies the remaining Mainline PCem speedup commit;
Fixed the National Semiconductors PC87306 Super I/O Chip's serial port IRQ assignment;
DMF images are now loaded with the correct sector interleave, improving read/write speed;
XDF images are now loaded in a way that emulates the real order of the sectors on the track, improving read/write speed;
Added 16-bit physical memory read/write routines (mem_phys_readw, mem_phys_writew) and modified the 16-bit DMA code to use them instead of two 8-bit reads/writes.
2016-09-22 21:22:56 +02:00
Jackson Bryn
291ac890e2 Add copyrights for all files to comply with the GPL v2. 2016-08-14 22:27:13 -04:00
OBattler
fd2a5bc9f5 Initial submission of the PCem-Experimental source code. 2016-06-26 00:34:39 +02:00