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363 Commits

Author SHA1 Message Date
OBattler
2ad7b7c345 Fixed the C&T 82C100 hardware EMS implementation and increased the V86P's maximum RAM to 1 MB. 2021-09-08 01:49:31 +02:00
OBattler
e9615fc167 Added support for JVERNET's V86P ROM's, and fixed the bugs reported by lemondrops. 2021-09-07 23:57:26 +02:00
OBattler
0c4003caa3 Added the C&T 82C100 chipset needed by the Victor V86P. 2021-09-07 23:41:17 +02:00
OBattler
3268c0299d Implemented DDMA for the VIA southbridges that support it, closes #1613. 2021-09-02 22:56:51 +02:00
OBattler
da9546c82a Fixed FDC37C665 UART 2 handler and some ALi M1487/89 bugs. 2021-08-12 11:09:24 +02:00
OBattler
f0e84f7f13 More fixes, fixes CMOS Setup on the Acrosses AR-B4179. 2021-08-09 16:10:55 +02:00
OBattler
ee315970a1 Correct implementation of the VIA write-only NVR register 0D bit that is read from power management PCI register 42, fixes the FIC VA-503A. 2021-08-09 07:19:12 +02:00
RichardG867
e937de6760 Implement VIA SBPro emulation 2021-08-03 20:28:24 -03:00
RichardG867
4c307fd945 Merge branch 'master' of https://github.com/86Box/86Box into feature/savquest 2021-07-29 20:00:30 -03:00
RichardG867
35d0aa0df4 Change VIA FM and other behavior to match real hardware, and add "real fake OPL" mode 2021-07-27 16:01:17 -03:00
OBattler
f79b11cd9a PIIX3 fixes. 2021-07-27 03:42:56 +02:00
OBattler
e864aa2edc PIIX IDE non-bus master BAR's are now only writable on the SMSC Victory/66. 2021-07-26 05:02:40 +02:00
RichardG867
42eada3122 VIA AC97 improvements, almost ready 2021-07-25 22:58:03 -03:00
RichardG867
293c4a0281 Fix unused variable warning 2021-07-24 22:37:05 -03:00
RichardG867
ce63373613 Add incomplete VIA AC97 FM implementation 2021-07-22 11:10:05 -03:00
RichardG867
b2b2120d8f Merge branch 'master' of https://github.com/86Box/86Box into feature/savquest 2021-07-18 16:33:09 -03:00
OBattler
00a9894821 More AT NVR and VIA fixes - the Gigabyte GA-6VX-4X AMI BIOS (machine will be added on the WIP branch) works fine now. 2021-07-18 04:52:32 +02:00
OBattler
5fc73eee7b Various VIA fixes. 2021-07-17 06:01:27 +02:00
OBattler
f9712a8c61 SiS 40x fixes, UMB_DRVR now works, fixes #1408 (and I can't fix the SIS 310 freeze - the author of UMB_DRVR forgot to place a RET instruction in a part of the SIS 310 module, causing an infinite recursion and resulting stack overflow). 2021-07-15 06:43:30 +02:00
RichardG867
ff1a55d08d More AC97, now with VIA kinda sorta working and ES1371 2021-07-13 00:53:26 -03:00
RichardG867
b9c68bf277 Initial commit for AC97 2021-07-11 16:58:52 -03:00
RichardG867
2eba22295a VIA southbridge fixes, including dynamic SMBus clock 2021-07-08 18:55:05 -03:00
Daniel Gurney
f2cd3756dd Revert "Merge branch 'feature/machine_and_kb' into master" 
This reverts commit 6604a29d7e, reversing
changes made to 1d7fca0abd.
 2021-07-04 18:22:52 +03:00
OBattler
15279e4964 Finished the ALi M15xx and removed from Dev branch. 2021-07-01 01:43:59 +02:00
OBattler
fd4817a87b All the current WIP work (warning: the PIT is currently using some temporary test rewrite that is going to be undone). 2021-06-29 19:11:19 +02:00
OBattler
73bdd27ba8 Fixed PIIX MIRQ routing so MIRQ1 routing is no longer incorrectly applied to MIRQ0. 2021-06-10 05:07:32 +02:00
OBattler
cc310d663f Slight GC100 rework. 2021-06-07 00:18:33 +02:00
OBattler
59d1469a07 Intel 420EX fixes. 2021-06-06 23:59:05 +02:00
OBattler
32dff0b5a1 OPTi 283 rewrite. 2021-06-06 23:58:12 +02:00
OBattler
50af9387f8 Makes PIIX board configuration registers work again - fixes deep beeps on Intel Advanced/ATX. 2021-06-06 23:56:21 +02:00
Panagiotis
e41d9c9ba7 Minor fix on the ET6000 2021-05-09 13:49:31 +03:00
Panagiotis
0571bdc006 Removed the IBM PS/2 Model 70. Replaced with the Olivetti 486 2021-05-04 11:24:55 +03:00
OBattler
50e32b6873 Temporarily disabled the second PIT on the PIIX and SIO to gain some performance back. 2021-04-29 23:46:44 +02:00
OBattler
871bb8b7d2 Initialized the ht386 variable. 2021-04-29 19:58:46 +02:00
OBattler
642d3b16be More indentation fixes in the same file. 2021-04-29 19:57:50 +02:00
OBattler
9802dfabff Reindented and fixed a bug in chipset/umc_8886.c. 2021-04-29 19:57:01 +02:00
OBattler
37dc30029f Fixed the loop in vt82c49x_reset(). 2021-04-29 19:50:48 +02:00
OBattler
278b73e339 Fixed the VLSI 82c480 chipset and removed the HP Vectra 486 from the Dev branch. 2021-04-28 08:59:52 +02:00
OBattler
49b1753dd0 Corrected PIIX4 ACPI GPIREG defaults to fix the ASUS P2B-LS. 2021-04-27 04:39:46 +02:00
OBattler
e7a859adc5 More fixes - the Goldstar machine now fully works. 2021-04-27 04:10:59 +02:00
OBattler
ce51518bd7 Slight fixes to the SCAT chipset. 2021-04-26 06:48:54 +02:00
Alexander Babikov
0208c7560f Fix incorrectly set 7.16 MHz clock speeds on some chipsets 2021-04-26 04:21:29 +05:00
Alexander Babikov
1dbfb794b8 Move the Olivetti EVA chipset to the dev branch and add the M290 to CMake scripts 2021-04-26 00:38:23 +05:00
Panagiotis
ba92f1df34 Finalize the SiS Pentiums 
- Implemented the SiS 5511
- The SiS 5571 can safely go off Dev Branch now
- Few fixes on the SiS 5598
 2021-04-25 13:23:41 +03:00
OBattler
f7a86784bd Merge branch 'master' of https://github.com/86Box/86Box 2021-04-22 04:28:19 +02:00
OBattler
957b538c4a Rewrote memory access handling to properly split execute from read, bus from CPU (but the mappings will still match until otherwise specified), and fixed exec[] usage by the mem_*_phys() functions. 2021-04-22 04:27:50 +02:00
Panagiotis
711bbff6ad SiS 5598 uses Generic NVR at the moment 2021-04-21 22:32:16 +03:00
Panagiotis
11d4f18cfe SiS 5598 Implementation. 2021-04-21 21:54:23 +03:00
OBattler
17c3056681 Finished fixing the VIA chipset required for the FIC VIP-IO2, added a version of the W83787F Super I/O chip with secondary IDE, fixed the W83787F IDE handler, made AT NVR initialize with 0xff rather than 0x00 by default (which is actually correct), and removed the FIC VIP-IO2 from the Dev branch. 2021-04-20 03:24:30 +02:00
RichardG867
dcbf4b5729 Merge branch 'master' of https://github.com/86Box/86Box 2021-04-17 16:43:32 -03:00