Commit Graph

1807 Commits

Author SHA1 Message Date
starfrost013
ec7e75bb81 De-magic colorplus_out 2025-06-09 21:43:32 +01:00
starfrost013
b7e6248db9 Apply CGA_CRTC and CGA_MODE_FLAGS to the rest of the Super CGA crew. 2025-06-09 19:26:40 +01:00
starfrost013
d32a06d305 Rename "con" to "cursorvisible" as it determines if the cursor is visible for the current scanline. 2025-06-09 17:16:01 +01:00
starfrost013
7bf7a84a83 Missed one cga->cgamode 2025-06-09 17:05:49 +01:00
starfrost013
860a9b0163 Apply CGA_CRTC enum to Plantronics Colorplus 2025-06-09 17:03:21 +01:00
starfrost013
b4b1a599ba Fix compilation & warnings 2025-06-09 15:47:49 +01:00
starfrost013
2be1c4960e plantronics: don't duplicate code 2025-06-09 15:32:32 +01:00
starfrost013
d13251c07a Do the same for the registers. 2025-06-09 15:25:28 +01:00
starfrost013
e637f53981 remove cga->coff because it is never used or checked 2025-06-09 15:15:53 +01:00
starfrost013
08e2fd8e17 fix rendering but stuck in 640x200 2025-06-09 14:27:41 +01:00
starfrost013
b639bf1853 Enumerate CGA CRTC registers and modes and implement that into the code 2025-06-09 14:12:13 +01:00
TC1995
cf042e95cb ATI EGA Wonder 800 Plus changes (June 7th, 2025)
It really comes down to the EEPROM for the monitor settings and fixes for resolutions between hdisp > 640 && hdisp < 800 (like MDA)
2025-06-07 22:50:21 +02:00
Jasmine Iwanek
ee5508f306 Assorted EGA code optimizations 2025-06-06 23:16:28 -04:00
Jasmine Iwanek
77f1c62aee Support for alternate IBM EGA Address
(Disabled behind ifdef because while it's a thing, you need a custom BIOS to use it)
2025-06-06 23:16:28 -04:00
Jasmine Iwanek
6f8571c026 Fix a bug in EGA 2025-06-06 21:55:06 -04:00
Jasmine Iwanek
b71e321236 Assorted cleaning 2025-06-06 21:55:06 -04:00
OBattler
c6e374158b Fix it in svga_doblit() as well. 2025-06-06 20:09:36 +02:00
OBattler
a1a9407629 (S)VGA: Fix overscan. 2025-06-06 20:05:04 +02:00
OBattler
e3c825fce7 (S)VGA: Fix overscan, closes #5651. 2025-06-06 15:54:04 +02:00
TC1995
07341003dc C&T 69000 changes of the day (June 1st, 2025)
Divide by 3 the destination address on color patterns to make sure the pattern position is perfectly aligned. Fixes color patterns in Win3.1x and Win9x (and possibly NT-based and other stuff).
2025-06-01 13:21:36 +02:00
MaxwellS04
3ac92ccf4f Assorted Cirrus fixes
1. Correct the linear framebuffer setting on VLB Cirrus chips; should fix segfaults when you use them with default configuration
2. Add the "On-Board" name and correct internal_name to the onboard Cirrus Logic GD5420
2025-05-30 23:20:50 +07:00
OBattler
9ebcc44350 Add the Dell System 333s/L. 2025-05-28 19:41:27 +02:00
Jasmine Iwanek
8e895903ed Alternate font support for MDA and Hercules 2025-05-27 01:11:58 -04:00
Cacodemon345
6f6e64e321 Some minor fixes 2025-05-25 15:42:57 +06:00
TC1995
75e76899da S3 911/924 high color: check if rd_mask is not 0 (May 21st, 2025)
This fixes wrong colors in certain instances of Windows 95 builds' 911/924 drivers.
2025-05-21 13:43:23 +02:00
TC1995
06f4491193 Mach8 mode changes of the day (May 20th, 2025)
Make the previously Mach8 add-on only mode changes also available to the Graphics Ultra, should fix incorrect resolutions after switching from fullscreen DOS prompt to windowed and viceversa under Win98 (and SE).
2025-05-20 20:33:22 +02:00
TC1995
dbc2baebe9 Small ATI Mach8 changes (May 19th, 2025)
1. Report the ATI 28800 of the Graphics Ultra as 28800-6.
2. Access the upper word properly on vdisp.
3. Make sure there's enough vsyncstart/vtotal space for a full vertical display.
2025-05-19 22:22:03 +02:00
TC1995
e04628cc7c Trident pattern and memory access changes (May 19th, 2025)
1. DirectDraw memory address fixes of the day (removing the bit 6 of crtc 2a side of the if in recalctimings).
2. In spite of no documentration or NDA manuals, get data from the pattern registers as best as possible in 32bpp mode, this fixes patterns in 32bpp mode using various stuff.
2025-05-19 19:25:21 +02:00
OBattler
d6231de1bc Added the Dell 466/NP, closes #3585. 2025-05-18 05:59:13 +02:00
OBattler
e98424a8ae Added the ICS SB486PV. 2025-05-17 02:35:11 +02:00
OBattler
e800f99f5a Make device.c assume CONFIG_BIOS is first in the config struct and make sure any device_t struct containing such follows that, in order to not have to traverse the entirety of every single device_t's config struct in the Settings dialog - should reduce the dialog's loading times further. 2025-05-10 04:53:20 +02:00
TC1995
cc6076f93b Late night S3 changes (May 9th, 2025)
1. Pixtrans on port 0xb2e8 is not available on 864/964 and up (including the trio64) due to color compare taking its place, fixes some graphical glitches in WinXP.
2. The DOS s3id utility identifies the 80x chips correctly, either it's 801 ISA or 805 VLB, but not 805 ISA even if they share the same id, but since it's an ISA card, identify the Elsa Winner 1000 805 ISA as a 801 card.
2025-05-09 02:23:56 +02:00
TC1995
e6a41921cf Fix mono pattern position in the Mach64 cards using 24bpp mode (May 7th, 2025)
See above.
2025-05-07 21:40:22 +02:00
MaxwellS04
1f40db5d9e Fixed ROM path 2025-05-07 11:29:11 +07:00
MaxwellS04
5d929c7735 Move Winner 1000's RAMDAC to ATT491 2025-05-07 10:39:22 +07:00
MaxwellS04
6fb01cf592 Added ISA-specific 86c805 (ELSA Winner 1000)
Ported from my ELSA_Winner_Series branch.
2025-05-07 10:11:51 +07:00
TC1995
1b1d6bcf45 Some cleanup to the recent fixes on the S3 code (May 6th, 2025)
See above.
2025-05-06 20:17:23 +02:00
OBattler
4a417da09b S3: Revert the video BIOS change, it was not necessary. 2025-05-06 19:34:14 +02:00
OBattler
ef3f57b338 S3 Trio32 On-Board VLB: Actually use the DEC Venturis 4xx video BIOS. 2025-05-06 19:26:26 +02:00
OBattler
8508a04825 CL-GD 54xx: Remove an excess logging line. 2025-05-06 19:06:30 +02:00
TC1995
6a6be85852 Late night fixes for the Mach8 (May 5th, 2025)
1. The Mach8 doesn't have separate graphics pitches a la Mach32 (68800-6 and up), fixes the rendering in some drivers for Windows.
2. Special case for the add-on Mach8 for the mode switching (resolution only).
2025-05-05 02:02:02 +02:00
TC1995
608ce2d155 Another stall fix for the mach8/32.
See above, covering the foreground and background select bits as well.
2025-05-04 02:04:41 +02:00
Miran Grča
434be84249 Merge pull request #5543 from 86Box/tc1995
Fixes to the S3 911/924 of the night (May 4th, 2025)
2025-05-04 02:03:22 +02:00
TC1995
b1d409471c Fixes to the S3 911/924 of the night (May 4th, 2025)
1. Actually mostly workarounds to make it render normally without a hitch (I hope) using the Diamond Stealth VRAM 911-based 15bpp driver.
2. Updated logs.
2025-05-04 02:01:34 +02:00
Cacodemon345
384af874f5 Bochs VBE: Update for 0.9c ROM 2025-05-03 17:02:30 +06:00
GreaseMonkey
a72142f2b5 Fix EGA/VGA/SVGA odd-even handling of write mask
Matches my AMD Stoney + S3 Trio64V2, and also Intel's 2023 GPU docs (which *still* tend to be more accurate than IBM's), and makes more sense than what we've (I've?) been doing.
2025-05-02 10:51:34 +12:00
TC1995
8c736c7b9a Stall fix for the mach8/32 (April 30th, 2025)
See above.
2025-04-30 23:15:58 +02:00
TC1995
d623425efd Some more changes to the Mach8/32/8514/A side (April 29th, 2025)
1. Do not stall the guest when the passthrough mode is on, fixes hang ups in Windows 3.1 using the 2.3 drivers.
2. In the pitch register, make sure the passthrough goes on when needed only on the ATI Mach32, not 8, fixes mode on/off in text mode when needed.
3. Cosmetic changes and logs.
2025-04-29 00:57:03 +02:00
TC1995
0da871f54e Vast overhaul to the 15bpp/16bpp accelerated mode of the 911/924.
1. See above, as best as possible, but manuals would be helpful.
2. Reverted the ramdac of the 924 to the sierra one because of a bug that triggers 24bpp mode when it shouldn't.
2025-04-29 00:39:26 +02:00
OBattler
ad4ec20374 Modify the CL-GD 54xx (S)VGA read and write handlers in order to use the pointer to the svga struct instead of the gd54xx struct, fixes #5521. 2025-04-29 00:33:51 +02:00