Jasmine Iwanek
f373d3d8fe
Merge branch '86Box:master' into nec-v20
2022-07-15 15:14:07 -04:00
TC1995
b80fda4280
The IBM 386/486 cpu's are based on modified Intel 386 designs and, as such, should behave like the them on the x86 flag ops.
2022-07-15 12:34:41 +02:00
Jasmine Iwanek
4f08c464f2
Merge branch '86Box:master' into nec-v20
2022-06-28 12:11:21 -04:00
TC1995
63b4209414
And finally, more fixes to the XGA implementation including:
...
Cursor and mapping on Windows 2.x' 286/808x XGA driver.
Pattern and DMA bus master fixes to OS/2 2.x/Warp's XGA driver.
Software reset no longer causes glitches to the screen using XGA (x86.c)
2022-06-27 17:01:02 +02:00
Cacodemon345
ce34c4cb16
x87_ops: Use __asm for consistency with the other inline assembly block
2022-06-19 16:01:23 +06:00
Jasmine Iwanek
8d6fec4f0d
Merge branch '86Box:master' into nec-v20
2022-05-22 22:48:46 -04:00
TC1995
1ac46d792f
Fixed the 8514/A to VGA soft reset and made the vga_on variable a global one to make sure it's used by the soft reset.
...
Updated copyright holder that was accidentally reverted while committing the IBM 8514/A source files.
2022-05-19 20:07:06 +02:00
Jasmine Iwanek
cc55b93e1b
Merge branch '86Box:master' into nec-v20
2022-04-20 06:46:46 -04:00
OBattler
d30a5c7ef3
Removed a debug fatal() that should have been removed ages ago.
2022-04-18 21:49:26 +02:00
Jasmine Iwanek
6bc98fcb18
Merge branch '86Box:master' into nec-v20
2022-04-17 16:45:04 -04:00
Alexander Babikov
dd4cef9727
Fix the remaining CPU warnings
2022-04-14 07:10:20 +05:00
Jasmine Iwanek
1947e100ab
Merge branch '86Box:master' into nec-v20
2022-04-12 21:24:22 -04:00
OBattler
1f144f1885
Fixed some #define's, as pointed out by lemondrops.
2022-04-13 02:47:37 +02:00
OBattler
1c271f6f8a
And fixed one last warning, which finishes this CPU warning fix process.
2022-04-13 02:12:08 +02:00
OBattler
c5208af2a6
Fixed some compile-breaking mistakes in x86_ops_bitscan.h.
2022-04-13 02:10:13 +02:00
OBattler
ba40831002
Phase 2.
2022-04-13 02:07:23 +02:00
OBattler
3a40d9a807
Phase 1.
2022-04-13 02:03:48 +02:00
Jasmine Iwanek
8954729d00
Update 386_ops.h
2022-03-19 06:05:52 -04:00
Jasmine Iwanek
1ecbc1cd3c
Fix build
2022-03-19 06:05:52 -04:00
Jasmine Iwanek
8ef1d28b2c
Merge branch '86Box:master' into nec-v20
2022-03-18 15:05:25 -04:00
RichardG867
f57cbe36b1
GDB Stub: More progress
2022-03-16 00:33:01 -03:00
Jasmine Iwanek
b4d134f969
Fix errors
2022-03-13 09:02:34 -04:00
Jasmine Iwanek
cf83390225
Add missing CPU_PKG definitions
2022-03-13 06:36:45 -04:00
RichardG867
94be8cdfc6
GDB Stub: Initial commit
2022-03-12 20:20:25 -03:00
Jasmine Iwanek
6bccf983e5
Merge branch '86Box:master' into nec-v20
2022-02-20 21:08:06 -05:00
Jasmine Iwanek
4674756664
More newline and whitespace cleanups
2022-02-20 16:26:40 -05:00
Jasmine Iwanek
4287e44824
newlines at end of file
2022-02-18 21:38:51 -05:00
Jasmine Iwanek
b4e5fec867
Merge branch '86Box:master' into nec-v20
2022-02-02 22:14:22 -05:00
OBattler
b3a8d0aaed
And more.
2022-02-02 02:51:18 +01:00
OBattler
25e8801ede
And more.
2022-02-02 02:46:11 +01:00
OBattler
7eabebb97f
More temporary reverts.
2022-02-02 02:43:40 +01:00
OBattler
b92d45125e
Temporarily reverted that FPU clock cycles change.
2022-02-01 19:07:22 +01:00
Jasmine Iwanek
a349823c7d
Initial proddings at NEC V20/V30
2022-01-31 13:39:06 -05:00
David Hrdlička
8e00b37e22
Clean up the build scripts
2022-01-29 23:50:53 +01:00
Miran Grča
0545de2570
Merge pull request #2022 from goshhhy/fpu_iu_concurrency
...
Correctly emulate FPU concurrent execution timings
2022-01-29 22:30:50 +01:00
linear cannon
c9882c1910
fix build with dynarec
2022-01-29 13:12:46 -08:00
linear
3f9f52b7e8
Merge branch 'master' into fpu_iu_concurrency
2022-01-29 10:44:56 -08:00
linear cannon
eab711a4ed
x87_ops_*.h: emulate fpu/iu concurrency for each fpu instruction
2022-01-29 07:38:53 -08:00
linear cannon
04c89959f8
adjust CLOCK_CYCLES and related macros to handle fpu/iu concurrency
...
add CLOCK_CYCLES_FPU, which does exactly what CLOCK_CYCLES already did.
add CONCURRENCY_CYCLES, which sets fpu_cycles, which is the number of
available concurrent execution cycles that the integer unit can do
"free" work in while the fpu is executing.
adjust CLOCK_CYCLES so that if there are fpu_cycles, the cycle count is
subtracted from fpu_cycles instead of cycles, emulating the behavior of
these concurrent cycles being "free" as on real hardware.
2022-01-29 07:38:41 -08:00
linear cannon
4815fcc226
add fpu_cycles variable to cpu_state to track fpu/iu concurrency
2022-01-29 07:38:29 -08:00
linear cannon
31aed306c9
x87_timings: new timings for fpu/iu concurrency
2022-01-29 07:34:58 -08:00
linear cannon
483758d827
cpu: dont build 386_dynarec_ops.c if DYNAREC=Off
2022-01-29 05:27:35 -08:00
linear cannon
693501d2b0
x86seg.c: cyrix_load_seg_descriptor: don't use codegen variables if dynarec disabled
2022-01-29 05:13:31 -08:00
Alexander Babikov
ee79348885
Implement machine check exception/architecture MSRs and CPUID flags
2021-12-22 05:33:26 +05:00
Alexander Babikov
1a04b93165
Make MSR 17h read-only and return a suitable Platform ID
...
Fixes some programs misidentifying Celeron Mendocinos as Slot 1 instead of Socket 370
2021-12-22 05:30:28 +05:00
David Hrdlička
52486e121e
Convert CMake files to 4 spaces indentation
2021-12-20 15:08:23 +01:00
OBattler
bc90f99350
Finally got rid of the AT and PCI global variables.
2021-12-19 20:00:27 +01:00
OBattler
9ec4fd3bdd
Fixed a CPU reset mess.
2021-12-19 19:14:21 +01:00
OBattler
97bbbb1090
Removed an excess pclog().
2021-11-18 18:28:40 +01:00
OBattler
c53613deb7
Removed excess logs from cpu.c.
2021-11-14 20:25:07 +01:00