Commit Graph

14 Commits

Author SHA1 Message Date
anabate123
2bfa946244 Added more speeds to Celeron (Slot 1/Socket 370)
What would preliminary Mendocino emulation be without the remaining speeds?
2020-03-26 16:59:43 -04:00
nerd73
51bbebbfa3 Changes to the IBM 386/486 and RapidCAD CPUs
- Disabled the 'is486' flag and moved them to 386 timings
- Disabled cache on startup, enable-able later
- RapidCAD fixes (permanently disable L1, correct EDX reset)
2020-03-25 18:02:25 -06:00
tiseno100
b1a421a2e9 Incorrect Encoding. Fixed 2020-03-25 12:31:54 +02:00
tiseno100
1f6d05f637 Added the Packard Bell Bora Pro + Celeron changes
Now Slot1 motherboards can access the Celeron processors at the Intel/PGA370 category
Added the Packard Bell Bora Pro. A 440ZX based AMI board. It's just a MSI 6168 with the AMI PB OEM BIOS slapped in it. It reports excessive amounts of RAM and also looks for an SDRAM serial(which is not a huge deal).

Roms can be found on the roms PR
2020-03-25 12:22:51 +02:00
Daniel Gurney
0c509fd551 Remove version tree-wide 2020-03-25 00:46:02 +02:00
OBattler
1ff55cdf10 Fixed the table of the 486's. 2020-03-23 23:41:20 +01:00
nerd73
c007121062 Merge branch 'temp' into temp 2020-03-23 16:06:32 -06:00
OBattler
43f2bb849b Merge branch 'temp' into temp 2020-03-23 22:02:52 +01:00
OBattler
6219cbd31a Overdoze's 486 CPUID changes. 2020-03-23 21:14:34 +01:00
nerd73
172f85ad40 Implemented MSRs 2020-03-21 23:42:01 -06:00
tiseno100
0d945fbf47 Added the ECS P6BXT-A+ 2020-03-21 10:04:11 +02:00
nerd73
111d82fa0c Preliminary VIA Cyrix III emulation
This adds preliminary emulation of the first-gen Samuel core, used in the VIA Cyrix III CPU, at clock speeds from 66 to 700 MHz. This also moves the 440BX emulation out of the dev-branch.

Things working:
- CPUID
- Windows 98SE
- Timings seem identical between WinChip/W2's integer section and this

Things left to do:
- 3DNow on old dynarec
- Half-speed FPU (currently simulated with WinChip 1 timings instead of WinChip 2)
2020-03-01 15:06:35 -07:00
OBattler
ed6e8ffb77 Fixed CPUID's for low-clocked Klamath and Deschutes Pentium II's. 2020-03-01 00:48:32 +01:00
OBattler
490c04fcae Current WIP code. 2020-02-29 19:12:23 +01:00