claunia/86Box
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15 Commits

Author SHA1 Message Date
RichardG867
2ff06457d5 Hardware monitor refactoring, part 2 2020-05-18 22:54:59 -03:00
RichardG867
671e532599 Calibrate hardware monitor values on the remaining boards 2020-05-18 00:08:32 -03:00
RichardG867
cff43c07c3 SPD improvements 
* Word and block read support for the SMBus ROM
* Asymmetric module support to cover more RAM configurations
* Add 86Box version as revision code
* Fix supported CAS latencies
* Fixed slot count on the GA-6BXC
 2020-05-17 00:47:51 -03:00
tiseno100
9eeb79e090 Minor changes for the SuperMicro's 
Fixed the board SPD's, added some basic notes from testing, Added their hardware sensors and few more minor changes.
 2020-05-14 21:40:37 +03:00
tiseno100
82b73e7941 SuperMicro WinBios 440LX & 440BX + Slot 2 440GX bringup 2020-05-12 19:33:26 +03:00
tiseno100
722dd16c71 Replaced the Bora Pro with the Tyan Tsunami 
It's a more functional and more stable board than the previous one. Works as intended. Might help to revive the abandoned PC87309 code from PCem-X
 2020-05-02 21:27:05 +03:00
RichardG867
3d5f9de060 ASUS P/I-P65UP5 2020-04-26 13:43:06 -03:00
tiseno100
73b51bf573 Dev branch all machines with missing SIO chips + added the VS440FX 
This board returns D4 POST with no output. Needs further examination. Meant for the future PC87307 implementation.

Also all boards that miss their SIO chips got Dev Branched just in case 2.10 gets released while some miss their SIO.
 2020-04-25 18:59:37 +03:00
RichardG867
e7d7528dd3 ASUS P3B-F and CUBX motherboards 2020-04-17 15:34:05 -03:00
nerd73
9bc74bbf00 Add the ECS P6KFX-A, a 440FX Slot 1 machine. 
Adds the ECS P6KFX-A as well as appropriate CPU tables for an early Slot 1 motherboard without Deschutes or 100 MHz FSB support. Also fixes a minor bug with 266 MHz Pentium IIs and ISA clock frequencies.
 2020-04-16 18:30:37 -06:00
OBattler
dc22997027 The Asus P2B-LS now has the Super I/O chip (and with it, the FDC) again. 2020-04-13 23:25:56 +02:00
OBattler
61f0ae7954 Better ACPI implementation (currently only on PIIX4/PIIX4E/SMSC southbridges), finished the SMSC southbridge (but the Atrend BIOS still hangs, need to figure out why), and fixed Tandy EEPROM saving. 2020-04-13 20:01:47 +02:00
OBattler
d75e901a83 Moved the Intel i686 CPU's and related machines out of the Dev branch. 2020-04-10 20:01:26 +02:00
tiseno100
5bdfde00d5 Add the Abit BF6 2020-04-05 15:55:11 +03:00
tiseno100
e51a208341 Added few changes 
- Added a skeletal 596B(Doesn't work properly)
- Splitted the Socket 8, Slot 1 & Socket 370 machines to their respective files
 2020-04-01 17:26:28 +03:00