Commit Graph

202 Commits

Author SHA1 Message Date
RichardG867
74bda71219 mem: Fix upper bits in PSE-36 translation 2024-12-21 20:43:18 -03:00
Alexander Babikov
f1a60d8242 Add PSE-36 (36-bit page size extension) support
Code ported from PCBox
2024-12-21 20:44:31 +05:00
OBattler
5e2559452c A small sanity check in mem/mem.c. 2024-12-21 13:59:40 +01:00
OBattler
80a0c48785 Memory mappings can now specify to ignore some address bits, fixes some Cirrus Logic drivers for Windows 3.1x freezing. 2024-12-18 01:19:50 +01:00
OBattler
250f477200 MMU: No longer page fault on CPU-initiated writes to write-protected pages (eg. when setting segment accessed bit), fixes OpenBSD 7.0, fixes #1853. 2024-09-29 13:23:43 +02:00
Jasmine Iwanek
f4b63caf0b One line per file in CmakeLists.txt 2024-09-04 18:34:06 -04:00
OBattler
fb3b46f648 Unbroke SCO Xenix on the 286/386 interpreter, this will do until the prefetch queue is finally implemented. 2024-08-29 01:57:22 +02:00
OBattler
f19a5447be Improved the SCO Xenix fix, fixes OS/2 booting, fixes #4762. 2024-08-29 01:26:32 +02:00
OBattler
91874e231a The monster FDC ROM is now optionally writable (also finally made the SCSI NVR's per-instance), closes #4623. 2024-07-22 03:19:40 +02:00
OBattler
1205392e4f Wells AT, DataExpert 386WB, Genoa Unknown 486, Gigabyte GA-486L, Alaris Cougar, and updates to CMakeLists.txt and chipset.h. to finally include opti391.c and opti499.c. 2024-07-21 06:09:03 +02:00
Alexander Babikov
bf4977b20c mem.c: Remove duplicate definitions (#4524)
Fixes building with debug registers for 486+ enabled
2024-06-10 19:51:15 -03:00
OBattler
86de260b24 mem.c: Double the pages array size for 386SX, fixes the segmentation fault when trying to use the Amstrad MegaPC with more than 16 MB and the 486+ interpreter. 2024-06-07 14:19:10 +02:00
Alexander Babikov
a07ffdecab Restore the debug register operation on 486+
But put it behind a compile-time option due to performance hits
Also add the DE flag to CPUID on supported CPUs
2024-05-24 03:35:08 +05:00
OBattler
b0542322bf Fixed DRB DIMM splitting (AMI Apollo now boots with 8 MB RAM), and extended the MB500N workaround to MR BIOS'es as well. 2024-05-09 00:47:45 +02:00
OBattler
15e3876e21 Prepare WD76C10 for 286/386 interpreter selection, exempt IBM 486BL and all Cyrix'es from the 286/386 interpreter. 2024-04-24 06:06:09 +02:00
OBattler
2ab99dda0b Made LOCK instruction legality more accurate on 386, closes #4132. 2024-02-10 03:05:56 +01:00
OBattler
5a3d74d64f 286/386 interpreter fixes - the correct opcode arrays are now used and fixed the debug registers. 2024-02-09 12:14:35 +01:00
OBattler
0a5d25fdde Memory: Disable _mem_exec in phys() accesses when not using the 486+ interpreter or dynamic recompiler, and write protect support in preparation for the WD76C10 rewrite. 2024-02-02 05:25:40 +01:00
OBattler
13330322b4 Interim mem.c/h code and a slight optimization to do_mmutranslate(). 2024-01-24 05:56:50 +01:00
OBattler
485e73d4da Added the Gateway Tomahawk (430TX machine). 2024-01-21 01:55:05 +01:00
OBattler
f2971a132f Disable the debug registers on 486+. 2024-01-14 21:47:52 +01:00
Cacodemon345
ea5729c802 Revert "Add more missing memory checking"
This reverts commit 2eb39a8c5c.

Likely unneeded
2024-01-15 02:07:13 +06:00
Cacodemon345
2eb39a8c5c Add more missing memory checking 2024-01-15 01:19:21 +06:00
Cacodemon345
911deeab1a Fix single-step trap flag setting 2024-01-15 01:09:52 +06:00
Cacodemon345
c3fa0fc18b Also account for data address breakpoints 2024-01-14 21:32:43 +06:00
Cacodemon345
f4f252c0b7 Implement x86 debug registers 2024-01-14 15:26:40 +06:00
RichardG867
313bf84b04 i2c_eeprom: Random cleanups 2023-12-18 15:42:24 -03:00
OBattler
c9b092be3e Fixed accidentally swapped conditions in mem/spd.c, fixes RAM detection on 686 boards. 2023-11-02 05:53:05 +01:00
OBattler
88934ab0ca IDE fixes and finished the SiS 5511. 2023-10-20 02:57:50 +02:00
OBattler
fc8edd47fa Did the same in mem/mmu_2386.c. 2023-10-07 22:55:44 +02:00
Jasmine Iwanek
ef41b7c3bf More linting in src/mem 2023-08-22 23:54:07 -04:00
OBattler
1d48363803 The 286/386 interpreter now has its own variant of x86seg.c. 2023-08-21 02:56:33 +02:00
OBattler
565421a252 Serial receive/transmit rework (uses the new fifo.c API) and a small GDB stub fix. 2023-08-18 05:57:32 +02:00
OBattler
f0ab35132b Always allocate 16 more bytes of RAM to mitigate potential segmentation faults on certain accessed by the old recompilers. 2023-08-18 03:16:37 +02:00
OBattler
bf38c4adef More UI work, added Slovak and Catalan translations, and fixed mmutranslate on the 286/386, fixes #3587, #3591. 2023-08-17 02:46:37 +02:00
OBattler
e781d4905e 286/386 interpreter fixes. 2023-08-15 22:11:32 +02:00
OBattler
b203b28350 Assorted copyright header fixes. 2023-08-14 21:51:47 +02:00
OBattler
b1c5cbaf47 Split the 286/386 interpreter away from the 486+ one (the 286/386 interpreter does not use the pccache's, readlookup's, and writelookup's as the emulated CPU's are too slow for them to be required, and also has more accurate FPU timings), also added a LPT status read function for future-proofing. 2023-08-08 19:39:52 +02:00
Jasmine Iwanek
16714b399b Fix another mistake I made in row.c 2023-08-04 11:09:26 -04:00
Jasmine Iwanek
998cfe5cc8 Constification 2023-07-25 17:59:24 -04:00
Jasmine Iwanek
ee695e71f9 More sonarlint work 2023-07-25 17:59:22 -04:00
OBattler
da98030f80 Part 6. 2023-07-12 00:40:51 +02:00
OBattler
b2d7dd6f9c Part 5. 2023-07-12 00:38:22 +02:00
OBattler
22d84443a8 DRAM row implementation, part 1. 2023-07-12 00:15:43 +02:00
Jasmine Iwanek
1116aadb6f Another round of sonarlint work 2023-07-04 10:53:44 -04:00
OBattler
feece51403 Fixed low BIOS mapping so it maps correctly with a 512k or biggeer BIOS as well. 2023-07-03 02:34:54 +02:00
Jasmine Iwanek
922c4335ae Next round of sonarlint cleanups 2023-06-27 21:17:13 -04:00
OBattler
2fe3bcd5d2 Do the wraparounds properly on 64-bit binaries, fixes #3421. 2023-06-25 22:20:11 +02:00
OBattler
e4d860c025 Replaced calls to flushmmucache_cr3() to direct calls to flushmmucache_nopc() and removed the #define. 2023-06-11 22:12:18 +02:00
OBattler
f4c59e907d Removed mmu_invalidate(). 2023-06-11 22:07:32 +02:00