Commit Graph

15 Commits

Author SHA1 Message Date
OBattler
96228bc41d Overhauled the SiS 496/497 chipset emulation (and added the DRB locking to it) (later Zida Tomato 4DPS BIOS'es now work, and we now use the actual 1.72), fixed the W83787F and FDC37C932FR Super I/O chips, removed the no longer needed Acer M3A registers (that's now correctly handled as FDC37C932FR GPIO), and a number of bugfixes here and there. 2020-06-29 01:10:20 +02:00
RichardG867
9cecbfa33a Remove extraneous logging lines 2020-06-26 22:16:56 -03:00
RichardG867
7775e52c0e Disable SPD logging 2020-06-26 22:15:36 -03:00
RichardG867
012f01cc9f Fix Apollo DRB wraparound 2020-06-26 22:15:21 -03:00
RichardG867
aea5461255 Implement DRB locking for VIA Apollo chipsets 2020-06-26 22:05:32 -03:00
RichardG867
2553dbce8f Unified DRB locking logic, added DRB locking to VIA VPX, and fixed SPD 2020-06-26 21:03:46 -03:00
RichardG867
84e378695a Fix SPD presence detection 2020-06-26 18:24:15 -03:00
RichardG867
93b909fe59 Merge branch 'master' of https://github.com/86Box/86Box 2020-06-26 18:05:57 -03:00
RichardG867
5115214d01 DRB locking implementation 2020-06-26 18:05:27 -03:00
David Hrdlička
23efba22f1 include: move version defines out to version.h 2020-06-26 13:28:10 +02:00
OBattler
8bf15f535b Pages above the top of RAM now have mem[] pointing to a 4096-byte array of FF's, and fixed the naming and indentation of the P5MP3 in machine/machine_table.c. 2020-06-21 04:03:14 +02:00
OBattler
d2dbf49e3c Added the Catalyst 28F010 Flash chip needed by the ASUS P5MP3, fixed a memory leak in the Intel Flash close code (it was not free'ing dev->array), and unified all the flash chip header files into one single flash.h. 2020-06-21 03:58:32 +02:00
OBattler
8837d5d882 Implemented the National Semiconductors PC87307, PC87309, PC87332, and PC97307 Super I/O chips, fixed a number of bugs, and removed two machines from the Dev branch due to them now having the correct Super I/O chips. 2020-06-14 21:59:45 +02:00
OBattler
611dd62fab Some chipset extended SMRAM-related clean-ups and SMM-supporting chipsets now correctly set shadow RAM states for SMM mode in addition to non-SMM mode, fixes Windows 98 SE hanging in a SMI# handler. 2020-06-14 14:50:30 +02:00
OBattler
ca55e2a12a More reorganization and finally merged the two makefiles. 2020-06-13 12:32:09 +02:00