Added 4x2 and 8x1 color patterns in the OpRect side, fixes OS/2 8-bit color.
Unthreaded the cards as well.
ISA versions can access the dword/long mapping too, fixes more graphical bugs in various operating systems such as Windows 95.
Removed the threaded FIFO on the ViRGE cards due to bugs, instead, relying on a non-threaded FIFO again.
Fixed some 8MB parts of the blitter for the ViRGE/VX-based STB Velocity 3D card so that 8MB RAM detection doesn't glitch everything else, including the blitter.
- Renamed `cpp11_thread.cpp` to `thread.cpp`
- Removed features that are only supported by Win32 threads (`thread_wait` with timeout and mutex with spinlock)
- Fixed formatting in `thread.cpp`
Added the AT&T 2xc498 Precision RAMDAC.
Added 1MB configurations to the Cirrus Logic GD5434 as well as re-organized the memory size options of the other Cirrus cards.
Separated the et4000w32/i blitter from the standard et4000w32p blitter and properly implemented the X/Y Count route.
Added several Diamond Cirrus cards.
Added Number Nine S3 cards (868 and 968-based).
Fixed the WD90c30 1MB modes.
Re-organized the video card names.
Bit 1 is of 0x3DA (read only) is apparently required to make the OS/2 Tseng ET4000W32/i drivers work fine, fixes hangs upon reaching the GUI with said drivers.
Avoid division by zero in the blitter of the ET4000W32/i under OS/2.
Video changes (PVGA):
Fixes mode changes of the PVGA1a, including the built-in video card of the Amstrad 2086/3086.
Improved the banking of the ATI 28800-5 cards (VGA Charger and VGA Wonder XL).
Improved the skew and horizontal display of some of the ET4000W32P cards as well as the cursor.
Made the Oak OTI 077 and PVGA WD90c30 cards use the Sierra 11487 (actually a clone is used in the real cards).
For the WD90c30, changed the way the hack is involved.
Reverted some changes of the S3 Vision/Trio that originally made glitches, now the glitches are gone and the accelerator renders fine.
Re-organized the Sierra 1148x RAMDAC's and added the 11486 (Mark 1).
MCA SVGA cards use the full 32-bit mapping.