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533 Commits

Author SHA1 Message Date
OBattler
801ebcc1db RichardG is right, the Compaq 386 Memory Control is absolutely not the OPTi 391. 2023-08-24 20:25:27 +02:00
OBattler
fc8b4ce828 Disabled the DRAM row emulation on the 420EX and SiS 496/497, should fix memory with machines using those chipsets. 2023-08-24 16:59:57 +02:00
Jasmine Iwanek
729aa24f1b More linting in src/chipset 2023-08-22 19:50:44 -04:00
OBattler
6c4a4be6be Timer clean-ups. 2023-08-19 05:26:49 +02:00
OBattler
274b44ab00 Reimplemented ALi M1543(C) NVR SMI# handling, fixes #3278. 2023-08-19 01:39:30 +02:00
OBattler
29c153d287 Reverted Cacodemon345's broken USB OHCI implementation, fixes #3597. 2023-08-18 23:16:54 +02:00
Jasmine Iwanek
375f69ed61 Fix more compile warnings 2023-08-15 13:28:04 -04:00
OBattler
025edcf363 The missing opti602.c. 2023-08-15 14:52:42 +02:00
OBattler
f7b5a566cb Added the OPTi 82c602, on-board CL-GD 5430, and also gave the PC87306 Super I/O chip its full NVR capabilities, fixes #2877. 2023-08-15 06:45:02 +02:00
OBattler
b203b28350 Assorted copyright header fixes. 2023-08-14 21:51:47 +02:00
OBattler
f23050774c The missing chipset/compaq_386.c. 2023-08-14 05:06:04 +02:00
OBattler
27c56f608d Compaq 386 machine fixes and Compaq EGA palette mux timer, fixes #3494. 2023-08-14 05:00:56 +02:00
Jasmine Iwanek
81bb5e564b Better fallthrough annotation macro. 2023-08-09 20:09:36 -04:00
OBattler
7f4fdf09b5 Added two TODO comments in chipset/opti895.c. 2023-08-07 03:30:23 +02:00
OBattler
c30d5d90b7 PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable. 2023-08-07 03:04:52 +02:00
OBattler
32c17a76de Merge branch 'master' of https://github.com/86Box/86Box 2023-08-04 16:44:01 +02:00
OBattler
646bc143f3 Fixed a crash-causing signedness mess in the 420EX code. 2023-08-04 16:43:42 +02:00
RichardG867
9d19b0dc05 UMC: Fix ISA speed select oversight 2023-08-01 10:05:26 -03:00
Jasmine Iwanek
d2f42198fd Fix clang build failure 2023-07-26 12:41:18 -04:00
Jasmine Iwanek
998cfe5cc8 Constification 2023-07-25 17:59:24 -04:00
Jasmine Iwanek
db66543959 Apple build fix 2023-07-25 17:59:22 -04:00
Jasmine Iwanek
ee695e71f9 More sonarlint work 2023-07-25 17:59:22 -04:00
OBattler
25c80854b1 Fixed a DRAM row boundary initialization bug in the SiS 496/497 code. 2023-07-22 15:49:27 +02:00
OBattler
e90c17c4c9 Corrected the ALi M148x IRQ mappings. 2023-07-21 20:15:30 +02:00
OBattler
a4703ac0de Small 450KX fixes. 2023-07-12 00:43:47 +02:00
OBattler
33ff6b77e8 Part 4. 2023-07-12 00:37:51 +02:00
OBattler
20e771ad3a Part 2. 2023-07-12 00:32:21 +02:00
OBattler
8c94de0be1 Disabled register EE reads and writes on the VLSI VL82C480 chipset. 2023-07-06 20:33:23 +02:00
Jasmine Iwanek
922c4335ae Next round of sonarlint cleanups 2023-06-27 21:17:13 -04:00
Jasmine Iwanek
21adfd4d50 Next round of sonarlint cleanups 2023-06-26 18:28:13 -04:00
OBattler
a312c10129 Disabled excess logging in chipset/ali1429.c. 2023-06-19 01:35:30 +02:00
OBattler
1e3154cb74 Increased the size of the regs array in the Eteq ET6000 code. 2023-06-18 23:46:10 +02:00
OBattler
68e6d7eb40 And the forgotten one in chipset/scat.c. 2023-06-11 22:13:55 +02:00
Jasmine Iwanek
d1127e68fa Even more sonarlint work 2023-06-04 23:39:14 -04:00
Jasmine Iwanek
6c1e4a8e2c Some code smell fixes from sonarlint 2023-05-15 19:25:56 -04:00
OBattler
6bb5942ad1 Finish merge. 2023-05-16 00:53:59 +02:00
OBattler
ecb8091d41 Fixed Cacodemon345's OHCI mess and implemented proper OHCI IRQ updating, fixes the Gigabyte GA-5AX POST. 2023-05-07 02:53:04 +02:00
Cacodemon345
9e3f11d62e ali1543: Fix wrong function signature 2023-05-07 00:35:38 +06:00
Cacodemon345
d6ff34208c usb: Hook up USB interrupts to rest of the chipsets 2023-05-06 15:36:44 +06:00
Cacodemon345
3f461afeeb usb: start hooking up USB interrupts to chipsets 2023-05-05 00:28:08 +06:00
OBattler
8fca57aa79 Universalize the keyboard and mouse latches again, fixes #3280. 2023-05-01 01:35:16 +02:00
cartifanwlr
310dbd1079 Fix build by adding pic.h include in sis_85c50x.c 2023-04-29 12:12:50 +03:00
OBattler
0f2301c9bf The SiS 50x now initializes the PS/2 keyboard and mouse IRQ latch if a PS/2 keyboard controller is present, needed for the AMI WinBIOS CMOS setup on the Excalibur PCI II. 2023-04-28 23:38:55 +02:00
OBattler
78a897f07a Some minor fixes, the PS/2 mouse command F0h (set remote mode) is now implemented, the PS/2 mouse command F3h (set sample rate) now actually changes the host mouse polling rate, and the Intel SIO IB and ZB now forcibly initialize a keyboard and mouse IRQ latch if the board has a PS/2 keyboard controller, to simulate the presence of a latch external to the chip. 2023-04-26 01:42:23 +02:00
OBattler
3b54cb085e Some minor bugfixes. 2023-04-24 02:47:17 +02:00
OBattler
19d155cdd7 Keyboard controller file split and assorted clean-ups and fixes 2023-04-19 23:34:32 +02:00
OBattler
f9d6f9424e Fixed a minor typo in the VIA PIPC code. 2023-04-12 01:56:03 +02:00
OBattler
ef17003f1b Fixed the "minor bug fix" in the AT / PS/2 keyboard controller, reworked PS/2 keyboard controller IRQ latches, and correctly disabled memory top remaps if there's more than (16 MB - remap size) RAM (fixes segmentation faults on some machines with 16+ MB of RAM). 2023-04-11 23:21:52 +02:00
RichardG867
92dd28efc1 VIA PIPC/AC97: Fixed and enabled software FM mode 2023-03-24 20:53:39 -03:00
RichardG867
6658374969 Merge branch 'master' of ssh://github.com/86Box/86Box 2023-03-04 13:23:03 -03:00