/* * 86Box A hypervisor and IBM PC system emulator that specializes in * running old operating systems and software designed for IBM * PC systems and compatibles from 1981 through fairly recent * system designs based on the PCI bus. * * This file is part of the 86Box distribution. * * Implementation of 486 Miscellaneous machines. * * Authors: Miran Grca, * * Copyright 2016-2025 Miran Grca. */ #include #include #include #include #include #define HAVE_STDARG_H #include <86box/86box.h> #include "cpu.h" #include <86box/timer.h> #include <86box/io.h> #include <86box/device.h> #include <86box/chipset.h> #include <86box/keyboard.h> #include <86box/mem.h> #include <86box/nvr.h> #include <86box/pci.h> #include <86box/dma.h> #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/fdc_ext.h> #include <86box/gameport.h> #include <86box/pic.h> #include <86box/pit.h> #include <86box/rom.h> #include <86box/sio.h> #include <86box/hdc.h> #include <86box/port_6x.h> #include <86box/port_92.h> #include <86box/video.h> #include <86box/flash.h> #include <86box/scsi_ncr53c8xx.h> #include <86box/hwm.h> #include <86box/machine.h> #include <86box/plat_unused.h> #include <86box/sound.h> /* STPC Client */ int machine_at_itoxstar_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/itoxstar/STARA.ROM", 0x000c0000, 262144, 0); if (bios_only || !ret) return ret; machine_at_common_init_ex(model, 2); pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x1F, PCI_CARD_NORMAL, 1, 2, 3, 4); device_add_params(&w83977_device, (void *) (W83977F | W83977_AMI)); device_add(&stpc_client_device); device_add(&sst_flash_29ee020_device); device_add(&w83781d_device); /* fans: Chassis, CPU, unused; temperatures: Chassis, CPU, unused */ hwm_values.fans[2] = 0; /* unused */ hwm_values.temperatures[2] = 0; /* unused */ hwm_values.voltages[0] = 0; /* Vcore unused */ return ret; } /* STPC Consumer-II */ int machine_at_arb1423c_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/arb1423c/A1423C.v12", 0x000c0000, 262144, 0); if (bios_only || !ret) return ret; machine_at_common_init_ex(model, 2); pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x1F, PCI_CARD_NORMAL, 1, 0, 0, 0); pci_register_slot(0x1E, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x1D, PCI_CARD_NORMAL, 3, 4, 1, 2); device_add_params(&w83977_device, (void *) (W83977F | W83977_AMI)); device_add(&stpc_consumer2_device); device_add(&winbond_flash_w29c020_device); return ret; } int machine_at_arb1479_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/arb1479/1479A.rom", 0x000c0000, 262144, 0); if (bios_only || !ret) return ret; machine_at_common_init_ex(model, 2); pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x1F, PCI_CARD_NORMAL, 1, 0, 0, 0); pci_register_slot(0x1E, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x1D, PCI_CARD_NORMAL, 3, 4, 1, 2); device_add_params(&w83977_device, (void *) (W83977F | W83977_AMI)); device_add(&stpc_consumer2_device); device_add(&winbond_flash_w29c020_device); return ret; } int machine_at_iach488_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/iach488/FH48800B.980", 0x000c0000, 262144, 0); if (bios_only || !ret) return ret; machine_at_common_init_ex(model, 2); pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); device_add_params(&w83977_device, (void *) (W83977F | W83977_AMI)); device_add(&stpc_consumer2_device); device_add(&sst_flash_29ee020_device); return ret; } /* STPC Elite */ int machine_at_pcm9340_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/pcm9340/9340v110.bin", 0x000c0000, 262144, 0); if (bios_only || !ret) return ret; machine_at_common_init_ex(model, 2); pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x1D, PCI_CARD_NORMAL, 4, 1, 2, 3); pci_register_slot(0x1E, PCI_CARD_NORMAL, 3, 4, 1, 2); pci_register_slot(0x1F, PCI_CARD_NORMAL, 2, 3, 4, 1); device_add_inst_params(&w83977_device, 1, (void *) (W83977F | W83977_AMI)); device_add_inst_params(&w83977_device, 2, (void *) W83977F); device_add(&stpc_elite_device); device_add(&sst_flash_29ee020_device); return ret; } /* STPC Atlas */ int machine_at_pcm5330_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/pcm5330/5330_13b.bin", 0x000c0000, 262144, 0); if (bios_only || !ret) return ret; machine_at_common_init_ex(model, 2); pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x0D, PCI_CARD_SOUTHBRIDGE_IDE, 0, 0, 0, 0); pci_register_slot(0x0E, PCI_CARD_SOUTHBRIDGE_USB, 1, 2, 3, 4); pci_register_slot(0x13, PCI_CARD_NORMAL, 1, 2, 3, 4); device_add(&stpc_serial_device); device_add_params(&w83977_device, (void *) (W83977F | W83977_370 | W83977_AMI)); device_add(&stpc_atlas_device); device_add(&sst_flash_29ee020_device); return ret; }