590 lines
11 KiB
C
590 lines
11 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the Intel PIC chip emulation.
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*
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* Version: @(#)pic.c 1.0.7 2020/01/21
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*
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* Author: Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2016-2020 Miran Grca.
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*/
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#include <stdarg.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include "86box.h"
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#include "cpu.h"
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#include "machine.h"
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#include "86box_io.h"
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#include "pci.h"
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#include "pic.h"
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#include "timer.h"
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#include "pit.h"
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int output;
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int intclear;
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int keywaiting = 0;
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int pic_intpending;
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PIC pic, pic2;
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uint16_t pic_current;
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static int shadow = 0;
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#ifdef ENABLE_PIC_LOG
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int pic_do_log = ENABLE_PIC_LOG;
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static void
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pic_log(const char *fmt, ...)
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{
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va_list ap;
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if (pic_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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#define pic_log(fmt, ...)
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#endif
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void
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pic_updatepending()
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{
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uint16_t temp_pending = 0;
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if (AT) {
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if ((pic2.pend & ~pic2.mask) & ~pic2.mask2)
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pic.pend |= pic.icw3;
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else
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pic.pend &= ~pic.icw3;
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}
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pic_intpending = (pic.pend & ~pic.mask) & ~pic.mask2;
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if (AT) {
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if (!((pic.mask | pic.mask2) & pic.icw3)) {
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temp_pending = ((pic2.pend&~pic2.mask)&~pic2.mask2);
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temp_pending <<= 8;
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pic_intpending |= temp_pending;
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}
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}
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pic_log("pic_intpending = %i %02X %02X %02X %02X\n", pic_intpending, pic.ins, pic.pend, pic.mask, pic.mask2);
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pic_log(" %02X %02X %02X %02X %i %i\n", pic2.ins, pic2.pend, pic2.mask, pic2.mask2, ((pic.mask | pic.mask2) & (1 << 2)), ((pic2.pend&~pic2.mask)&~pic2.mask2));
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}
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void
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pic_reset()
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{
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pic.icw=0;
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pic.mask=0xFF;
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pic.mask2=0;
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pic.pend=pic.ins=0;
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pic.vector=8;
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pic.read=1;
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pic2.icw=0;
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pic2.mask=0xFF;
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pic.mask2=0;
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pic2.pend=pic2.ins=0;
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pic_intpending = 0;
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}
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void
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pic_set_shadow(int sh)
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{
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shadow = sh;
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}
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void
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pic_update_mask(uint8_t *mask, uint8_t ins)
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{
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int c;
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*mask = 0;
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for (c = 0; c < 8; c++) {
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if (ins & (1 << c)) {
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*mask = 0xff << c;
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return;
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}
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}
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}
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static int
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picint_is_level(uint16_t irq)
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{
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if (PCI)
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return pci_irq_is_level(irq);
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else {
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if (irq < 8)
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return (pic.icw1 & 8) ? 1 : 0;
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else
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return (pic2.icw1 & 8) ? 1 : 0;
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}
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}
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/* Should this really EOI *ALL* IRQ's at once? */
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static void
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pic_autoeoi()
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{
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int c;
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for (c = 0; c < 8; c++) {
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if (pic.ins & ( 1 << c)) {
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pic.ins &= ~(1 << c);
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pic_update_mask(&pic.mask2, pic.ins);
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if (AT) {
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if (((1 << c) == pic.icw3) && (pic2.pend & ~pic2.mask) & ~pic2.mask2)
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pic.pend |= pic.icw3;
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}
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pic_updatepending();
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return;
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}
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}
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}
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void
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pic_write(uint16_t addr, uint8_t val, void *priv)
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{
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int c;
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addr &= ~0x06;
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if (addr&1) {
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pic_log("%04X:%04X: write: %02X\n", CS, cpu_state.pc, val);
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switch (pic.icw) {
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case 0: /*OCW1*/
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pic.mask=val;
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pic_updatepending();
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break;
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case 1: /*ICW2*/
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pic.vector=val&0xF8;
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pic_log("ICW%i ->", pic.icw + 1);
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if (pic.icw1 & 2) pic.icw=3;
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else pic.icw=2;
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pic_log("ICW%i\n", pic.icw + 1);
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break;
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case 2: /*ICW3*/
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pic.icw3 = val;
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pic_log("PIC1 ICW3 now %02X\n", val);
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pic_log("ICW%i ->", pic.icw + 1);
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if (pic.icw1 & 1) pic.icw=3;
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else pic.icw=0;
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pic_log("ICW%i\n", pic.icw + 1);
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break;
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case 3: /*ICW4*/
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pic_log("ICW%i ->", pic.icw + 1);
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pic.icw4 = val;
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pic.icw=0;
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pic_log("ICW%i\n", pic.icw + 1);
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break;
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}
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} else {
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if (val & 16) { /*ICW1*/
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pic.mask = 0;
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pic.mask2 = 0;
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pic_log("ICW%i ->", pic.icw + 1);
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pic.icw = 1;
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pic.icw1 = val;
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pic_log("ICW%i\n", pic.icw + 1);
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pic.ins = 0;
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pic.pend = 0; /* Pending IRQ's are cleared. */
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pic_updatepending();
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}
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else if (!(val & 8)) { /*OCW2*/
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pic.ocw2 = val;
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if ((val & 0xE0) == 0x60) {
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pic.ins &= ~(1 << (val & 7));
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pic_update_mask(&pic.mask2, pic.ins);
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if (AT) {
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if (((val&7) == pic2.icw3) && (pic2.pend&~pic2.mask)&~pic2.mask2)
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pic.pend |= pic.icw3;
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}
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pic_updatepending();
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} else {
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for (c = 0; c < 8; c++) {
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if (pic.ins & (1 << c)) {
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pic.ins &= ~(1 << c);
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pic_update_mask(&pic.mask2, pic.ins);
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if (AT) {
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if (((1 << c) == pic.icw3) && (pic2.pend & ~pic2.mask) & ~pic2.mask2)
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pic.pend |= pic.icw3;
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}
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if ((c == 1) && keywaiting)
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intclear &= ~1;
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pic_updatepending();
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return;
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}
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}
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}
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} else { /*OCW3*/
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pic.ocw3 = val;
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if (val & 2)
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pic.read=(val & 1);
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}
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}
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}
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uint8_t
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pic_read(uint16_t addr, void *priv)
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{
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uint8_t ret = 0xff;
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if ((addr == 0x20) && shadow) {
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ret = ((pic.ocw3 & 0x20) >> 5) << 4;
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ret |= ((pic.ocw2 & 0x80) >> 7) << 3;
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ret |= ((pic.icw4 & 0x10) >> 4) << 2;
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ret |= ((pic.icw4 & 0x02) >> 1) << 1;
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ret |= ((pic.icw4 & 0x08) >> 3) << 0;
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} else if ((addr == 0x21) && shadow)
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ret = ((pic.vector & 0xf8) >> 3) << 0;
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else if (addr & 1)
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ret = pic.mask;
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else if (pic.read) {
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if (AT)
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ret = pic.ins | (pic2.ins ? 4 : 0);
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else
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ret = pic.ins;
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} else
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ret = pic.pend;
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pic_log("%04X:%04X: Read PIC 1 port %04X, value %02X\n", CS, cpu_state.pc, addr, val);
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return ret;
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}
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void
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pic_init()
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{
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shadow = 0;
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io_sethandler(0x0020, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, NULL);
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}
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void
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pic_init_pcjr()
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{
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shadow = 0;
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io_sethandler(0x0020, 0x0008, pic_read, NULL, NULL, pic_write, NULL, NULL, NULL);
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}
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static void
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pic2_autoeoi()
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{
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int c;
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for (c = 0; c < 8; c++) {
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if (pic2.ins & (1 << c)) {
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pic2.ins &= ~(1 << c);
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pic_update_mask(&pic2.mask2, pic2.ins);
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pic_updatepending();
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return;
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}
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}
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}
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void
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pic2_write(uint16_t addr, uint8_t val, void *priv)
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{
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int c;
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if (addr & 1) {
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switch (pic2.icw) {
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case 0: /*OCW1*/
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pic2.mask=val;
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pic_updatepending();
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break;
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case 1: /*ICW2*/
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pic2.vector=val & 0xF8;
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pic_log("PIC2 vector now: %02X\n", pic2.vector);
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if (pic2.icw1 & 2) pic2.icw=3;
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else pic2.icw=2;
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break;
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case 2: /*ICW3*/
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pic2.icw3 = val;
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pic_log("PIC2 ICW3 now %02X\n", val);
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if (pic2.icw1 & 1) pic2.icw=3;
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else pic2.icw=0;
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break;
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case 3: /*ICW4*/
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pic2.icw4 = val;
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pic2.icw=0;
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break;
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}
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} else {
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if (val & 16) { /*ICW1*/
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pic2.mask = 0;
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pic2.mask2 = 0;
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pic2.icw = 1;
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pic2.icw1 = val;
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pic2.ins = 0;
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pic2.pend = 0; /* Pending IRQ's are cleared. */
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pic.pend &= ~4;
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pic_updatepending();
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} else if (!(val & 8)) { /*OCW2*/
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pic2.ocw2 = val;
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if ((val & 0xE0) == 0x60) {
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pic2.ins &= ~(1 << (val & 7));
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pic_update_mask(&pic2.mask2, pic2.ins);
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pic_updatepending();
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} else {
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for (c = 0; c < 8; c++) {
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if (pic2.ins&(1<<c)) {
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pic2.ins &= ~(1<<c);
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pic_update_mask(&pic2.mask2, pic2.ins);
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pic_updatepending();
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return;
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}
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}
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}
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} else { /*OCW3*/
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pic2.ocw3 = val;
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if (val & 2)
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pic2.read=(val & 1);
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}
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}
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}
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uint8_t
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pic2_read(uint16_t addr, void *priv)
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{
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uint8_t ret = 0xff;
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if ((addr == 0xa0) && shadow) {
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ret = ((pic2.ocw3 & 0x20) >> 5) << 4;
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ret |= ((pic2.ocw2 & 0x80) >> 7) << 3;
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ret |= ((pic2.icw4 & 0x10) >> 4) << 2;
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ret |= ((pic2.icw4 & 0x02) >> 1) << 1;
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ret |= ((pic2.icw4 & 0x08) >> 3) << 0;
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} else if ((addr == 0xa1) && shadow)
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ret = ((pic2.vector & 0xf8) >> 3) << 0;
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else if (addr & 1)
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ret = pic2.mask;
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else if (pic2.read)
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ret = pic2.ins;
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else
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ret = pic2.pend;
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pic_log("%04X:%04X: Read PIC 2 port %04X, value %02X\n", CS, cpu_state.pc, addr, val);
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return ret;
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}
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void
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pic2_init()
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{
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io_sethandler(0x00a0, 0x0002, pic2_read, NULL, NULL, pic2_write, NULL, NULL, NULL);
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}
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void
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clearpic()
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{
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pic.pend=pic.ins=pic_current=0;
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pic_updatepending();
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}
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void
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picint_common(uint16_t num, int level)
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{
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int c = 0;
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if (!num) {
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pic_log("Attempting to raise null IRQ\n");
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return;
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}
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if (AT && (num == pic.icw3) && (pic.icw3 == 4))
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num = 1 << 9;
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while (!(num & (1 << c)))
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c++;
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if (AT && (num == pic.icw3) && (pic.icw3 != 4)) {
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pic_log("Attempting to raise cascaded IRQ %i\n");
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return;
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}
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if (!(pic_current & num) || !level) {
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pic_log("Raising IRQ %i\n", c);
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if (level)
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pic_current |= num;
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if (num>0xFF) {
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if (!AT)
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return;
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pic2.pend|=(num>>8);
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if ((pic2.pend&~pic2.mask)&~pic2.mask2)
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pic.pend |= (1 << pic2.icw3);
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} else
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pic.pend|=num;
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pic_updatepending();
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}
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}
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void
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picint(uint16_t num)
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{
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picint_common(num, 0);
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}
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void
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picintlevel(uint16_t num)
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{
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picint_common(num, 1);
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}
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void
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picintc(uint16_t num)
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{
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int c = 0;
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if (!num) {
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pic_log("Attempting to lower null IRQ\n");
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return;
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}
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if (AT && (num == pic.icw3) && (pic.icw3 == 4))
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num = 1 << 9;
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while (!(num & (1 << c)))
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c++;
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if (AT && (num == pic.icw3) && (pic.icw3 != 4)) {
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pic_log("Attempting to lower cascaded IRQ %i\n");
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return;
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}
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if (pic_current & num)
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pic_current &= ~num;
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pic_log("Lowering IRQ %i\n", c);
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if (num > 0xff) {
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if (!AT)
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return;
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pic2.pend &= ~(num >> 8);
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if (!((pic2.pend&~pic2.mask)&~pic2.mask2))
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pic.pend &= ~(1 << pic2.icw3);
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} else
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pic.pend&=~num;
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pic_updatepending();
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}
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static int
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pic_process_interrupt(PIC* target_pic, int c)
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{
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uint8_t pending = target_pic->pend & ~target_pic->mask;
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int ret = -1;
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int pic_int = c & 7;
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int pic_int_num = 1 << pic_int;
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int in_service = 0;
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in_service = (target_pic->ins & (pic_int_num - 1)); /* Is anything of higher priority already in service? */
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in_service |= (target_pic->ins & pic_int_num); /* Is the current IRQ already in service? */
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if (AT) {
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/* AT-specific stuff. */
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if (c >= 8)
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in_service |= (pic.ins & 0x03); /* IRQ 8 to 15, are IRQ's with higher priorities than the
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cascade IRQ already in service? */
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/* For IRQ 0 to 7, the cascade IRQ's in service bit indicates that one or
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more IRQ's between 8 and 15 are already in service. */
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}
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if ((pending & pic_int_num) && !in_service) {
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if (!((pic_current & (1 << c)) && picint_is_level(c)))
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target_pic->pend &= ~pic_int_num;
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else if (!picint_is_level(c))
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target_pic->pend &= ~pic_int_num;
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target_pic->ins |= pic_int_num;
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pic_update_mask(&target_pic->mask2, target_pic->ins);
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if (AT && (c >= 8)) {
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if (!((target_pic->pend & ~target_pic->mask) & ~target_pic->mask2))
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pic.pend &= ~(1 << pic2.icw3);
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pic.ins |= (1 << pic2.icw3); /*Cascade IRQ*/
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pic_update_mask(&pic.mask2, pic.ins);
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}
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pic_updatepending();
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if (target_pic->icw4 & 0x02)
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(AT && (c >= 8)) ? pic2_autoeoi() : pic_autoeoi();
|
|
|
|
if (!c && (pit2 != NULL))
|
|
pit_ctr_set_gate(&pit2->counters[0], 0);
|
|
|
|
ret = pic_int + target_pic->vector;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
|
|
int
|
|
picinterrupt()
|
|
{
|
|
int c, d;
|
|
int ret;
|
|
|
|
for (c = 0; c <= 7; c++) {
|
|
if (AT && ((1 << c) == pic.icw3)) {
|
|
for (d = 8; d <= 15; d++) {
|
|
ret = pic_process_interrupt(&pic2, d);
|
|
if (ret != -1) return ret;
|
|
}
|
|
} else {
|
|
ret = pic_process_interrupt(&pic, c);
|
|
if (ret != -1) return ret;
|
|
}
|
|
}
|
|
return -1;
|
|
}
|
|
|
|
|
|
void
|
|
dumppic()
|
|
{
|
|
pic_log("PIC1 : MASK %02X PEND %02X INS %02X LEVEL %02X VECTOR %02X CASCADE %02X\n", pic.mask, pic.pend, pic.ins, (pic.icw1 & 8) ? 1 : 0, pic.vector, pic.icw3);
|
|
if (AT)
|
|
pic_log("PIC2 : MASK %02X PEND %02X INS %02X LEVEL %02X VECTOR %02X CASCADE %02X\n", pic2.mask, pic2.pend, pic2.ins, (pic2.icw1 & 8) ? 1 : 0, pic2.vector, pic2.icw3);
|
|
}
|