335 lines
8.2 KiB
C
335 lines
8.2 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Emulation of the VIA VT82C686A/B integrated Super I/O.
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*
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*
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*
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* Authors: RichardG, <richardg867@gmail.com>
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*
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* Copyright 2020 RichardG.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/io.h>
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#include <86box/timer.h>
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#include <86box/pci.h>
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#include <86box/mem.h>
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#include <86box/rom.h>
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#include <86box/lpt.h>
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#include <86box/serial.h>
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#include <86box/fdd.h>
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#include <86box/fdc.h>
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#include <86box/sio.h>
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#include <86box/plat_unused.h>
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typedef struct vt82c686_t {
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uint8_t cur_reg;
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uint8_t last_val;
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uint8_t regs[25];
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uint8_t fdc_dma;
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uint8_t fdc_irq;
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uint8_t uart_irq[2];
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uint8_t lpt_dma;
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uint8_t lpt_irq;
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fdc_t *fdc;
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serial_t *uart[2];
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lpt_t *lpt;
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} vt82c686_t;
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static uint8_t
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get_lpt_length(vt82c686_t *dev)
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{
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uint8_t length = 4; /* non-EPP */
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if ((dev->regs[0x02] & 0x03) == 0x02)
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length = 8; /* EPP */
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return length;
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}
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static void
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vt82c686_fdc_handler(vt82c686_t *dev)
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{
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uint16_t io_base = (dev->regs[0x03] & 0xfc) << 2;
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fdc_remove(dev->fdc);
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if ((dev->regs[0x02] & 0x10) && !(dev->regs[0x0f] & 0x03))
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fdc_set_base(dev->fdc, io_base);
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fdc_set_dma_ch(dev->fdc, dev->fdc_dma);
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fdc_set_irq(dev->fdc, dev->fdc_irq);
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fdc_set_swap(dev->fdc, dev->regs[0x16] & 0x01);
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}
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static void
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vt82c686_lpt_handler(vt82c686_t *dev)
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{
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uint16_t io_mask;
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uint16_t io_base = dev->regs[0x06] << 2;
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int io_len = get_lpt_length(dev);
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io_base &= (0xff8 | io_len);
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io_mask = 0x3fc; /* non-EPP */
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if (io_len == 8)
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io_mask = 0x3f8; /* EPP */
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lpt_port_remove(dev->lpt);
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lpt_set_ext(dev->lpt, !!(dev->regs[0x10] & 0x80));
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switch (dev->regs[0x10] & 0x03) {
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case 0x01:
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lpt_set_epp(dev->lpt, !!(dev->regs[0x10] & 0x20));
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lpt_set_ecp(dev->lpt, 1);
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break;
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case 0x02:
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lpt_set_epp(dev->lpt, 1);
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lpt_set_ecp(dev->lpt, !!(dev->regs[0x10] & 0x20));
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break;
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}
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if (((dev->regs[0x02] & 0x03) != 0x03) && !(dev->regs[0x0f] & 0x11) && (io_base >= 0x100) && (io_base <= io_mask))
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lpt_port_setup(dev->lpt, io_base);
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if (dev->lpt_irq)
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lpt_port_irq(dev->lpt, dev->lpt_irq);
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else
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lpt_port_irq(dev->lpt, 0xff);
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lpt_port_dma(dev->lpt, dev->lpt_dma);
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}
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static void
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vt82c686_serial_handler(vt82c686_t *dev, int uart)
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{
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serial_remove(dev->uart[uart]);
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if ((dev->regs[0x02] & (0x04 << uart)) && !(dev->regs[0x0f] & ((0x04 << uart) | 0x01)))
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serial_setup(dev->uart[uart], dev->regs[0x07 + uart] << 2, dev->uart_irq[uart]);
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}
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static void
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vt82c686_write(uint16_t port, uint8_t val, void *priv)
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{
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vt82c686_t *dev = (vt82c686_t *) priv;
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/* Store last written value for echo (see comment on read). */
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dev->last_val = val;
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/* Write current register index on port 0. */
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if (!(port & 1)) {
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dev->cur_reg = val;
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return;
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}
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/* NOTE: Registers are [0xE0:0xF8] but we store them as [0x00:0x18]. */
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if ((dev->cur_reg < 0xe0) || (dev->cur_reg > 0xf8))
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return;
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uint8_t reg = dev->cur_reg & 0x1f;
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/* Read-only registers. */
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if ((reg < 0x02) || (reg == 0x0c))
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return;
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/* Write current register value on port 1. */
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dev->regs[reg] = val;
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/* Update device state. */
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switch (reg) {
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case 0x02:
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dev->regs[reg] &= 0xbf;
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vt82c686_lpt_handler(dev);
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vt82c686_serial_handler(dev, 0);
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vt82c686_serial_handler(dev, 1);
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vt82c686_fdc_handler(dev);
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break;
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case 0x03:
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dev->regs[reg] &= 0xfc;
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vt82c686_fdc_handler(dev);
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break;
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case 0x04:
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dev->regs[reg] &= 0xfc;
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break;
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case 0x05:
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dev->regs[reg] |= 0x03;
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break;
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case 0x06:
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vt82c686_lpt_handler(dev);
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break;
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case 0x07:
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case 0x08:
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dev->regs[reg] &= 0xfe;
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vt82c686_serial_handler(dev, reg == 0x08);
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break;
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case 0x0d:
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dev->regs[reg] &= 0x0f;
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break;
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case 0x0f:
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dev->regs[reg] &= 0x7f;
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vt82c686_lpt_handler(dev);
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vt82c686_serial_handler(dev, 0);
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vt82c686_serial_handler(dev, 1);
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vt82c686_fdc_handler(dev);
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break;
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case 0x10:
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dev->regs[reg] &= 0xf4;
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vt82c686_lpt_handler(dev);
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break;
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case 0x11:
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dev->regs[reg] &= 0x3f;
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break;
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case 0x13:
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dev->regs[reg] &= 0xfb;
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break;
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case 0x14:
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case 0x17:
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dev->regs[reg] &= 0xfe;
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break;
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case 0x16:
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dev->regs[reg] &= 0xf7;
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vt82c686_fdc_handler(dev);
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break;
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default:
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break;
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}
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}
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static uint8_t
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vt82c686_read(uint16_t port, void *priv)
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{
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vt82c686_t *dev = (vt82c686_t *) priv;
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/* NOTE: Registers are [0xE0:0xF8] but we store them as [0x00:0x18].
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Real 686B echoes the last read/written value when reading from
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registers outside that range. */
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if (!(port & 1))
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dev->last_val = dev->cur_reg;
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else if ((dev->cur_reg >= 0xe0) && (dev->cur_reg <= 0xf8))
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dev->last_val = dev->regs[dev->cur_reg & 0x1f];
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return dev->last_val;
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}
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/* Writes to Super I/O-related configuration space registers
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of the VT82C686 PCI-ISA bridge are sent here by via_pipc.c */
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void
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vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv)
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{
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vt82c686_t *dev = (vt82c686_t *) priv;
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switch (addr) {
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case 0x50:
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dev->fdc_dma = val & 0x03;
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vt82c686_fdc_handler(dev);
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dev->lpt_dma = (val >> 2) & 0x03;
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vt82c686_lpt_handler(dev);
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break;
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case 0x51:
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dev->fdc_irq = val & 0x0f;
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vt82c686_fdc_handler(dev);
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dev->lpt_irq = val >> 4;
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vt82c686_lpt_handler(dev);
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break;
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case 0x52:
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dev->uart_irq[0] = val & 0x0f;
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vt82c686_serial_handler(dev, 0);
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dev->uart_irq[1] = val >> 4;
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vt82c686_serial_handler(dev, 1);
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break;
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case 0x85:
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io_removehandler(FDC_PRIMARY_ADDR, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev);
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if (val & 0x02)
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io_sethandler(FDC_PRIMARY_ADDR, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev);
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break;
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default:
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break;
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}
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}
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static void
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vt82c686_reset(vt82c686_t *dev)
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{
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memset(dev->regs, 0, 21);
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dev->regs[0x00] = 0x3c;
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dev->regs[0x02] = 0x03;
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fdc_reset(dev->fdc);
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vt82c686_lpt_handler(dev);
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vt82c686_serial_handler(dev, 0);
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vt82c686_serial_handler(dev, 1);
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vt82c686_fdc_handler(dev);
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vt82c686_sio_write(0x85, 0x00, dev);
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}
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static void
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vt82c686_close(void *priv)
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{
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vt82c686_t *dev = (vt82c686_t *) priv;
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free(dev);
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}
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static void *
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vt82c686_init(UNUSED(const device_t *info))
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{
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vt82c686_t *dev = (vt82c686_t *) calloc(1, sizeof(vt82c686_t));
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dev->fdc = device_add(&fdc_at_smc_device);
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dev->fdc_dma = 2;
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dev->uart[0] = device_add_inst(&ns16550_device, 1);
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dev->uart[1] = device_add_inst(&ns16550_device, 2);
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dev->lpt = device_add_inst(&lpt_port_device, 1);
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dev->lpt_dma = 3;
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vt82c686_reset(dev);
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return dev;
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}
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const device_t via_vt82c686_sio_device = {
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.name = "VIA VT82C686 Integrated Super I/O",
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.internal_name = "via_vt82c686_sio",
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.flags = 0,
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.local = 0,
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.init = vt82c686_init,
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.close = vt82c686_close,
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.reset = NULL,
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.available = NULL,
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.speed_changed = NULL,
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.force_redraw = NULL,
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.config = NULL
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};
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