584 lines
18 KiB
C
584 lines
18 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Emulation of the Tseng Labs ET3000.
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*
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*
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*
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* Authors: Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2016-2018 Miran Grca.
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*/
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#include <stdarg.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include <86box/io.h>
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#include <86box/mca.h>
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#include <86box/mem.h>
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#include <86box/rom.h>
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#include <86box/device.h>
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#include <86box/timer.h>
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#include <86box/video.h>
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#include <86box/vid_svga.h>
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#include <86box/vid_svga_render.h>
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#define BIOS_ROM_PATH "roms/video/et3000/Tseng ET3000AX ISA VGA-VGA ULTRA.bin"
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typedef struct {
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const char *name;
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int type;
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svga_t svga;
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rom_t bios_rom;
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uint8_t pel_wd;
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uint8_t banking;
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uint8_t reg_3d8;
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uint8_t reg_3bf;
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uint8_t tries;
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uint8_t ext_enable;
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} et3000_t;
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static video_timings_t timing_et3000_isa = { VIDEO_ISA, 3, 3, 6, 5, 5, 10 };
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static uint8_t et3000_in(uint16_t addr, void *priv);
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static void et3000_out(uint16_t addr, uint8_t val, void *priv);
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#ifdef ENABLE_ET3000_LOG
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int svga_do_log = ENABLE_ET3000_LOG;
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static void
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et3000_log(const char *fmt, ...)
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{
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va_list ap;
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if (et3000_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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# define et3000_log(fmt, ...)
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#endif
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static uint8_t
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et3000_in(uint16_t addr, void *priv)
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{
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et3000_t *dev = (et3000_t *) priv;
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svga_t *svga = &dev->svga;
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uint8_t ret = 0xff;
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if ((addr >= 0x03b0) && (addr < 0x03bc) && (svga->miscout & 1))
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return 0xff;
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if ((addr >= 0x03d0) && (addr < 0x03dc) && !(svga->miscout & 1))
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return 0xff;
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switch (addr) {
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default:
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ret = svga_in(addr, svga);
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#ifdef ENABLE_ET3000_LOG
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if (addr != 0x03da)
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et3000_log("[%04X:%08X] [R] %04X = %02X\n", CS, cpu_state.pc, addr, ret);
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#endif
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break;
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case 0x3c1:
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/* It appears the extended attribute registers are **NOT**
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protected by key on the ET3000AX, as the BIOS attempts to
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write to attribute register 16h without the key. */
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ret = svga_in(addr, svga);
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et3000_log("[%04X:%08X] [R] %04X: %02X = %02X (%i)\n", CS, cpu_state.pc,
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addr, svga->attraddr, ret, dev->ext_enable);
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break;
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case 0x3c5:
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if ((svga->seqaddr >= 6) && !dev->ext_enable)
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ret = 0xff;
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else
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ret = svga_in(addr, svga);
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et3000_log("[%04X:%08X] [R] %04X: %02X = %02X (%i)\n", CS, cpu_state.pc,
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addr, svga->seqaddr, ret, dev->ext_enable);
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break;
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case 0x3cf:
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if ((svga->gdcaddr >= 0x0d) && !dev->ext_enable)
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ret = 0xff;
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else
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ret = svga_in(addr, svga);
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et3000_log("[%04X:%08X] [R] %04X: %02X = %02X (%i)\n", CS, cpu_state.pc,
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addr, svga->gdcaddr & 15, ret, dev->ext_enable);
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break;
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case 0x3cb: /*PEL Address/Data Wd*/
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ret = dev->pel_wd;
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et3000_log("[%04X:%08X] [R] %04X = %02X\n", CS, cpu_state.pc, addr, ret);
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break;
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case 0x3cd: /*Banking*/
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ret = dev->banking;
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et3000_log("[%04X:%08X] [R] %04X = %02X\n", CS, cpu_state.pc, addr, ret);
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break;
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case 0x3b4:
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case 0x3d4:
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ret = svga->crtcreg;
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et3000_log("[%04X:%08X] [R] %04X = %02X\n", CS, cpu_state.pc, addr, ret);
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break;
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case 0x3b5:
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case 0x3d5:
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if ((svga->crtcreg >= 0x18) && (svga->crtcreg < 0x23) && !dev->ext_enable)
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ret = 0xff;
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else if (svga->crtcreg > 0x25)
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ret = 0xff;
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else
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ret = svga->crtc[svga->crtcreg];
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et3000_log("[%04X:%08X] [R] %04X: %02X = %02X\n", CS, cpu_state.pc,
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addr, svga->crtcreg, ret);
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break;
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case 0x3b8:
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case 0x3d8:
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ret = dev->reg_3d8;
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et3000_log("[%04X:%08X] [R] %04X = %02X\n", CS, cpu_state.pc, addr, ret);
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break;
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case 0x3ba:
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case 0x3da:
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svga->attrff = 0;
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if (svga->cgastat & 0x01)
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svga->cgastat &= ~0x30;
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else
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svga->cgastat ^= 0x30;
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ret = svga->cgastat;
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if ((svga->fcr & 0x08) && svga->dispon)
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ret |= 0x08;
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break;
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case 0x3bf:
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ret = dev->reg_3bf;
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et3000_log("[%04X:%08X] [R] %04X = %02X\n", CS, cpu_state.pc, addr, ret);
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break;
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}
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return ret;
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}
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static void
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et3000_out(uint16_t addr, uint8_t val, void *priv)
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{
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et3000_t *dev = (et3000_t *) priv;
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svga_t *svga = &dev->svga;
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uint8_t old;
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uint8_t index;
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et3000_log("[%04X:%08X] [W] %04X = %02X\n", CS, cpu_state.pc, addr, val);
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if ((addr >= 0x03b0) && (addr < 0x03bc) && (svga->miscout & 1))
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return;
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if ((addr >= 0x03d0) && (addr < 0x03dc) && !(svga->miscout & 1))
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return;
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switch (addr) {
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case 0x3c0:
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/* It appears the extended attribute registers are **NOT**
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protected by key on the ET3000AX, as the BIOS attempts to
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write to attribute register 16h without the key. */
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if (svga->attrff && (svga->attraddr == 0x11) && (svga->attrregs[0x16] & 0x01))
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val = (val & 0xf0) | (svga->attrregs[0x11] & 0x0f);
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#ifdef ENABLE_ET3000_LOG
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if (svga->attrff && (svga->attraddr > 0x14))
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et3000_log("3C1: %02X = %02X\n", svga->attraddr, val);
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#endif
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if (svga->attrff && (svga->attraddr == 0x16)) {
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svga->attrregs[0x16] = val;
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svga->chain4 &= ~0x10;
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if (svga->gdcreg[5] & 0x40)
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svga->chain4 |= (svga->attrregs[0x16] & 0x10);
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svga_recalctimings(svga);
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return;
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}
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break;
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case 0x3c1:
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return;
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case 0x3c2:
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svga->miscout = val;
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svga->vidclock = val & 4;
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svga_recalctimings(svga);
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return;
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case 0x3c4:
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svga->seqaddr = val & 0x07;
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return;
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case 0x3c5:
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if ((svga->seqaddr >= 6) && !dev->ext_enable)
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return;
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if (svga->seqaddr == 4) {
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svga->seqregs[4] = val;
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svga->chain2_write = !(val & 4);
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svga->chain4 = (svga->chain4 & ~8) | (val & 8);
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et3000_log("CHAIN2 = %i, CHAIN4 = %i\n", svga->chain2_write, svga->chain4);
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svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) &&
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!svga->gdcreg[1]) && svga->chain4 &&
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!(svga->adv_flags & FLAG_ADDR_BY8);
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return;
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}
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#ifdef ENABLE_ET3000_LOG
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else if (svga->seqaddr > 4)
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et3000_log("3C5: %02X = %02X\n", svga->seqaddr, val);
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#endif
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break;
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case 0x3c9:
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if (svga->adv_flags & FLAG_RAMDAC_SHIFT)
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val <<= 2;
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svga->fullchange = svga->monitor->mon_changeframecount;
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switch (svga->dac_pos) {
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case 0:
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if (!(svga->attrregs[0x16] & 0x02) && !(svga->attrregs[0x17] & 0x80))
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svga->dac_r = val;
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svga->dac_pos++;
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break;
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case 1:
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if (!(svga->attrregs[0x16] & 0x02) && !(svga->attrregs[0x17] & 0x80))
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svga->dac_g = val;
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svga->dac_pos++;
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break;
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case 2:
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index = svga->dac_addr & 255;
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if (!(svga->attrregs[0x16] & 0x02) && !(svga->attrregs[0x17] & 0x80)) {
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svga->dac_b = val;
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svga->vgapal[index].r = svga->dac_r;
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svga->vgapal[index].g = svga->dac_g;
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svga->vgapal[index].b = svga->dac_b;
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if (svga->ramdac_type == RAMDAC_8BIT)
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svga->pallook[index] = makecol32(svga->vgapal[index].r, svga->vgapal[index].g,
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svga->vgapal[index].b);
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else
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svga->pallook[index] = makecol32(video_6to8[svga->vgapal[index].r & 0x3f],
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video_6to8[svga->vgapal[index].g & 0x3f],
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video_6to8[svga->vgapal[index].b & 0x3f]);
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}
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svga->dac_pos = 0;
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svga->dac_addr = (svga->dac_addr + 1) & 255;
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break;
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default:
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break;
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}
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return;
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case 0x3cb: /*PEL Address/Data Wd*/
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et3000_log("3CB = %02X\n", val);
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dev->pel_wd = val;
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break;
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case 0x3cd: /*Banking*/
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et3000_log("3CD = %02X\n", val);
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if (!(svga->crtc[0x23] & 0x80) && !(svga->gdcreg[6] & 0x08)) {
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switch ((val >> 6) & 3) {
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case 0: /*128K segments*/
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svga->write_bank = ((val >> 0) & 7) << 17;
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svga->read_bank = ((val >> 3) & 7) << 17;
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break;
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case 1: /*64K segments*/
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svga->write_bank = (val & 7) << 16;
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svga->read_bank = ((val >> 3) & 7) << 16;
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break;
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default:
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break;
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}
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}
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dev->banking = val;
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return;
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case 0x3ce:
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svga->gdcaddr = val & 0x0f;
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return;
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case 0x3cf:
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if ((svga->gdcaddr >= 0x0d) && !dev->ext_enable)
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return;
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if ((svga->gdcaddr & 15) == 5) {
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svga->chain4 &= ~0x10;
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if (val & 0x40)
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svga->chain4 |= (svga->attrregs[0x16] & 0x10);
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} else if ((svga->gdcaddr & 15) == 6) {
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if (!(svga->crtc[0x23] & 0x80) && !(val & 0x08)) {
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switch ((dev->banking >> 6) & 3) {
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case 0: /*128K segments*/
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svga->write_bank = ((dev->banking >> 0) & 7) << 17;
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svga->read_bank = ((dev->banking >> 3) & 7) << 17;
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break;
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case 1: /*64K segments*/
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svga->write_bank = (dev->banking & 7) << 16;
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svga->read_bank = ((dev->banking >> 3) & 7) << 16;
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break;
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default:
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break;
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}
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} else
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svga->write_bank = svga->read_bank = 0;
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old = svga->gdcreg[6];
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svga_out(addr, val, svga);
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if ((old & 0xc) != 0 && (val & 0xc) == 0) {
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/* Override mask - ET3000 supports linear 128k at A0000. */
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svga->banked_mask = 0x1ffff;
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}
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return;
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}
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#ifdef ENABLE_ET3000_LOG
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else if ((svga->gdcaddr & 15) > 8)
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et3000_log("3CF: %02X = %02X\n", (svga->gdcaddr & 15), val);
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#endif
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break;
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case 0x3b4:
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case 0x3d4:
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svga->crtcreg = val & 0x3f;
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return;
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case 0x3b5:
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case 0x3d5:
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if ((svga->crtcreg >= 0x18) && (svga->crtcreg < 0x23) && !dev->ext_enable)
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return;
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else if (svga->crtcreg > 0x25)
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return;
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/* Unlike the ET4000AX, which protects all bits of the
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overflow high register (0x35 there, 0x25 here) except for
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bits 4 and 7, if bit 7 of CRTC 11h is set, the ET3000AX
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does not to that. */
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if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80))
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return;
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if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80))
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val = (svga->crtc[7] & ~0x10) | (val & 0x10);
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old = svga->crtc[svga->crtcreg];
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svga->crtc[svga->crtcreg] = val;
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#ifdef ENABLE_ET3000_LOG
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if (svga->crtcreg > 0x18)
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et3000_log("3D5: %02X = %02X\n", svga->crtcreg, val);
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#endif
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if (old != val) {
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if (svga->crtcreg < 0x0e || svga->crtcreg > 0x10) {
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svga->fullchange = changeframecount;
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svga_recalctimings(svga);
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}
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}
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break;
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case 0x3b8:
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case 0x3d8:
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et3000_log("%04X = %02X\n", addr, val);
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dev->reg_3d8 = val;
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if ((val == 0xa0) && (dev->tries == 1)) {
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dev->ext_enable = 1;
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dev->tries = 0;
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} else if (val == 0x29)
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dev->tries = 1;
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return;
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case 0x3bf:
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et3000_log("%04X = %02X\n", addr, val);
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dev->reg_3bf = val;
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if ((val == 0x01) && (dev->tries == 1)) {
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dev->ext_enable = 0;
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dev->tries = 0;
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} else if (val == 0x03)
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dev->tries = 1;
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return;
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default:
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break;
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}
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svga_out(addr, val, svga);
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}
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static void
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et3000_recalctimings(svga_t *svga)
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{
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svga->ma_latch |= (svga->crtc[0x23] & 2) << 15;
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if (svga->crtc[0x25] & 1)
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svga->vblankstart |= 0x400;
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if (svga->crtc[0x25] & 2)
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svga->vtotal |= 0x400;
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if (svga->crtc[0x25] & 4)
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svga->dispend |= 0x400;
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if (svga->crtc[0x25] & 8)
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svga->vsyncstart |= 0x400;
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if (svga->crtc[0x25] & 0x10)
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svga->split |= 0x400;
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svga->interlace = !!(svga->crtc[0x25] & 0x80);
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if (svga->attrregs[0x16] & 0x10) {
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svga->ma_latch <<= (1 << 0);
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svga->rowoffset <<= (1 << 0);
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switch (svga->gdcreg[5] & 0x60) {
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case 0x00:
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svga->render = svga_render_4bpp_highres;
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svga->hdisp *= 2;
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break;
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case 0x20:
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svga->render = svga_render_2bpp_highres;
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break;
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case 0x40:
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case 0x60:
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svga->render = svga_render_8bpp_highres;
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break;
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default:
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break;
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}
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}
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et3000_log("HDISP = %i, HTOTAL = %i, ROWOFFSET = %i, INTERLACE = %i\n",
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svga->hdisp, svga->htotal, svga->rowoffset, svga->interlace);
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switch (((svga->miscout >> 2) & 3) | ((svga->crtc[0x24] << 1) & 4)) {
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case 0:
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case 1:
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break;
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case 3:
|
|
svga->clock = (cpuclock * (double) (1ULL << 32)) / 40000000.0;
|
|
break;
|
|
case 5:
|
|
svga->clock = (cpuclock * (double) (1ULL << 32)) / 65000000.0;
|
|
break;
|
|
default:
|
|
svga->clock = (cpuclock * (double) (1ULL << 32)) / 36000000.0;
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void *
|
|
et3000_init(const device_t *info)
|
|
{
|
|
const char *fn;
|
|
et3000_t *dev;
|
|
|
|
dev = (et3000_t *) malloc(sizeof(et3000_t));
|
|
memset(dev, 0x00, sizeof(et3000_t));
|
|
dev->name = info->name;
|
|
dev->type = info->local;
|
|
fn = BIOS_ROM_PATH;
|
|
|
|
switch (dev->type) {
|
|
case 0: /* ISA ET3000AX */
|
|
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et3000_isa);
|
|
svga_init(info, &dev->svga, dev, device_get_config_int("memory") << 10,
|
|
et3000_recalctimings, et3000_in, et3000_out,
|
|
NULL, NULL);
|
|
io_sethandler(0x03b0, 48,
|
|
et3000_in, NULL, NULL, et3000_out, NULL, NULL, dev);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
rom_init(&dev->bios_rom, fn,
|
|
0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
|
|
|
|
dev->svga.bpp = 8;
|
|
dev->svga.miscout = 1;
|
|
|
|
dev->svga.packed_chain4 = 1;
|
|
|
|
return dev;
|
|
}
|
|
|
|
static void
|
|
et3000_close(void *priv)
|
|
{
|
|
et3000_t *dev = (et3000_t *) priv;
|
|
|
|
svga_close(&dev->svga);
|
|
|
|
free(dev);
|
|
}
|
|
|
|
static void
|
|
et3000_speed_changed(void *priv)
|
|
{
|
|
et3000_t *dev = (et3000_t *) priv;
|
|
|
|
svga_recalctimings(&dev->svga);
|
|
}
|
|
|
|
static void
|
|
et3000_force_redraw(void *priv)
|
|
{
|
|
et3000_t *dev = (et3000_t *) priv;
|
|
|
|
dev->svga.fullchange = changeframecount;
|
|
}
|
|
|
|
static int
|
|
et3000_available(void)
|
|
{
|
|
return rom_present(BIOS_ROM_PATH);
|
|
}
|
|
|
|
static const device_config_t et3000_config[] = {
|
|
// clang-format off
|
|
{
|
|
.name = "memory",
|
|
.description = "Memory size",
|
|
.type = CONFIG_SELECTION,
|
|
.default_string = NULL,
|
|
.default_int = 512,
|
|
.file_filter = NULL,
|
|
.spinner = { 0 },
|
|
.selection = {
|
|
{ .description = "256 KB", .value = 256 },
|
|
{ .description = "512 KB", .value = 512 },
|
|
{ .description = "" }
|
|
},
|
|
.bios = { { 0 } }
|
|
},
|
|
{ .name = "", .description = "", .type = CONFIG_END }
|
|
// clang-format on
|
|
};
|
|
|
|
const device_t et3000_isa_device = {
|
|
.name = "Tseng Labs ET3000AX (ISA)",
|
|
.internal_name = "et3000ax",
|
|
.flags = DEVICE_ISA,
|
|
.local = 0,
|
|
.init = et3000_init,
|
|
.close = et3000_close,
|
|
.reset = NULL,
|
|
.available = et3000_available,
|
|
.speed_changed = et3000_speed_changed,
|
|
.force_redraw = et3000_force_redraw,
|
|
.config = et3000_config
|
|
};
|