dc46480aa4
Added experimental NVidia Riva TNT2 emulation (patch from MoochMcGee); ASUS P/I-P54TP4XE, ASUS P/I-P55T2P4, and ASUS P/I-P55TVP4 are back; National Semiconductor PC87306 Super I/O chip now correctly reenables devices after a chip power cycle; Several FDC improvements and the behavior is now a bit closer to real hardware (based on actual tests); Added MR Intel Advanced/ATX with Microid Research BIOS with support for 4 floppy drives and up to 4 IDE controllers; Added floppy drives 3 and 4, bringing the maximum to 4; You can now connect hard disks to the tertiary IDE controller; Correct undocumented behavior of the LEA instruction with register is back on 286 and later CPU's; Pentium-rea models with Intel chipsets now have port 92 (with alternate reset and alternate A20 toggle); Overhauled DMA channel read and write routines and fixed cascading; Improved IMG detection of a bad BPB (or complete lack of a BPB); Added preliminary emulation of PS/2 1.44 MB and PC-98 1.25 MB 3-mode drives (both have an inverted DENSEL pin); Removed the incorrect Amstrad mouse patch from TheCollector1995; Fixed ATAPI CD-ROM disk change detection; Windows IOCTL CD-ROM handler now tries to use direct SCSI passthrough for more things, including obtaining CD-ROM capacity; The Diamond Stealth32 (ET4000/W32p) now also works correctly on the two Award SiS 496/497 boxes; The (S)VGA handler now converts 6-bit RAMDAC RGB channels to standard 8-bit RGB using a lookup table generated at emulator start, calculated using the correct intensity conversion method and treating intensity 64 as equivalent to 63; Moved a few options from the Configuration dialog box to the menu; SIO, PIIX, and PIIX3 now have the reset control register on port CF9 as they should; Several bugfixes.
124 lines
3.1 KiB
C
124 lines
3.1 KiB
C
static int opIN_AL_imm(uint32_t fetchdat)
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{
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uint16_t port = (uint16_t)getbytef();
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check_io_perm(port);
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AL = inb(port);
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CLOCK_CYCLES(12);
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PREFETCH_RUN(12, 2, -1, 1,0,0,0, 0);
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return 0;
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}
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static int opIN_AX_imm(uint32_t fetchdat)
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{
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uint16_t port = (uint16_t)getbytef();
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check_io_perm(port);
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check_io_perm(port + 1);
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AX = inw(port);
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CLOCK_CYCLES(12);
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PREFETCH_RUN(12, 2, -1, 1,0,0,0, 0);
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return 0;
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}
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static int opIN_EAX_imm(uint32_t fetchdat)
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{
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uint16_t port = (uint16_t)getbytef();
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check_io_perm(port);
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check_io_perm(port + 1);
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check_io_perm(port + 2);
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check_io_perm(port + 3);
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EAX = inl(port);
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CLOCK_CYCLES(12);
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PREFETCH_RUN(12, 2, -1, 0,1,0,0, 0);
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return 0;
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}
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static int opOUT_AL_imm(uint32_t fetchdat)
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{
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uint16_t port = (uint16_t)getbytef();
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check_io_perm(port);
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outb(port, AL);
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CLOCK_CYCLES(10);
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PREFETCH_RUN(10, 2, -1, 0,0,1,0, 0);
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if (port == 0x64)
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return x86_was_reset;
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return 0;
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}
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static int opOUT_AX_imm(uint32_t fetchdat)
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{
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uint16_t port = (uint16_t)getbytef();
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check_io_perm(port);
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check_io_perm(port + 1);
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outw(port, AX);
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CLOCK_CYCLES(10);
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PREFETCH_RUN(10, 2, -1, 0,0,1,0, 0);
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return 0;
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}
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static int opOUT_EAX_imm(uint32_t fetchdat)
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{
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uint16_t port = (uint16_t)getbytef();
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check_io_perm(port);
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check_io_perm(port + 1);
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check_io_perm(port + 2);
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check_io_perm(port + 3);
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outl(port, EAX);
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CLOCK_CYCLES(10);
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PREFETCH_RUN(10, 2, -1, 0,0,0,1, 0);
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return 0;
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}
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static int opIN_AL_DX(uint32_t fetchdat)
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{
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check_io_perm(DX);
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AL = inb(DX);
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CLOCK_CYCLES(12);
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PREFETCH_RUN(12, 1, -1, 1,0,0,0, 0);
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return 0;
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}
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static int opIN_AX_DX(uint32_t fetchdat)
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{
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check_io_perm(DX);
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check_io_perm(DX + 1);
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AX = inw(DX);
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CLOCK_CYCLES(12);
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PREFETCH_RUN(12, 1, -1, 1,0,0,0, 0);
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return 0;
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}
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static int opIN_EAX_DX(uint32_t fetchdat)
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{
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check_io_perm(DX);
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check_io_perm(DX + 1);
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check_io_perm(DX + 2);
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check_io_perm(DX + 3);
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EAX = inl(DX);
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CLOCK_CYCLES(12);
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PREFETCH_RUN(12, 1, -1, 0,1,0,0, 0);
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return 0;
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}
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static int opOUT_AL_DX(uint32_t fetchdat)
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{
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check_io_perm(DX);
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outb(DX, AL);
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CLOCK_CYCLES(11);
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PREFETCH_RUN(11, 1, -1, 0,0,1,0, 0);
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return x86_was_reset;
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}
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static int opOUT_AX_DX(uint32_t fetchdat)
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{
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//pclog("OUT_AX_DX %04X %04X\n", DX, AX);
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check_io_perm(DX);
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check_io_perm(DX + 1);
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outw(DX, AX);
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CLOCK_CYCLES(11);
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PREFETCH_RUN(11, 1, -1, 0,0,1,0, 0);
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return 0;
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}
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static int opOUT_EAX_DX(uint32_t fetchdat)
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{
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check_io_perm(DX);
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check_io_perm(DX + 1);
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check_io_perm(DX + 2);
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check_io_perm(DX + 3);
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outl(DX, EAX);
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PREFETCH_RUN(11, 1, -1, 0,0,0,1, 0);
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return 0;
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}
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