dc46480aa4
Added experimental NVidia Riva TNT2 emulation (patch from MoochMcGee); ASUS P/I-P54TP4XE, ASUS P/I-P55T2P4, and ASUS P/I-P55TVP4 are back; National Semiconductor PC87306 Super I/O chip now correctly reenables devices after a chip power cycle; Several FDC improvements and the behavior is now a bit closer to real hardware (based on actual tests); Added MR Intel Advanced/ATX with Microid Research BIOS with support for 4 floppy drives and up to 4 IDE controllers; Added floppy drives 3 and 4, bringing the maximum to 4; You can now connect hard disks to the tertiary IDE controller; Correct undocumented behavior of the LEA instruction with register is back on 286 and later CPU's; Pentium-rea models with Intel chipsets now have port 92 (with alternate reset and alternate A20 toggle); Overhauled DMA channel read and write routines and fixed cascading; Improved IMG detection of a bad BPB (or complete lack of a BPB); Added preliminary emulation of PS/2 1.44 MB and PC-98 1.25 MB 3-mode drives (both have an inverted DENSEL pin); Removed the incorrect Amstrad mouse patch from TheCollector1995; Fixed ATAPI CD-ROM disk change detection; Windows IOCTL CD-ROM handler now tries to use direct SCSI passthrough for more things, including obtaining CD-ROM capacity; The Diamond Stealth32 (ET4000/W32p) now also works correctly on the two Award SiS 496/497 boxes; The (S)VGA handler now converts 6-bit RAMDAC RGB channels to standard 8-bit RGB using a lookup table generated at emulator start, calculated using the correct intensity conversion method and treating intensity 64 as equivalent to 63; Moved a few options from the Configuration dialog box to the menu; SIO, PIIX, and PIIX3 now have the reset control register on port CF9 as they should; Several bugfixes.
402 lines
20 KiB
C
402 lines
20 KiB
C
#define CALL_FAR_w(new_seg, new_pc) \
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old_cs = CS; \
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old_pc = cpu_state.pc; \
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oxpc = cpu_state.pc; \
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cpu_state.pc = new_pc; \
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optype = CALL; \
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cgate16 = cgate32 = 0; \
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if (msw & 1) loadcscall(new_seg); \
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else \
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{ \
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loadcs(new_seg); \
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cycles -= timing_call_rm; \
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} \
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optype = 0; \
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if (cpu_state.abrt) { cgate16 = cgate32 = 0; return 1; } \
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oldss = ss; \
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if (cgate32) \
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{ \
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uint32_t old_esp = ESP; \
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PUSH_L(old_cs); if (cpu_state.abrt) { cgate16 = cgate32 = 0; return 1; } \
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PUSH_L(old_pc); if (cpu_state.abrt) { ESP = old_esp; return 1; } \
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} \
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else \
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{ \
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uint32_t old_esp = ESP; \
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PUSH_W(old_cs); if (cpu_state.abrt) { cgate16 = cgate32 = 0; return 1; } \
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PUSH_W(old_pc); if (cpu_state.abrt) { ESP = old_esp; return 1; } \
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}
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#define CALL_FAR_l(new_seg, new_pc) \
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old_cs = CS; \
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old_pc = cpu_state.pc; \
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oxpc = cpu_state.pc; \
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cpu_state.pc = new_pc; \
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optype = CALL; \
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cgate16 = cgate32 = 0; \
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if (msw & 1) loadcscall(new_seg); \
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else \
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{ \
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loadcs(new_seg); \
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cycles -= timing_call_rm; \
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} \
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optype = 0; \
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if (cpu_state.abrt) { cgate16 = cgate32 = 0; return 1; } \
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oldss = ss; \
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if (cgate16) \
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{ \
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uint32_t old_esp = ESP; \
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PUSH_W(old_cs); if (cpu_state.abrt) { cgate16 = cgate32 = 0; return 1; } \
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PUSH_W(old_pc); if (cpu_state.abrt) { ESP = old_esp; return 1; } \
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} \
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else \
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{ \
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uint32_t old_esp = ESP; \
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PUSH_L(old_cs); if (cpu_state.abrt) { cgate16 = cgate32 = 0; return 1; } \
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PUSH_L(old_pc); if (cpu_state.abrt) { ESP = old_esp; return 1; } \
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}
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static int opCALL_far_w(uint32_t fetchdat)
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{
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uint32_t old_cs, old_pc;
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uint16_t new_cs, new_pc;
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int cycles_old = cycles;
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new_pc = getwordf();
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new_cs = getword(); if (cpu_state.abrt) return 1;
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CALL_FAR_w(new_cs, new_pc);
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CPU_BLOCK_END();
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PREFETCH_RUN(cycles_old-cycles, 5, -1, 0,0,cgate16 ? 2:0,cgate16 ? 0:2, 0);
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PREFETCH_FLUSH();
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return 0;
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}
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static int opCALL_far_l(uint32_t fetchdat)
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{
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uint32_t old_cs, old_pc;
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uint32_t new_cs, new_pc;
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int cycles_old = cycles;
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new_pc = getlong();
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new_cs = getword(); if (cpu_state.abrt) return 1;
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CALL_FAR_l(new_cs, new_pc);
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CPU_BLOCK_END();
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PREFETCH_RUN(cycles_old-cycles, 7, -1, 0,0,cgate16 ? 2:0,cgate16 ? 0:2, 0);
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PREFETCH_FLUSH();
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return 0;
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}
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static int opFF_w_a16(uint32_t fetchdat)
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{
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uint16_t old_cs, new_cs;
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uint32_t old_pc, new_pc;
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int cycles_old = cycles;
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uint16_t temp;
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fetch_ea_16(fetchdat);
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switch (rmdat & 0x38)
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{
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case 0x00: /*INC w*/
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temp = geteaw(); if (cpu_state.abrt) return 1;
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seteaw(temp + 1); if (cpu_state.abrt) return 1;
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setadd16nc(temp, 1);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 0);
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break;
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case 0x08: /*DEC w*/
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temp = geteaw(); if (cpu_state.abrt) return 1;
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seteaw(temp - 1); if (cpu_state.abrt) return 1;
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setsub16nc(temp, 1);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 0);
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break;
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case 0x10: /*CALL*/
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new_pc = geteaw(); if (cpu_state.abrt) return 1;
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PUSH_W(cpu_state.pc);
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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PREFETCH_RUN((cpu_mod == 3) ? 7 : 10, 2, rmdat, (cpu_mod == 3) ? 0:1,0,1,0, 0);
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PREFETCH_FLUSH();
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break;
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case 0x18: /*CALL far*/
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new_pc = readmemw(easeg, cpu_state.eaaddr);
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new_cs = readmemw(easeg, (cpu_state.eaaddr + 2)); if (cpu_state.abrt) return 1;
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CALL_FAR_w(new_cs, new_pc);
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CPU_BLOCK_END();
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PREFETCH_RUN(cycles_old-cycles, 2, rmdat, 2,0,cgate16 ? 2:0,cgate16 ? 0:2, 0);
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PREFETCH_FLUSH();
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break;
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case 0x20: /*JMP*/
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new_pc = geteaw(); if (cpu_state.abrt) return 1;
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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PREFETCH_RUN((cpu_mod == 3) ? 7 : 10, 2, rmdat, (cpu_mod == 3) ? 0:1,0,0,0, 0);
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PREFETCH_FLUSH();
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break;
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case 0x28: /*JMP far*/
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oxpc = cpu_state.pc;
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new_pc = readmemw(easeg, cpu_state.eaaddr);
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new_cs = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1;
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cpu_state.pc = new_pc;
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loadcsjmp(new_cs, oxpc); if (cpu_state.abrt) return 1;
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CPU_BLOCK_END();
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PREFETCH_RUN(cycles_old-cycles, 2, rmdat, 2,0,0,0, 0);
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PREFETCH_FLUSH();
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break;
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case 0x30: /*PUSH w*/
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temp = geteaw(); if (cpu_state.abrt) return 1;
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PUSH_W(temp);
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CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? 2 : 5, 2, rmdat, (cpu_mod == 3) ? 0:1,0,1,0, 0);
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break;
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default:
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// fatal("Bad FF opcode %02X\n",rmdat&0x38);
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x86illegal();
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}
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return cpu_state.abrt;
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}
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static int opFF_w_a32(uint32_t fetchdat)
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{
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uint16_t old_cs, new_cs;
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uint32_t old_pc, new_pc;
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int cycles_old = cycles;
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uint16_t temp;
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fetch_ea_32(fetchdat);
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switch (rmdat & 0x38)
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{
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case 0x00: /*INC w*/
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temp = geteaw(); if (cpu_state.abrt) return 1;
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seteaw(temp + 1); if (cpu_state.abrt) return 1;
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setadd16nc(temp, 1);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 1);
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break;
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case 0x08: /*DEC w*/
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temp = geteaw(); if (cpu_state.abrt) return 1;
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seteaw(temp - 1); if (cpu_state.abrt) return 1;
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setsub16nc(temp, 1);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 1);
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break;
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case 0x10: /*CALL*/
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new_pc = geteaw(); if (cpu_state.abrt) return 1;
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PUSH_W(cpu_state.pc);
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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PREFETCH_RUN((cpu_mod == 3) ? 7 : 10, 2, rmdat, (cpu_mod == 3) ? 0:1,0,1,0, 1);
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PREFETCH_FLUSH();
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break;
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case 0x18: /*CALL far*/
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new_pc = readmemw(easeg, cpu_state.eaaddr);
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new_cs = readmemw(easeg, (cpu_state.eaaddr + 2)); if (cpu_state.abrt) return 1;
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CALL_FAR_w(new_cs, new_pc);
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CPU_BLOCK_END();
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PREFETCH_RUN(cycles_old-cycles, 2, rmdat, 2,0,cgate16 ? 2:0,cgate16 ? 0:2, 1);
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PREFETCH_FLUSH();
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break;
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case 0x20: /*JMP*/
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new_pc = geteaw(); if (cpu_state.abrt) return 1;
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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PREFETCH_RUN(cycles_old-cycles, 2, rmdat, 1,0,0,0, 1);
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PREFETCH_FLUSH();
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break;
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case 0x28: /*JMP far*/
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oxpc = cpu_state.pc;
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new_pc = readmemw(easeg, cpu_state.eaaddr);
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new_cs = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1;
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cpu_state.pc = new_pc;
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loadcsjmp(new_cs, oxpc); if (cpu_state.abrt) return 1;
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CPU_BLOCK_END();
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PREFETCH_RUN(cycles_old-cycles, 2, rmdat, 2,0,0,0, 1);
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PREFETCH_FLUSH();
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break;
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case 0x30: /*PUSH w*/
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temp = geteaw(); if (cpu_state.abrt) return 1;
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PUSH_W(temp);
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CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? 2 : 5, 2, rmdat, (cpu_mod == 3) ? 0:1,0,1,0, 1);
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break;
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default:
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// fatal("Bad FF opcode %02X\n",rmdat&0x38);
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x86illegal();
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}
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return cpu_state.abrt;
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}
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static int opFF_l_a16(uint32_t fetchdat)
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{
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uint16_t old_cs, new_cs;
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uint32_t old_pc, new_pc;
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int cycles_old = cycles;
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uint32_t temp;
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fetch_ea_16(fetchdat);
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switch (rmdat & 0x38)
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{
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case 0x00: /*INC l*/
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temp = geteal(); if (cpu_state.abrt) return 1;
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seteal(temp + 1); if (cpu_state.abrt) return 1;
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setadd32nc(temp, 1);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 0);
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break;
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case 0x08: /*DEC l*/
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temp = geteal(); if (cpu_state.abrt) return 1;
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seteal(temp - 1); if (cpu_state.abrt) return 1;
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setsub32nc(temp, 1);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 0);
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break;
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case 0x10: /*CALL*/
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new_pc = geteal(); if (cpu_state.abrt) return 1;
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PUSH_L(cpu_state.pc);
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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PREFETCH_RUN((cpu_mod == 3) ? 7 : 10, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,1, 0);
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PREFETCH_FLUSH();
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break;
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case 0x18: /*CALL far*/
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new_pc = readmeml(easeg, cpu_state.eaaddr);
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new_cs = readmemw(easeg, (cpu_state.eaaddr + 4)); if (cpu_state.abrt) return 1;
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CALL_FAR_l(new_cs, new_pc);
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CPU_BLOCK_END();
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PREFETCH_RUN(cycles_old-cycles, 2, rmdat, 1,1,cgate16 ? 2:0,cgate16 ? 0:2, 0);
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PREFETCH_FLUSH();
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break;
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case 0x20: /*JMP*/
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new_pc = geteal(); if (cpu_state.abrt) return 1;
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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PREFETCH_RUN(cycles_old-cycles, 2, rmdat, 0,1,0,0, 0);
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PREFETCH_FLUSH();
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break;
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case 0x28: /*JMP far*/
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oxpc = cpu_state.pc;
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new_pc = readmeml(easeg, cpu_state.eaaddr);
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new_cs = readmemw(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 1;
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cpu_state.pc = new_pc;
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loadcsjmp(new_cs, oxpc); if (cpu_state.abrt) return 1;
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CPU_BLOCK_END();
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PREFETCH_RUN(cycles_old-cycles, 2, rmdat, 1,1,0,0, 0);
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PREFETCH_FLUSH();
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break;
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case 0x30: /*PUSH l*/
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temp = geteal(); if (cpu_state.abrt) return 1;
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PUSH_L(temp);
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CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? 2 : 5, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,1, 0);
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break;
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default:
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// fatal("Bad FF opcode %02X\n",rmdat&0x38);
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x86illegal();
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}
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return cpu_state.abrt;
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}
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static int opFF_l_a32(uint32_t fetchdat)
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{
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uint16_t old_cs, new_cs;
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uint32_t old_pc, new_pc;
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int cycles_old = cycles;
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uint32_t temp;
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fetch_ea_32(fetchdat);
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switch (rmdat & 0x38)
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{
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case 0x00: /*INC l*/
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temp = geteal(); if (cpu_state.abrt) return 1;
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seteal(temp + 1); if (cpu_state.abrt) return 1;
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setadd32nc(temp, 1);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 1);
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break;
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case 0x08: /*DEC l*/
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temp = geteal(); if (cpu_state.abrt) return 1;
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seteal(temp - 1); if (cpu_state.abrt) return 1;
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setsub32nc(temp, 1);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mm, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 1);
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break;
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case 0x10: /*CALL*/
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new_pc = geteal(); if (cpu_state.abrt) return 1;
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PUSH_L(cpu_state.pc); if (cpu_state.abrt) return 1;
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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PREFETCH_RUN((cpu_mod == 3) ? 7 : 10, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,1, 1);
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PREFETCH_FLUSH();
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break;
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case 0x18: /*CALL far*/
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new_pc = readmeml(easeg, cpu_state.eaaddr);
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new_cs = readmemw(easeg, (cpu_state.eaaddr + 4)); if (cpu_state.abrt) return 1;
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CALL_FAR_l(new_cs, new_pc);
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CPU_BLOCK_END();
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PREFETCH_RUN(cycles_old-cycles, 2, rmdat, 1,1,cgate16 ? 2:0,cgate16 ? 0:2, 1);
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PREFETCH_FLUSH();
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break;
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case 0x20: /*JMP*/
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new_pc = geteal(); if (cpu_state.abrt) return 1;
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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PREFETCH_RUN(cycles_old-cycles, 2, rmdat, 1,1,0,0, 1);
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PREFETCH_FLUSH();
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break;
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case 0x28: /*JMP far*/
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oxpc = cpu_state.pc;
|
|
new_pc = readmeml(easeg, cpu_state.eaaddr);
|
|
new_cs = readmemw(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 1;
|
|
cpu_state.pc = new_pc;
|
|
loadcsjmp(new_cs, oxpc); if (cpu_state.abrt) return 1;
|
|
CPU_BLOCK_END();
|
|
PREFETCH_RUN(cycles_old-cycles, 2, rmdat, 1,1,0,0, 1);
|
|
PREFETCH_FLUSH();
|
|
break;
|
|
case 0x30: /*PUSH l*/
|
|
temp = geteal(); if (cpu_state.abrt) return 1;
|
|
PUSH_L(temp);
|
|
PREFETCH_RUN((cpu_mod == 3) ? 2 : 5, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,1, 1);
|
|
break;
|
|
|
|
default:
|
|
// fatal("Bad FF opcode %02X\n",rmdat&0x38);
|
|
x86illegal();
|
|
}
|
|
return cpu_state.abrt;
|
|
}
|