1101 lines
32 KiB
C
1101 lines
32 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* NS8250/16450/16550 UART emulation.
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*
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* Now passes all the AMIDIAG tests.
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*
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*
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*
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* Authors: Miran Grca, <mgrca8@gmail.com>
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* Fred N. van Kempen, <decwiz@yahoo.com>
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*
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* Copyright 2016-2020 Miran Grca.
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* Copyright 2017-2020 Fred N. van Kempen.
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*/
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#include <stdarg.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/timer.h>
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#include <86box/machine.h>
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#include <86box/io.h>
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#include <86box/pic.h>
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#include <86box/mem.h>
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#include <86box/rom.h>
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#include <86box/fifo.h>
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#include <86box/serial.h>
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#include <86box/mouse.h>
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serial_port_t com_ports[SERIAL_MAX];
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enum {
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SERIAL_INT_LSR = 1,
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SERIAL_INT_TIMEOUT = 2,
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SERIAL_INT_RECEIVE = 4,
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SERIAL_INT_TRANSMIT = 8,
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SERIAL_INT_MSR = 16,
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SERIAL_INT_RX_DMA_TC = 32,
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SERIAL_INT_TX_DMA_TC = 64
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};
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void serial_update_ints(serial_t *dev);
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static int next_inst = 0;
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static serial_device_t serial_devices[SERIAL_MAX];
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static void serial_xmit_d_empty_evt(void *priv);
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#ifdef ENABLE_SERIAL_LOG
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int serial_do_log = ENABLE_SERIAL_LOG;
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static void
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serial_log(const char *fmt, ...)
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{
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va_list ap;
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if (serial_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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# define serial_log(fmt, ...)
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#endif
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void
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serial_reset_port(serial_t *dev)
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{
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if (dev->type >= SERIAL_16550) {
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if (dev->fifo_enabled)
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fifo_reset_evt(dev->xmit_fifo);
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else
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fifo_reset(dev->xmit_fifo);
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}
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dev->lsr = 0x60; /* Mark that both THR/FIFO and TXSR are empty. */
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dev->iir = dev->ier = dev->lcr = dev->fcr = 0;
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dev->fifo_enabled = 0;
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dev->baud_cycles = 0;
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dev->out_new = 0xffff;
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dev->txsr_empty = 1;
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dev->thr_empty = 1;
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serial_update_ints(dev);
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dev->irq_state = 0;
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}
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void
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serial_transmit_period(serial_t *dev)
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{
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double ddlab;
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if (dev->dlab != 0x0000)
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ddlab = (double) dev->dlab;
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else
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ddlab = 65536.0;
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/* Bit period based on DLAB. */
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dev->transmit_period = (16000000.0 * ddlab) / dev->clock_src;
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if (dev->sd && dev->sd->transmit_period_callback)
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dev->sd->transmit_period_callback(dev, dev->sd->priv, dev->transmit_period);
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}
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void
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serial_do_irq(serial_t *dev, int set)
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{
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if (dev->irq != 0xff) {
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if (set || (dev->irq_state != !!set))
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picint_common(1 << dev->irq, !!(dev->type >= SERIAL_16450), set, &dev->irq_state);
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if (dev->type < SERIAL_16450)
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dev->irq_state = !!set;
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}
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}
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void
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serial_update_ints(serial_t *dev)
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{
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/* TODO: The IRQ priorities are 6 - we need to find a way to treat timeout and receive
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as equal and still somehow distinguish them. */
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uint8_t ier_map[7] = { 0x04, 0x01, 0x01, 0x02, 0x08, 0x40, 0x80 };
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uint8_t iir_map[7] = { 0x06, 0x0c, 0x04, 0x02, 0x00, 0x0e, 0x0a };
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dev->iir = (dev->iir & 0xf0) | 0x01;
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for (uint8_t i = 0; i < 7; i++) {
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if ((dev->ier & ier_map[i]) && (dev->int_status & (1 << i))) {
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dev->iir = (dev->iir & 0xf0) | iir_map[i];
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break;
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}
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}
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serial_do_irq(dev, !(dev->iir & 0x01) && ((dev->mctrl & 8) || (dev->type == SERIAL_8250_PCJR)));
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}
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static void
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serial_clear_timeout(serial_t *dev)
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{
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/* Disable timeout timer and clear timeout condition. */
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timer_disable(&dev->timeout_timer);
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dev->int_status &= ~SERIAL_INT_TIMEOUT;
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serial_update_ints(dev);
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}
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static void
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serial_receive_timer(void *priv)
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{
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serial_t *dev = (serial_t *) priv;
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serial_log("serial_receive_timer()\n");
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timer_on_auto(&dev->receive_timer, /* dev->bits * */ dev->transmit_period);
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if (dev->fifo_enabled) {
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/* FIFO mode. */
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if (dev->out_new != 0xffff) {
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/* We have received a byte into the RSR. */
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/* Clear FIFO timeout. */
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serial_clear_timeout(dev);
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fifo_write_evt((uint8_t) (dev->out_new & 0xff), dev->rcvr_fifo);
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dev->out_new = 0xffff;
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#if 0
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pclog("serial_receive_timer(): lsr = %02X, ier = %02X, iir = %02X, int_status = %02X\n",
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dev->lsr, dev->ier, dev->iir, dev->int_status);
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#endif
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timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period);
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}
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} else {
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/* Non-FIFO mode. */
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if (dev->out_new != 0xffff) {
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/* We have received a byte into the RSR. */
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serial_log("Byte received: %04X\n", dev->out_new);
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/* Indicate overrun. */
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if (dev->lsr & 0x01)
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dev->lsr |= 0x02;
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dev->dat = (uint8_t) (dev->out_new & 0xff);
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dev->out_new = 0xffff;
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/* Raise Data Ready interrupt. */
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dev->lsr |= 0x01;
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dev->int_status |= SERIAL_INT_RECEIVE;
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if (dev->lsr & 0x02)
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dev->int_status |= SERIAL_INT_LSR;
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serial_update_ints(dev);
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}
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}
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}
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static void
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write_fifo(serial_t *dev, uint8_t dat)
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{
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serial_log("write_fifo(%08X, %02X, %i, %i)\n", dev, dat,
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(dev->type >= SERIAL_16550) && dev->fifo_enabled,
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((dev->type >= SERIAL_16550) && dev->fifo_enabled) ?
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fifo_get_count(dev->rcvr_fifo) : 0);
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/* Do this here, because in non-FIFO mode, this is read directly. */
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dev->out_new = (uint16_t) dat;
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}
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void
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serial_write_fifo(serial_t *dev, uint8_t dat)
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{
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serial_log("serial_write_fifo(%08X, %02X, %i, %i)\n", dev, dat,
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(dev->type >= SERIAL_16550) && dev->fifo_enabled,
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((dev->type >= SERIAL_16550) && dev->fifo_enabled) ?
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fifo_get_count(dev->rcvr_fifo) : 0);
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if ((dev != NULL) && !(dev->mctrl & 0x10))
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write_fifo(dev, dat);
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}
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void
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serial_transmit(serial_t *dev, uint8_t val)
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{
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if (dev->mctrl & 0x10)
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write_fifo(dev, val);
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else if (dev->sd->dev_write)
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dev->sd->dev_write(dev, dev->sd->priv, val);
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#ifdef ENABLE_SERIAL_CONSOLE
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if ((val >= ' ' && val <= '~') || val == '\r' || val == '\n') {
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fputc(val, stdout);
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if (val == '\n')
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fflush(stdout);
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} else
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fprintf(stdout, "[%02X]", val);
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#endif
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}
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static void
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serial_move_to_txsr(serial_t *dev)
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{
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dev->txsr_empty = 0;
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if (dev->fifo_enabled)
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dev->txsr = fifo_read_evt(dev->xmit_fifo);
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else {
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dev->txsr = dev->thr;
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dev->thr = 0;
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dev->thr_empty = 1;
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serial_xmit_d_empty_evt(dev);
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}
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dev->lsr &= ~0x40;
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serial_log("serial_move_to_txsr(): FIFO %sabled, FIFO pos = %i\n", dev->fifo_enabled ? "en" : "dis",
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fifo_get_count(dev->xmit_fifo) & 0x0f);
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if (!dev->fifo_enabled || (fifo_get_count(dev->xmit_fifo) == 0x0)) {
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/* Update interrupts to signal THRE and that TXSR is no longer empty. */
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serial_update_ints(dev);
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}
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if (!dev->fifo_enabled || (fifo_get_count(dev->xmit_fifo) == 0x0))
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dev->transmit_enabled &= ~1; /* Stop moving. */
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dev->transmit_enabled |= 2; /* Start transmitting. */
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}
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static void
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serial_process_txsr(serial_t *dev)
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{
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serial_log("serial_process_txsr(): FIFO %sabled\n", dev->fifo_enabled ? "en" : "dis");
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serial_transmit(dev, dev->txsr);
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dev->txsr = 0;
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dev->txsr_empty = 1;
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serial_xmit_d_empty_evt(dev);
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/* Reset BAUDOUT cycle count. */
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dev->baud_cycles = 0;
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/* If FIFO is enabled and there are bytes left to transmit,
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continue with the FIFO, otherwise stop. */
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if (dev->fifo_enabled && (fifo_get_count(dev->xmit_fifo) != 0x0))
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dev->transmit_enabled |= 1;
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/* Both FIFO/THR and TXSR are empty. */
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else
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dev->transmit_enabled &= ~2;
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serial_update_ints(dev);
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}
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/* Transmit_enable flags:
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Bit 0 = Do move if set;
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Bit 1 = Do transmit if set. */
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static void
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serial_transmit_timer(void *priv)
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{
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serial_t *dev = (serial_t *) priv;
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/*
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Norton Diagnostics waits for up to 2 bit periods, this is
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confirmed by the NS16550A timings graph, which shows operation
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as follows after write: 1 bit of delay, then start bit, and at
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the end of the start bit, move from THR to TXSR.
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*/
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int delay = 1;
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if (dev->transmit_enabled & 3) {
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/*
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If already transmitting, move from THR to TXSR at the end of
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the last data bit.
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*/
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if ((dev->transmit_enabled & 1) && (dev->transmit_enabled & 2))
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delay = dev->data_bits + 1;
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dev->baud_cycles++;
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/* We have processed (delay + total bits) BAUDOUT cycles, transmit the byte. */
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if ((dev->baud_cycles == (dev->bits + 1)) && (dev->transmit_enabled & 2))
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serial_process_txsr(dev);
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/* We have processed (data bits) BAUDOUT cycles. */
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if ((dev->baud_cycles == delay) && (dev->transmit_enabled & 1))
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serial_move_to_txsr(dev);
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if (dev->transmit_enabled & 3)
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timer_on_auto(&dev->transmit_timer, dev->transmit_period);
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} else {
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dev->baud_cycles = 0;
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return;
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}
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}
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static void
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serial_timeout_timer(void *priv)
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{
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serial_t *dev = (serial_t *) priv;
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serial_log("serial_timeout_timer()\n");
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dev->lsr |= 0x01;
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dev->int_status |= SERIAL_INT_TIMEOUT;
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serial_update_ints(dev);
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}
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void
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serial_device_timeout(void *priv)
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{
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serial_t *dev = (serial_t *) priv;
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serial_log("serial_device_timeout()\n");
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if (!dev->fifo_enabled) {
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dev->lsr |= 0x10;
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dev->int_status |= SERIAL_INT_LSR;
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serial_update_ints(dev);
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}
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}
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static void
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serial_update_speed(serial_t *dev)
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{
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serial_log("serial_update_speed(%lf)\n", dev->transmit_period);
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timer_on_auto(&dev->receive_timer, /* dev->bits * */ dev->transmit_period);
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if (dev->transmit_enabled & 3)
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timer_on_auto(&dev->transmit_timer, dev->transmit_period);
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if (timer_is_on(&dev->timeout_timer))
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timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period);
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}
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static void
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serial_reset_fifo(serial_t *dev)
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{
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fifo_reset_evt(dev->xmit_fifo);
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fifo_reset_evt(dev->rcvr_fifo);
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serial_update_ints(dev);
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}
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void
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serial_set_dsr(serial_t *dev, uint8_t enabled)
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{
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if (dev->mctrl & 0x10)
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return;
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dev->msr &= ~0x2;
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dev->msr |= ((dev->msr & 0x20) ^ ((!!enabled) << 5)) >> 4;
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dev->msr &= ~0x20;
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dev->msr |= (!!enabled) << 5;
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dev->msr_set &= ~0x20;
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dev->msr_set |= (!!enabled) << 5;
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if (dev->msr & 0x2) {
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dev->int_status |= SERIAL_INT_MSR;
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serial_update_ints(dev);
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}
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}
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void
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serial_set_cts(serial_t *dev, uint8_t enabled)
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{
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if (dev->mctrl & 0x10)
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return;
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dev->msr &= ~0x1;
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dev->msr |= ((dev->msr & 0x10) ^ ((!!enabled) << 4)) >> 4;
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dev->msr &= ~0x10;
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dev->msr |= (!!enabled) << 4;
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dev->msr_set &= ~0x10;
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dev->msr_set |= (!!enabled) << 4;
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if (dev->msr & 0x1) {
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dev->int_status |= SERIAL_INT_MSR;
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serial_update_ints(dev);
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}
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}
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void
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serial_set_dcd(serial_t *dev, uint8_t enabled)
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{
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if (dev->mctrl & 0x10)
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return;
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dev->msr &= ~0x8;
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dev->msr |= ((dev->msr & 0x80) ^ ((!!enabled) << 7)) >> 4;
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dev->msr &= ~0x80;
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dev->msr |= (!!enabled) << 7;
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dev->msr_set &= ~0x80;
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dev->msr_set |= (!!enabled) << 7;
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if (dev->msr & 0x8) {
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dev->int_status |= SERIAL_INT_MSR;
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serial_update_ints(dev);
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}
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}
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void
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serial_set_ri(serial_t *dev, uint8_t enabled)
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{
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uint8_t prev_state = !!(dev->msr & 0x40);
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if (dev->mctrl & 0x10)
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return;
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dev->msr &= ~0x40;
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dev->msr |= (!!enabled) << 6;
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dev->msr_set &= ~0x40;
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dev->msr_set |= (!!enabled) << 6;
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if (prev_state == 0 && (!!enabled) == 1) {
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dev->msr |= 0x4;
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dev->int_status |= SERIAL_INT_MSR;
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serial_update_ints(dev);
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}
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}
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int
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serial_get_ri(serial_t *dev)
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{
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return !!(dev->msr & (1 << 6));
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}
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void
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serial_set_clock_src(serial_t *dev, double clock_src)
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{
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dev->clock_src = clock_src;
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serial_transmit_period(dev);
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serial_update_speed(dev);
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}
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void
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serial_write(uint16_t addr, uint8_t val, void *priv)
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{
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serial_t *dev = (serial_t *) priv;
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uint8_t new_msr;
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uint8_t old;
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serial_log("UART: [%04X:%08X] Write %02X to port %02X\n", CS, cpu_state.pc, val, addr);
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cycles -= ISA_CYCLES(8);
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switch (addr & 7) {
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case 0:
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if (dev->lcr & 0x80) {
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dev->dlab = (dev->dlab & 0xff00) | val;
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serial_transmit_period(dev);
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serial_update_speed(dev);
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return;
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}
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if (dev->fifo_enabled && (fifo_get_count(dev->xmit_fifo) < 16)) {
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/* FIFO mode, begin transmitting. */
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timer_on_auto(&dev->transmit_timer, dev->transmit_period);
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dev->transmit_enabled |= 1; /* Start moving. */
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fifo_write_evt(val, dev->xmit_fifo);
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} else if (!dev->fifo_enabled) {
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/* Indicate THR is no longer empty. */
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dev->lsr &= 0x9f;
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dev->int_status &= ~SERIAL_INT_TRANSMIT;
|
|
serial_update_ints(dev);
|
|
|
|
/* Non-FIFO mode, begin transmitting. */
|
|
timer_on_auto(&dev->transmit_timer, dev->transmit_period);
|
|
dev->transmit_enabled |= 1; /* Start moving. */
|
|
dev->thr = val;
|
|
dev->thr_empty = 0;
|
|
}
|
|
break;
|
|
case 1:
|
|
if (dev->lcr & 0x80) {
|
|
dev->dlab = (dev->dlab & 0x00ff) | (val << 8);
|
|
serial_transmit_period(dev);
|
|
serial_update_speed(dev);
|
|
return;
|
|
}
|
|
if ((val & 2) && (dev->lsr & 0x20))
|
|
dev->int_status |= SERIAL_INT_TRANSMIT;
|
|
dev->ier = val & 0xf;
|
|
serial_update_ints(dev);
|
|
break;
|
|
case 2:
|
|
if (dev->type >= SERIAL_16550) {
|
|
if ((val ^ dev->fcr) & 0x01)
|
|
serial_reset_fifo(dev);
|
|
dev->fcr = val & 0xf9;
|
|
dev->fifo_enabled = val & 0x01;
|
|
/* TODO: When switching modes, shouldn't we reset the LSR
|
|
based on the new conditions? */
|
|
if (!dev->fifo_enabled) {
|
|
fifo_reset(dev->xmit_fifo);
|
|
fifo_reset(dev->rcvr_fifo);
|
|
break;
|
|
}
|
|
if (val & 0x02) {
|
|
if (dev->fifo_enabled)
|
|
fifo_reset_evt(dev->rcvr_fifo);
|
|
else
|
|
fifo_reset(dev->rcvr_fifo);
|
|
}
|
|
if (val & 0x04) {
|
|
if (dev->fifo_enabled)
|
|
fifo_reset_evt(dev->xmit_fifo);
|
|
else
|
|
fifo_reset(dev->xmit_fifo);
|
|
}
|
|
switch ((val >> 6) & 0x03) {
|
|
case 0:
|
|
fifo_set_trigger_len(dev->rcvr_fifo, 1);
|
|
break;
|
|
case 1:
|
|
fifo_set_trigger_len(dev->rcvr_fifo, 4);
|
|
break;
|
|
case 2:
|
|
fifo_set_trigger_len(dev->rcvr_fifo, 8);
|
|
break;
|
|
case 3:
|
|
fifo_set_trigger_len(dev->rcvr_fifo, 14);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
fifo_set_trigger_len(dev->xmit_fifo, 16);
|
|
dev->out_new = 0xffff;
|
|
serial_log("FIFO now %sabled\n", dev->fifo_enabled ? "en" : "dis");
|
|
}
|
|
break;
|
|
case 3:
|
|
old = dev->lcr;
|
|
dev->lcr = val;
|
|
if ((old ^ val) & 0x3f) {
|
|
/* Data bits + start bit. */
|
|
dev->bits = ((dev->lcr & 0x03) + 5) + 1;
|
|
/* Stop bits. */
|
|
dev->bits++; /* First stop bit. */
|
|
if (dev->lcr & 0x04)
|
|
dev->bits++; /* Second stop bit. */
|
|
/* Parity bit. */
|
|
if (dev->lcr & 0x08)
|
|
dev->bits++;
|
|
|
|
serial_transmit_period(dev);
|
|
serial_update_speed(dev);
|
|
|
|
if (dev->sd && dev->sd->lcr_callback)
|
|
dev->sd->lcr_callback(dev, dev->sd->priv, dev->lcr);
|
|
}
|
|
break;
|
|
case 4:
|
|
if ((val & 2) && !(dev->mctrl & 2)) {
|
|
if (dev->sd && dev->sd->rcr_callback) {
|
|
serial_log("RTS toggle callback\n");
|
|
dev->sd->rcr_callback(dev, dev->sd->priv);
|
|
}
|
|
}
|
|
if (!(val & 8) && (dev->mctrl & 8))
|
|
serial_do_irq(dev, 0);
|
|
if ((val ^ dev->mctrl) & 0x10)
|
|
serial_reset_fifo(dev);
|
|
if (dev->sd && dev->sd->dtr_callback && (val ^ dev->mctrl) & 1)
|
|
dev->sd->dtr_callback(dev, val & 1, dev->sd->priv);
|
|
dev->mctrl = val & 0x1f;
|
|
if (val & 0x10) {
|
|
new_msr = (val & 0x0c) << 4;
|
|
new_msr |= (val & 0x02) ? 0x10 : 0;
|
|
new_msr |= (val & 0x01) ? 0x20 : 0;
|
|
|
|
if ((dev->msr ^ new_msr) & 0x10)
|
|
new_msr |= 0x01;
|
|
if ((dev->msr ^ new_msr) & 0x20)
|
|
new_msr |= 0x02;
|
|
if ((dev->msr ^ new_msr) & 0x80)
|
|
new_msr |= 0x08;
|
|
if ((dev->msr & 0x40) && !(new_msr & 0x40))
|
|
new_msr |= 0x04;
|
|
|
|
dev->msr = new_msr;
|
|
|
|
if (dev->msr & 0x0f) {
|
|
dev->int_status |= SERIAL_INT_MSR;
|
|
serial_update_ints(dev);
|
|
}
|
|
|
|
/* TODO: Why reset the FIFO's here?! */
|
|
fifo_reset(dev->xmit_fifo);
|
|
fifo_reset(dev->rcvr_fifo);
|
|
}
|
|
break;
|
|
case 5:
|
|
dev->lsr = (dev->lsr & 0xe0) | (val & 0x1f);
|
|
if (dev->lsr & 0x01)
|
|
dev->int_status |= SERIAL_INT_RECEIVE;
|
|
if (dev->lsr & 0x1e)
|
|
dev->int_status |= SERIAL_INT_LSR;
|
|
if (dev->lsr & 0x20)
|
|
dev->int_status |= SERIAL_INT_TRANSMIT;
|
|
serial_update_ints(dev);
|
|
break;
|
|
case 6:
|
|
#if 0
|
|
dev->msr = (val & 0xf0) | (dev->msr & 0x0f);
|
|
dev->msr = val;
|
|
#endif
|
|
/* The actual condition bits of the MSR are read-only, but the delta bits are
|
|
undocumentedly writable, and the PCjr BIOS uses them to raise MSR interrupts. */
|
|
dev->msr = (dev->msr & 0xf0) | (val & 0x0f);
|
|
if (dev->msr & 0x0f)
|
|
dev->int_status |= SERIAL_INT_MSR;
|
|
serial_update_ints(dev);
|
|
break;
|
|
case 7:
|
|
if (dev->type >= SERIAL_16450)
|
|
dev->scratch = val;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
uint8_t
|
|
serial_read(uint16_t addr, void *priv)
|
|
{
|
|
serial_t *dev = (serial_t *) priv;
|
|
uint8_t ret = 0;
|
|
|
|
cycles -= ISA_CYCLES(8);
|
|
|
|
switch (addr & 7) {
|
|
case 0:
|
|
if (dev->lcr & 0x80) {
|
|
ret = dev->dlab & 0xff;
|
|
break;
|
|
}
|
|
|
|
if (dev->fifo_enabled) {
|
|
/* FIFO mode. */
|
|
serial_clear_timeout(dev);
|
|
ret = fifo_read_evt(dev->rcvr_fifo);
|
|
|
|
if (dev->lsr & 0x01)
|
|
timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period);
|
|
} else {
|
|
/* Non-FIFO mode. */
|
|
ret = dev->dat;
|
|
|
|
/* Always clear Data Ready interrupt. */
|
|
dev->lsr &= 0xfe;
|
|
dev->int_status &= ~SERIAL_INT_RECEIVE;
|
|
serial_update_ints(dev);
|
|
}
|
|
|
|
serial_log("Read data: %02X\n", ret);
|
|
break;
|
|
case 1:
|
|
if (dev->lcr & 0x80)
|
|
ret = (dev->dlab >> 8) & 0xff;
|
|
else
|
|
ret = dev->ier;
|
|
break;
|
|
case 2:
|
|
ret = dev->iir;
|
|
if ((ret & 0xe) == 2) {
|
|
dev->int_status &= ~SERIAL_INT_TRANSMIT;
|
|
serial_update_ints(dev);
|
|
}
|
|
if (dev->fcr & 1)
|
|
ret |= 0xc0;
|
|
break;
|
|
case 3:
|
|
ret = dev->lcr;
|
|
break;
|
|
case 4:
|
|
ret = dev->mctrl;
|
|
break;
|
|
case 5:
|
|
ret = dev->lsr;
|
|
if (dev->lsr & 0x1f)
|
|
dev->lsr &= ~0x1e;
|
|
dev->int_status &= ~SERIAL_INT_LSR;
|
|
serial_update_ints(dev);
|
|
break;
|
|
case 6:
|
|
if (dev->mctrl & 0x10)
|
|
ret = dev->msr;
|
|
else
|
|
ret = dev->msr | dev->msr_set;
|
|
dev->msr &= ~0x0f;
|
|
dev->int_status &= ~SERIAL_INT_MSR;
|
|
serial_update_ints(dev);
|
|
break;
|
|
case 7:
|
|
ret = dev->scratch;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
serial_log("UART: [%04X:%08X] Read %02X from port %02X\n", CS, cpu_state.pc, ret, addr);
|
|
return ret;
|
|
}
|
|
|
|
void
|
|
serial_remove(serial_t *dev)
|
|
{
|
|
if (dev == NULL)
|
|
return;
|
|
|
|
if (!com_ports[dev->inst].enabled)
|
|
return;
|
|
|
|
if (!dev->base_address)
|
|
return;
|
|
|
|
serial_log("Removing serial port %i at %04X...\n", dev->inst, dev->base_address);
|
|
|
|
io_removehandler(dev->base_address, 0x0008,
|
|
serial_read, NULL, NULL, serial_write, NULL, NULL, dev);
|
|
dev->base_address = 0x0000;
|
|
}
|
|
|
|
void
|
|
serial_setup(serial_t *dev, uint16_t addr, uint8_t irq)
|
|
{
|
|
serial_log("Adding serial port %i at %04X...\n", dev->inst, addr);
|
|
|
|
if (dev == NULL)
|
|
return;
|
|
|
|
if (!com_ports[dev->inst].enabled)
|
|
return;
|
|
if (dev->base_address != 0x0000)
|
|
serial_remove(dev);
|
|
dev->base_address = addr;
|
|
if (addr != 0x0000)
|
|
io_sethandler(addr, 0x0008, serial_read, NULL, NULL, serial_write, NULL, NULL, dev);
|
|
dev->irq = irq;
|
|
}
|
|
|
|
static void
|
|
serial_rcvr_d_empty_evt(void *priv)
|
|
{
|
|
serial_t *dev = (serial_t *) priv;
|
|
|
|
dev->lsr = (dev->lsr & 0xfe) | (fifo_get_empty(dev->rcvr_fifo) ? 0 : 1);
|
|
}
|
|
|
|
static void
|
|
serial_rcvr_d_overrun_evt(void *priv)
|
|
{
|
|
serial_t *dev = (serial_t *) priv;
|
|
|
|
dev->lsr = (dev->lsr & 0xfd) | (fifo_get_overrun(dev->rcvr_fifo) << 1);
|
|
}
|
|
|
|
static void
|
|
serial_rcvr_d_ready_evt(void *priv)
|
|
{
|
|
serial_t *dev = (serial_t *) priv;
|
|
|
|
dev->int_status = (dev->int_status & ~SERIAL_INT_RECEIVE) |
|
|
(fifo_get_ready(dev->rcvr_fifo) ? SERIAL_INT_RECEIVE : 0);
|
|
serial_update_ints(dev);
|
|
}
|
|
|
|
static void
|
|
serial_xmit_d_empty_evt(void *priv)
|
|
{
|
|
serial_t *dev = (serial_t *) priv;
|
|
uint8_t is_empty = dev->fifo_enabled ? fifo_get_empty(dev->xmit_fifo) : dev->thr_empty;
|
|
|
|
dev->lsr = (dev->lsr & 0x9f) | (is_empty << 5) | ((dev->txsr_empty && is_empty) << 6);
|
|
dev->int_status = (dev->int_status & ~SERIAL_INT_TRANSMIT) | (is_empty ? SERIAL_INT_TRANSMIT : 0);
|
|
}
|
|
|
|
serial_t *
|
|
serial_attach_ex(int port,
|
|
void (*rcr_callback)(struct serial_s *serial, void *priv),
|
|
void (*dev_write)(struct serial_s *serial, void *priv, uint8_t data),
|
|
void (*transmit_period_callback)(struct serial_s *serial, void *priv, double transmit_period),
|
|
void (*lcr_callback)(struct serial_s *serial, void *priv, uint8_t data_bits),
|
|
void *priv)
|
|
{
|
|
serial_device_t *sd = &serial_devices[port];
|
|
|
|
sd->rcr_callback = rcr_callback;
|
|
sd->dev_write = dev_write;
|
|
sd->transmit_period_callback = transmit_period_callback;
|
|
sd->lcr_callback = lcr_callback;
|
|
sd->priv = priv;
|
|
|
|
return sd->serial;
|
|
}
|
|
|
|
serial_t *
|
|
serial_attach_ex_2(int port,
|
|
void (*rcr_callback)(struct serial_s *serial, void *priv),
|
|
void (*dev_write)(struct serial_s *serial, void *priv, uint8_t data),
|
|
void (*dtr_callback)(struct serial_s *serial, int status, void *priv),
|
|
void *priv)
|
|
{
|
|
serial_device_t *sd = &serial_devices[port];
|
|
|
|
sd->rcr_callback = rcr_callback;
|
|
sd->dtr_callback = dtr_callback;
|
|
sd->dev_write = dev_write;
|
|
sd->transmit_period_callback = NULL;
|
|
sd->lcr_callback = NULL;
|
|
sd->priv = priv;
|
|
|
|
return sd->serial;
|
|
}
|
|
|
|
static void
|
|
serial_speed_changed(void *priv)
|
|
{
|
|
serial_t *dev = (serial_t *) priv;
|
|
|
|
serial_update_speed(dev);
|
|
}
|
|
|
|
static void
|
|
serial_close(void *priv)
|
|
{
|
|
serial_t *dev = (serial_t *) priv;
|
|
|
|
next_inst--;
|
|
|
|
if (com_ports[dev->inst].enabled)
|
|
fifo_close(dev->rcvr_fifo);
|
|
|
|
free(dev);
|
|
}
|
|
|
|
static void
|
|
serial_reset(void *priv)
|
|
{
|
|
serial_t *dev = (serial_t *) priv;
|
|
|
|
if (com_ports[dev->inst].enabled) {
|
|
timer_disable(&dev->transmit_timer);
|
|
timer_disable(&dev->timeout_timer);
|
|
timer_disable(&dev->receive_timer);
|
|
|
|
dev->lsr = dev->thr = dev->mctrl = dev->rcr = 0x00;
|
|
dev->iir = dev->ier = dev->lcr = dev->msr = 0x00;
|
|
dev->dat = dev->int_status = dev->scratch = dev->fcr = 0x00;
|
|
dev->fifo_enabled = dev->bits = 0x000;
|
|
dev->data_bits = dev->baud_cycles = 0x00;
|
|
dev->txsr = 0x00;
|
|
dev->txsr_empty = 0x01;
|
|
dev->thr_empty = 0x0001;
|
|
|
|
dev->dlab = dev->out_new = 0x0000;
|
|
|
|
if (dev->rcvr_fifo != NULL)
|
|
fifo_reset(dev->rcvr_fifo);
|
|
|
|
serial_reset_port(dev);
|
|
|
|
dev->dlab = 96;
|
|
dev->fcr = 0x06;
|
|
|
|
serial_transmit_period(dev);
|
|
serial_update_speed(dev);
|
|
}
|
|
}
|
|
|
|
static void *
|
|
serial_init(const device_t *info)
|
|
{
|
|
serial_t *dev = (serial_t *) calloc(1, sizeof(serial_t));
|
|
|
|
dev->inst = next_inst;
|
|
|
|
if (com_ports[next_inst].enabled) {
|
|
serial_log("Adding serial port %i...\n", next_inst);
|
|
dev->type = info->local;
|
|
memset(&(serial_devices[next_inst]), 0, sizeof(serial_device_t));
|
|
dev->sd = &(serial_devices[next_inst]);
|
|
dev->sd->serial = dev;
|
|
if (next_inst == 6)
|
|
serial_setup(dev, COM7_ADDR, COM7_IRQ);
|
|
else if (next_inst == 5)
|
|
serial_setup(dev, COM6_ADDR, COM6_IRQ);
|
|
else if (next_inst == 4)
|
|
serial_setup(dev, COM5_ADDR, COM5_IRQ);
|
|
else if (next_inst == 3)
|
|
serial_setup(dev, COM4_ADDR, COM4_IRQ);
|
|
else if (next_inst == 2)
|
|
serial_setup(dev, COM3_ADDR, COM3_IRQ);
|
|
else if ((next_inst == 1) || (info->flags & DEVICE_PCJR))
|
|
serial_setup(dev, COM2_ADDR, COM2_IRQ);
|
|
else if (next_inst == 0)
|
|
serial_setup(dev, COM1_ADDR, COM1_IRQ);
|
|
|
|
/* Default to 1200,N,7. */
|
|
dev->dlab = 96;
|
|
dev->fcr = 0x06;
|
|
if (info->local == SERIAL_8250_PCJR)
|
|
dev->clock_src = 1789500.0;
|
|
else
|
|
dev->clock_src = 1843200.0;
|
|
timer_add(&dev->transmit_timer, serial_transmit_timer, dev, 0);
|
|
timer_add(&dev->timeout_timer, serial_timeout_timer, dev, 0);
|
|
timer_add(&dev->receive_timer, serial_receive_timer, dev, 0);
|
|
serial_transmit_period(dev);
|
|
serial_update_speed(dev);
|
|
|
|
dev->rcvr_fifo = fifo64_init();
|
|
fifo_set_priv(dev->rcvr_fifo, dev);
|
|
fifo_set_d_empty_evt(dev->rcvr_fifo, serial_rcvr_d_empty_evt);
|
|
fifo_set_d_overrun_evt(dev->rcvr_fifo, serial_rcvr_d_overrun_evt);
|
|
fifo_set_d_ready_evt(dev->rcvr_fifo, serial_rcvr_d_ready_evt);
|
|
fifo_reset_evt(dev->rcvr_fifo);
|
|
fifo_set_len(dev->rcvr_fifo, 16);
|
|
|
|
dev->xmit_fifo = fifo64_init();
|
|
fifo_set_priv(dev->xmit_fifo, dev);
|
|
fifo_set_d_empty_evt(dev->xmit_fifo, serial_xmit_d_empty_evt);
|
|
fifo_reset_evt(dev->xmit_fifo);
|
|
fifo_set_len(dev->xmit_fifo, 16);
|
|
|
|
serial_reset_port(dev);
|
|
}
|
|
|
|
next_inst++;
|
|
|
|
return dev;
|
|
}
|
|
|
|
void
|
|
serial_set_next_inst(int ni)
|
|
{
|
|
next_inst = ni;
|
|
}
|
|
|
|
void
|
|
serial_standalone_init(void)
|
|
{
|
|
while (next_inst < SERIAL_MAX)
|
|
device_add_inst(&ns8250_device, next_inst + 1);
|
|
};
|
|
|
|
const device_t ns8250_device = {
|
|
.name = "National Semiconductor 8250(-compatible) UART",
|
|
.internal_name = "ns8250",
|
|
.flags = 0,
|
|
.local = SERIAL_8250,
|
|
.init = serial_init,
|
|
.close = serial_close,
|
|
.reset = serial_reset,
|
|
.available = NULL,
|
|
.speed_changed = serial_speed_changed,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t ns8250_pcjr_device = {
|
|
.name = "National Semiconductor 8250(-compatible) UART for PCjr",
|
|
.internal_name = "ns8250_pcjr",
|
|
.flags = DEVICE_PCJR,
|
|
.local = SERIAL_8250_PCJR,
|
|
.init = serial_init,
|
|
.close = serial_close,
|
|
.reset = serial_reset,
|
|
.available = NULL,
|
|
.speed_changed = serial_speed_changed,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t ns16450_device = {
|
|
.name = "National Semiconductor NS16450(-compatible) UART",
|
|
.internal_name = "ns16450",
|
|
.flags = 0,
|
|
.local = SERIAL_16450,
|
|
.init = serial_init,
|
|
.close = serial_close,
|
|
.reset = serial_reset,
|
|
.available = NULL,
|
|
.speed_changed = serial_speed_changed,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t ns16550_device = {
|
|
.name = "National Semiconductor NS16550(-compatible) UART",
|
|
.internal_name = "ns16550",
|
|
.flags = 0,
|
|
.local = SERIAL_16550,
|
|
.init = serial_init,
|
|
.close = serial_close,
|
|
.reset = serial_reset,
|
|
.available = NULL,
|
|
.speed_changed = serial_speed_changed,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t ns16650_device = {
|
|
.name = "Startech Semiconductor 16650(-compatible) UART",
|
|
.internal_name = "ns16650",
|
|
.flags = 0,
|
|
.local = SERIAL_16650,
|
|
.init = serial_init,
|
|
.close = serial_close,
|
|
.reset = serial_reset,
|
|
.available = NULL,
|
|
.speed_changed = serial_speed_changed,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t ns16750_device = {
|
|
.name = "Texas Instruments 16750(-compatible) UART",
|
|
.internal_name = "ns16750",
|
|
.flags = 0,
|
|
.local = SERIAL_16750,
|
|
.init = serial_init,
|
|
.close = serial_close,
|
|
.reset = serial_reset,
|
|
.available = NULL,
|
|
.speed_changed = serial_speed_changed,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t ns16850_device = {
|
|
.name = "Exar Corporation NS16850(-compatible) UART",
|
|
.internal_name = "ns16850",
|
|
.flags = 0,
|
|
.local = SERIAL_16850,
|
|
.init = serial_init,
|
|
.close = serial_close,
|
|
.reset = serial_reset,
|
|
.available = NULL,
|
|
.speed_changed = serial_speed_changed,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t ns16950_device = {
|
|
.name = "Oxford Semiconductor NS16950(-compatible) UART",
|
|
.internal_name = "ns16950",
|
|
.flags = 0,
|
|
.local = SERIAL_16950,
|
|
.init = serial_init,
|
|
.close = serial_close,
|
|
.reset = serial_reset,
|
|
.available = NULL,
|
|
.speed_changed = serial_speed_changed,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|