5318bc08d8
Merged floppy.c and fdd.c and renamed floppy_*.c (the floppy image format handlers) to fdd_*.c; Reading the AT or PS/2 keyboard controller status no longer clears the transmit timeout bit, fixes error 8601 (mouse error) on the IBM PS/2 Model 80; MMU translate and DMA physical reads and writes now go through _mem_exec instead of directly to ram[], should fix the last remaining problems with remapped mappings; Implemented the Sound gain dialog; Added the resource for the "New floppy image" dialog and the needed functions for the functionality of exporting the currently mounted floppy image as 86F, both of which should be finished in the next commit; Applied the CD-ROM fixes from the PCem commit; Added the "Keep ratio" option for full screen stretch.
351 lines
8.1 KiB
C
351 lines
8.1 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the SMC FDC37C669 Super I/O Chip.
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*
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* Version: @(#)sio_fdc37c669.c 1.0.7 2018/01/16
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*
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* Author: Miran Grca, <mgrca8@gmail.com>
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* Copyright 2016-2018 Miran Grca.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <wchar.h>
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#include "86box.h"
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#include "io.h"
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#include "device.h"
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#include "pci.h"
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#include "lpt.h"
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#include "serial.h"
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#include "disk/hdc.h"
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#include "disk/hdc_ide.h"
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#include "floppy/fdd.h"
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#include "floppy/fdc.h"
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#include "sio.h"
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static int fdc37c669_locked;
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static int fdc37c669_rw_locked = 0;
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static int fdc37c669_curreg = 0;
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static uint8_t fdc37c669_regs[42];
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static uint8_t tries;
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static fdc_t *fdc37c669_fdc;
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static uint16_t make_port(uint8_t reg)
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{
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uint16_t p = 0;
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uint16_t mask = 0;
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switch(reg)
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{
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case 0x20:
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case 0x21:
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case 0x22:
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mask = 0xfc;
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break;
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case 0x23:
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mask = 0xff;
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break;
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case 0x24:
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case 0x25:
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mask = 0xfe;
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break;
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}
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p = ((uint16_t) (fdc37c669_regs[reg] & mask)) << 2;
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if (reg == 0x22)
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{
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p |= 6;
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}
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return p;
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}
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void fdc37c669_write(uint16_t port, uint8_t val, void *priv)
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{
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uint8_t index = (port & 1) ? 0 : 1;
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uint8_t valxor = 0;
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uint8_t max = 42;
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/* pclog("fdc37c669_write : port=%04x reg %02X = %02X locked=%i\n", port, fdc37c669_curreg, val, fdc37c669_locked); */
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if (index)
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{
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if ((val == 0x55) && !fdc37c669_locked)
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{
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if (tries)
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{
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fdc37c669_locked = 1;
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tries = 0;
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}
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else
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{
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tries++;
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}
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}
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else
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{
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if (fdc37c669_locked)
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{
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if (val < max) fdc37c669_curreg = val;
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if (val == 0xaa) fdc37c669_locked = 0;
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}
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else
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{
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if (tries)
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tries = 0;
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}
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}
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}
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else
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{
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if (fdc37c669_locked)
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{
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if ((fdc37c669_curreg < 0x18) && (fdc37c669_rw_locked)) return;
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if ((fdc37c669_curreg >= 0x26) && (fdc37c669_curreg <= 0x27)) return;
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if (fdc37c669_curreg == 0x29) return;
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valxor = val ^ fdc37c669_regs[fdc37c669_curreg];
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fdc37c669_regs[fdc37c669_curreg] = val;
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goto process_value;
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}
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}
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return;
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process_value:
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switch(fdc37c669_curreg)
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{
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case 0:
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#if 0
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if (valxor & 3)
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{
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ide_pri_disable();
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if ((fdc37c669_regs[0] & 3) == 2) ide_pri_enable_ex();
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break;
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}
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#endif
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if (valxor & 8)
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{
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fdc_remove(fdc37c669_fdc);
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if ((fdc37c669_regs[0] & 8) && (fdc37c669_regs[0x20] & 0xc0)) fdc_set_base(fdc37c669_fdc, make_port(0x20));
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}
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break;
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case 1:
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if (valxor & 4)
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{
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/* pclog("Removing LPT1\n"); */
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lpt1_remove();
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if ((fdc37c669_regs[1] & 4) && (fdc37c669_regs[0x23] >= 0x40))
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{
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/* pclog("LPT1 init (%02X)\n", make_port(0x23)); */
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lpt1_init(make_port(0x23));
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}
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}
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if (valxor & 7)
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{
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fdc37c669_rw_locked = (val & 8) ? 0 : 1;
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}
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break;
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case 2:
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if (valxor & 8)
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{
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/* pclog("Removing UART1\n"); */
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serial_remove(1);
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if ((fdc37c669_regs[2] & 8) && (fdc37c669_regs[0x24] >= 0x40))
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{
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/* pclog("UART1 init (%02X, %i)\n", make_port(0x24), (fdc37c669_regs[0x28] & 0xF0) >> 4); */
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serial_setup(1, make_port(0x24), (fdc37c669_regs[0x28] & 0xF0) >> 4);
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}
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}
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if (valxor & 0x80)
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{
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/* pclog("Removing UART2\n"); */
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serial_remove(2);
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if ((fdc37c669_regs[2] & 0x80) && (fdc37c669_regs[0x25] >= 0x40))
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{
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/* pclog("UART2 init (%02X, %i)\n", make_port(0x25), fdc37c669_regs[0x28] & 0x0F); */
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serial_setup(2, make_port(0x25), fdc37c669_regs[0x28] & 0x0F);
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}
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}
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break;
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case 3:
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if (valxor & 2) fdc_update_enh_mode(fdc37c669_fdc, (val & 2) ? 1 : 0);
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break;
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case 5:
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if (valxor & 0x18) fdc_update_densel_force(fdc37c669_fdc, (val & 0x18) >> 3);
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if (valxor & 0x20) fdc_set_swap(fdc37c669_fdc, (val & 0x20) >> 5);
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break;
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case 0xB:
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if (valxor & 3) fdc_update_rwc(fdc37c669_fdc, 0, val & 3);
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if (valxor & 0xC) fdc_update_rwc(fdc37c669_fdc, 1, (val & 0xC) >> 2);
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break;
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case 0x20:
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if (valxor & 0xfc)
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{
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fdc_remove(fdc37c669_fdc);
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if ((fdc37c669_regs[0] & 8) && (fdc37c669_regs[0x20] & 0xc0)) fdc_set_base(fdc37c669_fdc, make_port(0x20));
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}
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break;
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case 0x21:
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case 0x22:
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#if 0
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if (valxor & 0xfc)
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{
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ide_pri_disable();
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switch (fdc37c669_curreg)
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{
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case 0x21:
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ide_set_base(0, make_port(0x21));
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break;
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case 0x22:
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ide_set_side(0, make_port(0x22));
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break;
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}
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if ((fdc37c669_regs[0] & 3) == 2) ide_pri_enable_ex();
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}
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#endif
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break;
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case 0x23:
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if (valxor)
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{
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/* pclog("Removing LPT1\n"); */
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lpt1_remove();
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if ((fdc37c669_regs[1] & 4) && (fdc37c669_regs[0x23] >= 0x40))
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{
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/* pclog("LPT1 init (%02X)\n", make_port(0x23)); */
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lpt1_init(make_port(0x23));
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}
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}
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break;
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case 0x24:
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if (valxor & 0xfe)
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{
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/* pclog("Removing UART1\n"); */
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serial_remove(1);
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if ((fdc37c669_regs[2] & 8) && (fdc37c669_regs[0x24] >= 0x40))
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{
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/* pclog("UART1 init (%02X, %i)\n", make_port(0x24), (fdc37c669_regs[0x28] & 0xF0) >> 4); */
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serial_setup(1, make_port(0x24), (fdc37c669_regs[0x28] & 0xF0) >> 4);
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}
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}
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break;
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case 0x25:
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if (valxor & 0xfe)
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{
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/* pclog("Removing UART2\n"); */
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serial_remove(2);
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if ((fdc37c669_regs[2] & 0x80) && (fdc37c669_regs[0x25] >= 0x40))
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{
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/* pclog("UART2 init (%02X, %i)\n", make_port(0x25), fdc37c669_regs[0x28] & 0x0F); */
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serial_setup(2, make_port(0x25), fdc37c669_regs[0x28] & 0x0F);
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}
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}
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break;
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case 0x28:
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if (valxor & 0xf)
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{
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/* pclog("Removing UART2\n"); */
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serial_remove(2);
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if ((fdc37c669_regs[2] & 0x80) && (fdc37c669_regs[0x25] >= 0x40))
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{
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/* pclog("UART2 init (%02X, %i)\n", make_port(0x25), fdc37c669_regs[0x28] & 0x0F); */
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serial_setup(2, make_port(0x25), fdc37c669_regs[0x28] & 0x0F);
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}
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}
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if (valxor & 0xf0)
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{
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/* pclog("Removing UART1\n"); */
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serial_remove(1);
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if ((fdc37c669_regs[2] & 8) && (fdc37c669_regs[0x24] >= 0x40))
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{
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/* pclog("UART1 init (%02X, %i)\n", make_port(0x24), (fdc37c669_regs[0x28] & 0xF0) >> 4); */
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serial_setup(1, make_port(0x24), (fdc37c669_regs[0x28] & 0xF0) >> 4);
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}
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}
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break;
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}
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}
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uint8_t fdc37c669_read(uint16_t port, void *priv)
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{
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uint8_t index = (port & 1) ? 0 : 1;
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/* pclog("fdc37c669_read : port=%04x reg %02X locked=%i\n", port, fdc37c669_curreg, fdc37c669_locked); */
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if (!fdc37c669_locked)
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{
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return 0xFF;
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}
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if (index)
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return fdc37c669_curreg;
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else
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{
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/* pclog("0x03F1: %02X\n", fdc37c669_regs[fdc37c669_curreg]); */
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if ((fdc37c669_curreg < 0x18) && (fdc37c669_rw_locked)) return 0xff;
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return fdc37c669_regs[fdc37c669_curreg];
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}
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}
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void fdc37c669_reset(void)
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{
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fdc_reset(fdc37c669_fdc);
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serial_remove(1);
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serial_setup(1, SERIAL1_ADDR, SERIAL1_IRQ);
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serial_remove(2);
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serial_setup(2, SERIAL2_ADDR, SERIAL2_IRQ);
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lpt2_remove();
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lpt1_remove();
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lpt1_init(0x378);
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memset(fdc37c669_regs, 0, 42);
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fdc37c669_regs[0] = 0x28;
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fdc37c669_regs[1] = 0x9C;
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fdc37c669_regs[2] = 0x88;
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fdc37c669_regs[3] = 0x78;
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fdc37c669_regs[4] = 0;
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fdc37c669_regs[5] = 0;
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fdc37c669_regs[6] = 0xFF;
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fdc37c669_regs[7] = 0;
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fdc37c669_regs[8] = 0;
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fdc37c669_regs[9] = 0;
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fdc37c669_regs[0xA] = 0;
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fdc37c669_regs[0xB] = 0;
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fdc37c669_regs[0xC] = 0;
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fdc37c669_regs[0xD] = 3;
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fdc37c669_regs[0xE] = 2;
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fdc37c669_regs[0x1E] = 0x80; /* Gameport controller. */
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fdc37c669_regs[0x20] = (0x3f0 >> 2) & 0xfc;
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fdc37c669_regs[0x21] = (0x1f0 >> 2) & 0xfc;
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fdc37c669_regs[0x22] = ((0x3f6 >> 2) & 0xfc) | 1;
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fdc37c669_regs[0x23] = (0x378 >> 2);
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fdc37c669_regs[0x24] = (0x3f8 >> 2) & 0xfe;
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fdc37c669_regs[0x25] = (0x2f8 >> 2) & 0xfe;
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fdc37c669_regs[0x26] = (2 << 4) | 3;
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fdc37c669_regs[0x27] = (6 << 4) | 7;
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fdc37c669_regs[0x28] = (4 << 4) | 3;
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fdc37c669_locked = 0;
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fdc37c669_rw_locked = 0;
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}
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void fdc37c669_init()
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{
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fdc37c669_fdc = device_add(&fdc_at_smc_device);
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io_sethandler(0x3f0, 0x0002, fdc37c669_read, NULL, NULL, fdc37c669_write, NULL, NULL, NULL);
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fdc37c669_reset();
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pci_reset_handler.super_io_reset = fdc37c669_reset;
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}
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