604 lines
43 KiB
C
604 lines
43 KiB
C
#include <stdint.h>
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#include <86box/86box.h>
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#include "cpu.h"
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#include <86box/mem.h>
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#include "x86.h"
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#include "x86_flags.h"
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#include "386_common.h"
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#include "x87.h"
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#include "codegen.h"
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#include "codegen_accumulate.h"
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#include "codegen_ir.h"
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#include "codegen_ops.h"
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#include "codegen_ops_fpu_arith.h"
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#include "codegen_ops_helpers.h"
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uint32_t
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ropFADD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FADD(ir, IREG_ST(0), IREG_ST(0), IREG_ST(src_reg));
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uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
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return op_pc;
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}
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uint32_t
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ropFADDr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FADD(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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return op_pc;
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}
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uint32_t
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ropFADDP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FADD(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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fpu_POP(block, ir);
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return op_pc;
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}
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uint32_t
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ropFCOM(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(src_reg));
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uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0 | C2 | C3));
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uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
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return op_pc;
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}
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uint32_t
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ropFCOMP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(src_reg));
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uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0 | C2 | C3));
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uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
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fpu_POP(block, ir);
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return op_pc;
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}
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uint32_t
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ropFCOMPP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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uop_FP_ENTER(ir);
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uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(1));
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uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0 | C2 | C3));
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uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
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fpu_POP2(block, ir);
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return op_pc;
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}
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uint32_t
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ropFDIV(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FDIV(ir, IREG_ST(0), IREG_ST(0), IREG_ST(src_reg));
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uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
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return op_pc;
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}
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uint32_t
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ropFDIVR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FDIV(ir, IREG_ST(0), IREG_ST(src_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
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return op_pc;
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}
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uint32_t
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ropFDIVr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FDIV(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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return op_pc;
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}
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uint32_t
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ropFDIVRr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FDIV(ir, IREG_ST(dest_reg), IREG_ST(0), IREG_ST(dest_reg));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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return op_pc;
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}
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uint32_t
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ropFDIVP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FDIV(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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fpu_POP(block, ir);
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return op_pc;
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}
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uint32_t
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ropFDIVRP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FDIV(ir, IREG_ST(dest_reg), IREG_ST(0), IREG_ST(dest_reg));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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fpu_POP(block, ir);
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return op_pc;
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}
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uint32_t
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ropFMUL(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FMUL(ir, IREG_ST(0), IREG_ST(0), IREG_ST(src_reg));
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uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
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return op_pc;
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}
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uint32_t
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ropFMULr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FMUL(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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return op_pc;
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}
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uint32_t
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ropFMULP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FMUL(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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fpu_POP(block, ir);
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return op_pc;
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}
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uint32_t
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ropFSUB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FSUB(ir, IREG_ST(0), IREG_ST(0), IREG_ST(src_reg));
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uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
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return op_pc;
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}
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uint32_t
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ropFSUBR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FSUB(ir, IREG_ST(0), IREG_ST(src_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
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return op_pc;
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}
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uint32_t
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ropFSUBr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FSUB(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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return op_pc;
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}
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uint32_t
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ropFSUBRr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FSUB(ir, IREG_ST(dest_reg), IREG_ST(0), IREG_ST(dest_reg));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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return op_pc;
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}
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uint32_t
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ropFSUBP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FSUB(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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fpu_POP(block, ir);
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return op_pc;
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}
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uint32_t
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ropFSUBRP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FSUB(ir, IREG_ST(dest_reg), IREG_ST(0), IREG_ST(dest_reg));
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uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
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fpu_POP(block, ir);
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return op_pc;
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}
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uint32_t
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ropFUCOM(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(src_reg));
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uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0 | C2 | C3));
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uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
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return op_pc;
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}
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uint32_t
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ropFUCOMP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = fetchdat & 7;
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uop_FP_ENTER(ir);
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uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(src_reg));
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uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0 | C2 | C3));
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uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
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fpu_POP(block, ir);
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return op_pc;
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}
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uint32_t
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ropFUCOMPP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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uop_FP_ENTER(ir);
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uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(1));
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uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0 | C2 | C3));
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uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
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fpu_POP2(block, ir);
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return op_pc;
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}
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#define ropF_arith_mem(name, load_uop) \
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uint32_t ropFADD##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
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{ \
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x86seg *target_seg; \
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\
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if ((cpu_state.npxc >> 10) & 3) \
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return 0; \
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uop_FP_ENTER(ir); \
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
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op_pc--; \
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target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
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codegen_check_seg_read(block, ir, target_seg); \
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load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
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uop_FADD(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
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uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
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\
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return op_pc + 1; \
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} \
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uint32_t ropFCOM##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
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{ \
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x86seg *target_seg; \
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\
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uop_FP_ENTER(ir); \
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
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op_pc--; \
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target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
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codegen_check_seg_read(block, ir, target_seg); \
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load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
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uop_FCOM(ir, IREG_temp1_W, IREG_ST(0), IREG_temp0_D); \
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uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0 | C2 | C3)); \
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uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp1_W); \
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\
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return op_pc + 1; \
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} \
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uint32_t ropFCOMP##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
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{ \
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x86seg *target_seg; \
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\
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uop_FP_ENTER(ir); \
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
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op_pc--; \
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target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
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codegen_check_seg_read(block, ir, target_seg); \
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load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
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uop_FCOM(ir, IREG_temp1_W, IREG_ST(0), IREG_temp0_D); \
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uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0 | C2 | C3)); \
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uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp1_W); \
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fpu_POP(block, ir); \
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\
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return op_pc + 1; \
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} \
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uint32_t ropFDIV##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
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{ \
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x86seg *target_seg; \
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\
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uop_FP_ENTER(ir); \
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
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op_pc--; \
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target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
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codegen_check_seg_read(block, ir, target_seg); \
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load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
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uop_FDIV(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
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uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
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\
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return op_pc + 1; \
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} \
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uint32_t ropFDIVR##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
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{ \
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x86seg *target_seg; \
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\
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uop_FP_ENTER(ir); \
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
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op_pc--; \
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target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
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codegen_check_seg_read(block, ir, target_seg); \
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load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
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uop_FDIV(ir, IREG_ST(0), IREG_temp0_D, IREG_ST(0)); \
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uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
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\
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return op_pc + 1; \
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} \
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uint32_t ropFMUL##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
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{ \
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x86seg *target_seg; \
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\
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uop_FP_ENTER(ir); \
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
|
|
op_pc--; \
|
|
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
|
|
codegen_check_seg_read(block, ir, target_seg); \
|
|
load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
|
|
uop_FMUL(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
|
|
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
|
|
\
|
|
return op_pc + 1; \
|
|
} \
|
|
uint32_t ropFSUB##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
|
|
{ \
|
|
x86seg *target_seg; \
|
|
\
|
|
uop_FP_ENTER(ir); \
|
|
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
|
|
op_pc--; \
|
|
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
|
|
codegen_check_seg_read(block, ir, target_seg); \
|
|
load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
|
|
uop_FSUB(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
|
|
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
|
|
\
|
|
return op_pc + 1; \
|
|
} \
|
|
uint32_t ropFSUBR##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
|
|
{ \
|
|
x86seg *target_seg; \
|
|
\
|
|
uop_FP_ENTER(ir); \
|
|
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
|
|
op_pc--; \
|
|
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
|
|
codegen_check_seg_read(block, ir, target_seg); \
|
|
load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
|
|
uop_FSUB(ir, IREG_ST(0), IREG_temp0_D, IREG_ST(0)); \
|
|
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
|
|
\
|
|
return op_pc + 1; \
|
|
}
|
|
|
|
// clang-format off
|
|
ropF_arith_mem(s, uop_MEM_LOAD_SINGLE)
|
|
ropF_arith_mem(d, uop_MEM_LOAD_DOUBLE)
|
|
// clang-format on
|
|
|
|
#define ropFI_arith_mem(name, temp_reg) \
|
|
uint32_t ropFIADD##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
|
|
{ \
|
|
x86seg *target_seg; \
|
|
\
|
|
uop_FP_ENTER(ir); \
|
|
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
|
|
op_pc--; \
|
|
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
|
|
codegen_check_seg_read(block, ir, target_seg); \
|
|
uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
|
|
uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
|
|
uop_FADD(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
|
|
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
|
|
\
|
|
return op_pc + 1; \
|
|
} \
|
|
uint32_t ropFICOM##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
|
|
{ \
|
|
x86seg *target_seg; \
|
|
\
|
|
uop_FP_ENTER(ir); \
|
|
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
|
|
op_pc--; \
|
|
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
|
|
codegen_check_seg_read(block, ir, target_seg); \
|
|
uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
|
|
uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
|
|
uop_FCOM(ir, IREG_temp1_W, IREG_ST(0), IREG_temp0_D); \
|
|
uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0 | C2 | C3)); \
|
|
uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp1_W); \
|
|
\
|
|
return op_pc + 1; \
|
|
} \
|
|
uint32_t ropFICOMP##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
|
|
{ \
|
|
x86seg *target_seg; \
|
|
\
|
|
uop_FP_ENTER(ir); \
|
|
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
|
|
op_pc--; \
|
|
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
|
|
codegen_check_seg_read(block, ir, target_seg); \
|
|
uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
|
|
uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
|
|
uop_FCOM(ir, IREG_temp1_W, IREG_ST(0), IREG_temp0_D); \
|
|
uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0 | C2 | C3)); \
|
|
uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp1_W); \
|
|
fpu_POP(block, ir); \
|
|
\
|
|
return op_pc + 1; \
|
|
} \
|
|
uint32_t ropFIDIV##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
|
|
{ \
|
|
x86seg *target_seg; \
|
|
\
|
|
uop_FP_ENTER(ir); \
|
|
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
|
|
op_pc--; \
|
|
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
|
|
codegen_check_seg_read(block, ir, target_seg); \
|
|
uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
|
|
uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
|
|
uop_FDIV(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
|
|
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
|
|
\
|
|
return op_pc + 1; \
|
|
} \
|
|
uint32_t ropFIDIVR##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
|
|
{ \
|
|
x86seg *target_seg; \
|
|
\
|
|
uop_FP_ENTER(ir); \
|
|
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
|
|
op_pc--; \
|
|
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
|
|
codegen_check_seg_read(block, ir, target_seg); \
|
|
uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
|
|
uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
|
|
uop_FDIV(ir, IREG_ST(0), IREG_temp0_D, IREG_ST(0)); \
|
|
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
|
|
\
|
|
return op_pc + 1; \
|
|
} \
|
|
uint32_t ropFIMUL##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
|
|
{ \
|
|
x86seg *target_seg; \
|
|
\
|
|
uop_FP_ENTER(ir); \
|
|
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
|
|
op_pc--; \
|
|
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
|
|
codegen_check_seg_read(block, ir, target_seg); \
|
|
uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
|
|
uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
|
|
uop_FMUL(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
|
|
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
|
|
\
|
|
return op_pc + 1; \
|
|
} \
|
|
uint32_t ropFISUB##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
|
|
{ \
|
|
x86seg *target_seg; \
|
|
\
|
|
uop_FP_ENTER(ir); \
|
|
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
|
|
op_pc--; \
|
|
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
|
|
codegen_check_seg_read(block, ir, target_seg); \
|
|
uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
|
|
uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
|
|
uop_FSUB(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
|
|
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
|
|
\
|
|
return op_pc + 1; \
|
|
} \
|
|
uint32_t ropFISUBR##name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
|
|
{ \
|
|
x86seg *target_seg; \
|
|
\
|
|
uop_FP_ENTER(ir); \
|
|
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
|
|
op_pc--; \
|
|
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
|
|
codegen_check_seg_read(block, ir, target_seg); \
|
|
uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
|
|
uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
|
|
uop_FSUB(ir, IREG_ST(0), IREG_temp0_D, IREG_ST(0)); \
|
|
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
|
|
\
|
|
return op_pc + 1; \
|
|
}
|
|
|
|
ropFI_arith_mem(l, IREG_temp0)
|
|
ropFI_arith_mem(w, IREG_temp0_W)
|
|
|
|
uint32_t ropFABS(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
|
|
{
|
|
uop_FP_ENTER(ir);
|
|
uop_FABS(ir, IREG_ST(0), IREG_ST(0));
|
|
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
|
|
|
|
return op_pc;
|
|
}
|
|
|
|
uint32_t
|
|
ropFCHS(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
|
|
{
|
|
uop_FP_ENTER(ir);
|
|
uop_FCHS(ir, IREG_ST(0), IREG_ST(0));
|
|
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
|
|
|
|
return op_pc;
|
|
}
|
|
uint32_t
|
|
ropFSQRT(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
|
|
{
|
|
uop_FP_ENTER(ir);
|
|
uop_FSQRT(ir, IREG_ST(0), IREG_ST(0));
|
|
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
|
|
|
|
return op_pc;
|
|
}
|
|
uint32_t
|
|
ropFTST(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
|
|
{
|
|
uop_FP_ENTER(ir);
|
|
uop_FTST(ir, IREG_temp0_W, IREG_ST(0));
|
|
uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0 | C2 | C3));
|
|
uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
|
|
|
|
return op_pc;
|
|
}
|