9c8c1a6f40
1. The PAS SCSI controller driver mamv1.sys dislikes having bits 0-6 set when a transfer has completed, take account from this, fixes mamv1.sys incomplete CD transfers (bits 0-6 get re-enabled when the transfer is ongoing). 2. I now understand why the T128 doesn't have a block count register, it does the block count manually from the SCSI layer directly, this fixes Pseudo-DMA transfers when using, e.g.: CD transfers using a sector size of 2340 bytes.
53 lines
1.4 KiB
C
53 lines
1.4 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the NCR 53c400 series of SCSI Host Adapters
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* made by NCR. These controllers were designed for the ISA and MCA bus.
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*
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* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
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* TheCollector1995, <mariogplayer@gmail.com>
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* Fred N. van Kempen, <decwiz@yahoo.com>
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*
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* Copyright 2017-2018 Sarah Walker.
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* Copyright 2017-2018 Fred N. van Kempen.
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* Copyright 2017-2024 TheCollector1995.
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*/
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#ifndef SCSI_T128_H
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#define SCSI_T128_H
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typedef struct t128_t {
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ncr_t ncr;
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rom_t bios_rom;
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mem_mapping_t mapping;
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uint8_t ctrl;
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uint8_t status;
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uint8_t buffer[512];
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uint8_t ext_ram[0x80];
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uint32_t block_count;
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int block_loaded;
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int pos, host_pos;
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uint32_t rom_addr;
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int bios_enabled;
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uint8_t pos_regs[8];
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int type;
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pc_timer_t timer;
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} t128_t;
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extern void t128_write(uint32_t addr, uint8_t val, void *priv);
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extern uint8_t t128_read(uint32_t addr, void *priv);
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extern void t128_callback(void *priv);
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#endif /*SCSI_T128_H*/
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