423 lines
13 KiB
C
423 lines
13 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of Socket 8 machines.
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*
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*
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*
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* Authors: Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2016-2019 Miran Grca.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#include <86box/86box.h>
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#include <86box/mem.h>
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#include <86box/io.h>
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#include <86box/rom.h>
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#include <86box/pci.h>
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#include <86box/device.h>
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#include <86box/chipset.h>
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#include <86box/hdc.h>
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#include <86box/hdc_ide.h>
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#include <86box/keyboard.h>
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#include <86box/flash.h>
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#include <86box/timer.h>
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#include <86box/nvr.h>
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#include <86box/sio.h>
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#include <86box/hwm.h>
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#include <86box/spd.h>
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#include <86box/video.h>
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#include "cpu.h"
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#include <86box/machine.h>
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int
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machine_at_ap61_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear("roms/machines/ap61/ap61r120.bin",
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0x000e0000, 131072, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init(model);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x19, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x14, PCI_CARD_NORTHBRIDGE_SEC, 0, 0, 0, 0);
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pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x07, PCI_CARD_IDE, 0xFE, 0xFF, 0, 0);
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pci_register_slot(0x03, PCI_CARD_NORMAL, 1, 2, 3, 4);
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pci_register_slot(0x04, PCI_CARD_NORMAL, 2, 3, 4, 1);
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pci_register_slot(0x05, PCI_CARD_NORMAL, 3, 4, 1, 2);
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pci_register_slot(0x06, PCI_CARD_NORMAL, 4, 1, 2, 3);
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device_add(&i450kx_device);
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device_add(&sio_zb_device);
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device_add(&ide_cmd646_device);
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device_add(&keyboard_ps2_acer_pci_device);
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device_add(&fdc37c665_device);
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device_add(&sst_flash_29ee010_device);
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// device_add(&intel_flash_bxt_device);
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return ret;
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}
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int
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machine_at_p6rp4_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear("roms/machines/p6rp4/OR6I0106.SMC",
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0x000e0000, 131072, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init_ex(model, 2);
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device_add(&p6rp4_nvr_device);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x19, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x14, PCI_CARD_NORTHBRIDGE_SEC, 0, 0, 0, 0);
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pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x08, PCI_CARD_IDE, 0, 0, 0, 0);
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pci_register_slot(0x07, PCI_CARD_NORMAL, 1, 2, 3, 4);
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pci_register_slot(0x06, PCI_CARD_NORMAL, 2, 3, 4, 1);
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pci_register_slot(0x05, PCI_CARD_NORMAL, 3, 4, 1, 2);
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pci_register_slot(0x04, PCI_CARD_NORMAL, 4, 1, 2, 3);
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device_add(&i450kx_device);
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device_add(&sio_zb_device);
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device_add(&ide_cmd646_device);
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/* Input port bit 2 must be 1 or CMOS Setup is disabled. */
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device_add(&keyboard_ps2_ami_pci_device);
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device_add(&fdc37c665_device);
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device_add(&intel_flash_bxt_device);
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return ret;
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}
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int
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machine_at_686nx_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear("roms/machines/686nx/6nx.140",
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0x000e0000, 131072, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init(model);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
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pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
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pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
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pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
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device_add(&i440fx_device);
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device_add(&piix3_device);
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device_add(&keyboard_ps2_ami_pci_device); // Uses the AMIKEY keyboard controller
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device_add(&um8669f_device);
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device_add(&intel_flash_bxt_device);
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return ret;
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}
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int
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machine_at_mb600n_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear("roms/machines/mb600n/60915cs.rom",
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0x000e0000, 131072, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init(model);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4);
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pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
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pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
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pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
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device_add(&i440fx_device);
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device_add(&piix3_device);
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device_add(&keyboard_ps2_ami_pci_device);
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device_add(&fdc37c669_device);
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device_add(&intel_flash_bxt_device);
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return ret;
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}
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int
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machine_at_acerv60n_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear("roms/machines/acerv60n/V60NE5.BIN",
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0x000e0000, 131072, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init(model);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
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pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1);
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pci_register_slot(0x10, PCI_CARD_NORMAL, 3, 4, 1, 2);
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pci_register_slot(0x12, PCI_CARD_NORMAL, 4, 1, 2, 3);
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pci_register_slot(0x0C, PCI_CARD_NORMAL, 2, 3, 4, 1);
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device_add(&i440fx_device);
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device_add(&piix3_device);
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device_add(&keyboard_ps2_pci_device);
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device_add(&fdc37c935_device);
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device_add(&sst_flash_29ee010_device);
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return ret;
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}
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int
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machine_at_lgibmx61_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear("roms/machines/lgibmx61/bios.rom",
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0x000e0000, 131072, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init(model);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
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pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
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pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2);
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pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
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device_add(&i440fx_device);
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device_add(&piix3_device);
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// device_add(&keyboard_ps2_ami_pci_device);
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device_add(&keyboard_ps2_ami_device);
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// device_add(&w83787f_device);
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device_add(&w83877f_president_device);
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device_add(&sst_flash_29ee010_device);
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return ret;
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}
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int
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machine_at_vs440fx_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear_combined2("roms/machines/vs440fx/1018CS1_.BIO",
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"roms/machines/vs440fx/1018CS1_.BI1",
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"roms/machines/vs440fx/1018CS1_.BI2",
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"roms/machines/vs440fx/1018CS1_.BI3",
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"roms/machines/vs440fx/1018CS1_.RCV",
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0x3a000, 128);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init(model);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x0B, PCI_CARD_NORMAL, 1, 2, 3, 4);
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pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
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pci_register_slot(0x11, PCI_CARD_NORMAL, 3, 4, 1, 2);
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pci_register_slot(0x13, PCI_CARD_NORMAL, 2, 3, 4, 1);
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pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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device_add(&i440fx_device);
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device_add(&piix3_device);
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device_add(&keyboard_ps2_intel_ami_pci_device);
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device_add(&pc87307_device);
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device_add(&intel_flash_bxt_ami_device);
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return ret;
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}
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int
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machine_at_gw2kvenus_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear_combined2("roms/machines/gw2kvenus/1011CS1T.BIO",
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"roms/machines/gw2kvenus/1011CS1T.BI1",
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"roms/machines/gw2kvenus/1011CS1T.BI2",
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"roms/machines/gw2kvenus/1011CS1T.BI3",
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"roms/machines/gw2kvenus/1011CS1T.RCV",
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0x3a000, 128);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init(model);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x0B, PCI_CARD_NORMAL, 1, 2, 3, 4);
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pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
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pci_register_slot(0x11, PCI_CARD_NORMAL, 3, 4, 1, 2);
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pci_register_slot(0x13, PCI_CARD_NORMAL, 2, 3, 4, 1);
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pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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device_add(&i440fx_device);
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device_add(&piix3_device);
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device_add(&keyboard_ps2_intel_ami_pci_device);
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device_add(&pc87307_device);
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device_add(&intel_flash_bxt_ami_device);
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return ret;
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}
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int
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machine_at_ap440fx_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear_combined2("roms/machines/ap440fx/1011CT1_.BIO",
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"roms/machines/ap440fx/1011CT1_.BI1",
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"roms/machines/ap440fx/1011CT1_.BI2",
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"roms/machines/ap440fx/1011CT1_.BI3",
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"roms/machines/ap440fx/1011CT1_.RCV",
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0x3a000, 128);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init(model);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x08, PCI_CARD_VIDEO, 3, 0, 0, 0);
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pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 3, 2, 4);
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pci_register_slot(0x13, PCI_CARD_NORMAL, 2, 1, 3, 4);
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pci_register_slot(0x0B, PCI_CARD_NORMAL, 3, 2, 1, 4);
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pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 4);
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device_add(&i440fx_device);
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device_add(&piix3_device);
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device_add(&keyboard_ps2_ami_pci_device);
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device_add(&pc87307_device);
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device_add(&intel_flash_bxt_ami_device);
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return ret;
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}
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int
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machine_at_8600ttc_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear("roms/machines/8600ttc/TTC0715B.ROM",
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0x000e0000, 131072, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init(model);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
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pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
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pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
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pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
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device_add(&i440fx_device);
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device_add(&piix3_device);
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device_add(&keyboard_ps2_ami_pci_device);
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device_add(&fdc37c669_device);
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device_add(&intel_flash_bxt_device);
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return ret;
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}
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int
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machine_at_m6mi_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear("roms/machines/m6mi/M6MI05.ROM",
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0x000e0000, 131072, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init(model);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x12, PCI_CARD_NORMAL, 1, 2, 3, 4);
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pci_register_slot(0x11, PCI_CARD_NORMAL, 2, 3, 4, 1);
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pci_register_slot(0x10, PCI_CARD_NORMAL, 3, 4, 1, 2);
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pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
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device_add(&i440fx_device);
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device_add(&piix3_device);
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device_add(&keyboard_ps2_ami_pci_device);
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device_add(&fdc37c935_device);
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device_add(&intel_flash_bxt_device);
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return ret;
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}
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void
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machine_at_p65up5_common_init(const machine_t *model, const device_t *northbridge)
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{
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machine_at_common_init(model);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
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pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
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pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
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pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
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pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3);
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device_add(northbridge);
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device_add(&piix3_ioapic_device);
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device_add(&keyboard_ps2_ami_pci_device);
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device_add(&w83877f_device);
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device_add(&sst_flash_29ee010_device);
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device_add(&ioapic_device);
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}
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int
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machine_at_p65up5_cp6nd_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear("roms/machines/p65up5/ND6I0218.AWD",
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0x000e0000, 131072, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_p65up5_common_init(model, &i440fx_device);
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return ret;
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}
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