290 lines
7.3 KiB
C
290 lines
7.3 KiB
C
/*
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* ESFMu: emulator for the ESS "ESFM" enhanced OPL3 clone
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* Copyright (C) 2023 Kagamiin~
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*
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* ESFMu is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as
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* published by the Free Software Foundation, either version 2.1
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* of the License, or (at your option) any later version.
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*
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* ESFMu is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with ESFMu. If not, see <https://www.gnu.org/licenses/>.
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*/
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/*
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* ESFMu wouldn't have been possible without the hard work and dedication of
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* the retro computer hardware research and preservation community.
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*
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* I'd like to thank:
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* - Nuke.YKT
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* Developer of Nuked OPL3, which was the basis for ESFMu's code and
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* also a great learning resource on Yamaha FM synthesis for myself.
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* Nuke.YKT also gives shoutouts on behalf of Nuked OPL3 to:
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* - MAME Development Team(Jarek Burczynski, Tatsuyuki Satoh):
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* Feedback and Rhythm part calculation information.
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* - forums.submarine.org.uk(carbon14, opl3):
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* Tremolo and phase generator calculation information.
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* - OPLx decapsulated(Matthew Gambrell, Olli Niemitalo):
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* OPL2 ROMs.
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* - siliconpr0n.org(John McMaster, digshadow):
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* YMF262 and VRC VII decaps and die shots.
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* - rainwarrior
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* For performing the initial research on ESFM drivers and documenting
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* ESS's patent on native mode operator organization.
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* - jwt27
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* For kickstarting the ESFM research project and compiling rainwarrior's
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* findings and more in an accessible document ("ESFM Demystified").
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* - pachuco/CatButts
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* For documenting ESS's patent on ESFM's feedback implementation, which
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* was vital in getting ESFMu's sound output to be accurate.
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* - akumanatt
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* For helping out with code optimization.
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* - And everybody who helped out with real hardware testing
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*/
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#include <stddef.h>
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct _esfm_slot esfm_slot;
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typedef struct _esfm_slot_internal esfm_slot_internal;
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typedef struct _esfm_channel esfm_channel;
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typedef struct _esfm_chip esfm_chip;
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void ESFM_init (esfm_chip *chip);
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void ESFM_write_reg (esfm_chip *chip, uint16_t address, uint8_t data);
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void ESFM_write_reg_buffered (esfm_chip *chip, uint16_t address, uint8_t data);
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void ESFM_write_reg_buffered_fast (esfm_chip *chip, uint16_t address, uint8_t data);
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void ESFM_write_port (esfm_chip *chip, uint8_t offset, uint8_t data);
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uint8_t ESFM_readback_reg (esfm_chip *chip, uint16_t address);
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uint8_t ESFM_read_port (esfm_chip *chip, uint8_t offset);
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void ESFM_generate(esfm_chip *chip, int32_t *buf);
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void ESFM_generate_stream(esfm_chip *chip, int16_t *sndptr, uint32_t num_samples);
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int16_t ESFM_get_channel_output_native(esfm_chip *chip, int channel_idx);
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// These are fake types just for syntax sugar.
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// Beware of their underlying types when reading/writing to them.
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typedef uint8_t ebit;
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typedef uint8_t uint2;
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typedef uint8_t uint3;
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typedef uint8_t uint4;
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typedef uint8_t uint5;
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typedef uint8_t uint6;
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typedef uint8_t uint8;
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typedef uint16_t uint9;
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typedef uint16_t uint10;
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typedef uint16_t uint11;
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typedef uint16_t uint12;
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typedef uint16_t uint16;
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typedef uint32_t uint19;
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typedef uint32_t uint23;
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typedef uint32_t uint32;
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typedef uint64_t uint36;
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typedef int16_t int13;
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typedef int16_t int14;
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typedef int16_t int16;
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typedef int32_t int32;
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enum eg_states
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{
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EG_ATTACK,
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EG_DECAY,
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EG_SUSTAIN,
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EG_RELEASE
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};
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typedef struct _esfm_write_buf
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{
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uint64_t timestamp;
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uint16_t address;
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uint8_t data;
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ebit valid;
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} esfm_write_buf;
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typedef struct _emu_slot_channel_mapping
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{
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int channel_idx;
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int slot_idx;
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} emu_slot_channel_mapping;
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typedef struct _esfm_slot_internal
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{
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uint9 eg_position;
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uint9 eg_ksl_offset;
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uint10 eg_output;
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uint4 keyscale;
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int13 output;
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int13 emu_output_enable;
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int13 emu_mod_enable;
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int13 feedback_buf;
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int13 *mod_input;
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uint19 phase_acc;
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uint10 phase_out;
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ebit phase_reset;
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ebit *key_on;
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ebit key_on_gate;
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uint2 eg_state;
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ebit eg_delay_run;
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ebit eg_delay_transitioned_10;
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ebit eg_delay_transitioned_10_gate;
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ebit eg_delay_transitioned_01;
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ebit eg_delay_transitioned_01_gate;
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uint16 eg_delay_counter;
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uint16 eg_delay_counter_compare;
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} esfm_slot_internal;
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struct _esfm_slot
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{
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// Metadata
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esfm_channel *channel;
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esfm_chip *chip;
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uint2 slot_idx;
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// Register data
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int13 out_enable[2];
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uint10 f_num;
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uint3 block;
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uint3 output_level;
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// a.k.a. feedback level in emu mode
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uint3 mod_in_level;
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uint6 t_level;
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uint4 mult;
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uint3 waveform;
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// Only for 4th slot
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uint2 rhy_noise;
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uint4 attack_rate;
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uint4 decay_rate;
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uint4 sustain_lvl;
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uint4 release_rate;
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ebit tremolo_en;
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ebit tremolo_deep;
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ebit vibrato_en;
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ebit vibrato_deep;
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ebit emu_connection_typ;
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ebit env_sustaining;
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ebit ksr;
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uint2 ksl;
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uint3 env_delay;
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// overlaps with env_delay bit 0
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// TODO: check if emu mode only uses this, or if it actually overwrites the channel field used by native mode
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ebit emu_key_on;
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// Internal state
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esfm_slot_internal in;
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};
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struct _esfm_channel
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{
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esfm_chip *chip;
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esfm_slot slots[4];
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uint5 channel_idx;
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int16 output[2];
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ebit key_on;
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ebit emu_mode_4op_enable;
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// Only for 17th and 18th channels
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ebit key_on_2;
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ebit emu_mode_4op_enable_2;
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};
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#define ESFM_WRITEBUF_SIZE 1024
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#define ESFM_WRITEBUF_DELAY 2
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struct _esfm_chip
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{
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esfm_channel channels[18];
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int32 output_accm[2];
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uint16 addr_latch;
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ebit emu_wavesel_enable;
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ebit emu_newmode;
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ebit native_mode;
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ebit keyscale_mode;
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// Global state
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uint36 eg_timer;
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uint10 global_timer;
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uint8 eg_clocks;
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ebit eg_tick;
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ebit eg_timer_overflow;
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uint8 tremolo;
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uint8 tremolo_pos;
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uint8 vibrato_pos;
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uint23 lfsr;
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ebit rm_hh_bit2;
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ebit rm_hh_bit3;
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ebit rm_hh_bit7;
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ebit rm_hh_bit8;
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ebit rm_tc_bit3;
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ebit rm_tc_bit5;
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// 0xbd register in emulation mode, exposed in 0x4bd in native mode
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// ("bass drum" register)
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uint8 emu_rhy_mode_flags;
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ebit emu_vibrato_deep;
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ebit emu_tremolo_deep;
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double timer_accumulator[2];
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uint8 timer_reload[2];
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uint8 timer_counter[2];
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ebit timer_enable[2];
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ebit timer_mask[2];
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ebit timer_overflow[2];
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ebit irq_bit;
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// -- Test bits (NOT IMPLEMENTED) --
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// Halts the envelope generators from advancing. Written on bit 0, read back from bit 5.
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ebit test_bit_w0_r5_eg_halt;
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/*
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* Activates some sort of waveform test mode that amplifies the output volume greatly
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* and continuously shifts the waveform table downwards, possibly also outputting the
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* waveform's derivative? (it's so weird!)
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*/
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ebit test_bit_1_distort;
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// Seems to do nothing.
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ebit test_bit_2;
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// Seems to do nothing.
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ebit test_bit_3;
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// Appears to attenuate the output by about 3 dB.
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ebit test_bit_4_attenuate;
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// Written on bit 5, read back from bit 0. Seems to do nothing.
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ebit test_bit_w5_r0;
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// Resets all phase generators and holds them in the reset state while this bit is set.
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ebit test_bit_6_phase_stop_reset;
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// Seems to do nothing.
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ebit test_bit_7;
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esfm_write_buf write_buf[ESFM_WRITEBUF_SIZE];
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size_t write_buf_start;
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size_t write_buf_end;
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uint64_t write_buf_timestamp;
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};
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#ifdef __cplusplus
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}
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#endif
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