157 lines
3.9 KiB
C
157 lines
3.9 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the ACC 2168 chipset
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* used by the Packard Bell Legend 760 Supreme (PB410A or PB430).
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*
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*
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*
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* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
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*
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* Copyright 2019 Sarah Walker.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#include <86box/86box.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/device.h>
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#include <86box/keyboard.h>
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#include <86box/io.h>
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#include <86box/mem.h>
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#include <86box/mouse.h>
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#include <86box/port_92.h>
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#include <86box/sio.h>
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#include <86box/hdc.h>
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#include <86box/video.h>
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#include <86box/chipset.h>
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typedef struct acc2168_t
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{
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int reg_idx;
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uint8_t regs[256];
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uint8_t port_78;
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} acc2168_t;
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/*
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Based on reverse engineering using the AMI 386DX Clone BIOS:
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Bit 0 of register 02 controls shadowing of C0000-C7FFF (1 = enabled, 0 = disabled);
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Bit 1 of register 02 controls shadowing of C8000-CFFFF (1 = enabled, 0 = disabled);
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Bit 2 of register 02 controls shadowing of D0000-DFFFF (1 = enabled, 0 = disabled);
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Bit 3 of register 02 controls shadowing of E0000-EFFFF (1 = enabled, 0 = disabled);
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Bit 4 of register 02 controls shadowing of F0000-FFFFF (1 = enabled, 0 = disabled);
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Bit 5 is most likely: 1 = shadow enabled, 0 = shadow disabled;
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Bit 6 of register 02 controls shadow RAM cacheability (1 = cacheable, 0 = non-cacheable).
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*/
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static void
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acc2168_shadow_recalc(acc2168_t *dev)
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{
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int state;
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if (dev->regs[0x02] & 0x20)
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state = (dev->regs[0x02] & 0x20) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY);
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mem_set_mem_state(0xc0000, 0x08000, (dev->regs[0x02] & 0x01) ? state : (MEM_READ_EXTANY | MEM_WRITE_EXTANY));
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mem_set_mem_state(0xc8000, 0x08000, (dev->regs[0x02] & 0x02) ? state : (MEM_READ_EXTANY | MEM_WRITE_EXTANY));
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mem_set_mem_state(0xd0000, 0x10000, (dev->regs[0x02] & 0x04) ? state : (MEM_READ_EXTANY | MEM_WRITE_EXTANY));
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mem_set_mem_state(0xe0000, 0x10000, (dev->regs[0x02] & 0x08) ? state : (MEM_READ_EXTANY | MEM_WRITE_EXTANY));
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mem_set_mem_state(0xf0000, 0x10000, (dev->regs[0x02] & 0x10) ? state : (MEM_READ_EXTANY | MEM_WRITE_EXTANY));
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}
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static void
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acc2168_write(uint16_t addr, uint8_t val, void *p)
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{
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acc2168_t *dev = (acc2168_t *)p;
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if (!(addr & 1))
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dev->reg_idx = val;
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else {
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dev->regs[dev->reg_idx] = val;
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switch (dev->reg_idx) {
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case 0x02:
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acc2168_shadow_recalc(dev);
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break;
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}
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}
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}
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static uint8_t
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acc2168_read(uint16_t addr, void *p)
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{
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acc2168_t *dev = (acc2168_t *)p;
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if (!(addr & 1))
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return dev->reg_idx;
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return dev->regs[dev->reg_idx];
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}
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/*
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Bit 7 = Super I/O chip: 1 = enabled, 0 = disabled;
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Bit 6 = Graphics card: 1 = standalone, 0 = on-board;
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Bit 5 = ???? (if 1, siren and hangs).
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*/
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static uint8_t
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acc2168_port_78_read(uint16_t addr, void *p)
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{
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acc2168_t *dev = (acc2168_t *)p;
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return dev->port_78;
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}
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static void
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acc2168_close(void *priv)
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{
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acc2168_t *dev = (acc2168_t *) priv;
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free(dev);
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}
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static void *
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acc2168_init(const device_t *info)
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{
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acc2168_t *dev = (acc2168_t *)malloc(sizeof(acc2168_t));
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memset(dev, 0, sizeof(acc2168_t));
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io_sethandler(0x00f2, 0x0002,
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acc2168_read, NULL, NULL, acc2168_write, NULL, NULL, dev);
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io_sethandler(0x0078, 0x0001,
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acc2168_port_78_read, NULL, NULL, NULL, NULL, NULL, dev);
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device_add(&port_92_inv_device);
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if (gfxcard != VID_INTERNAL)
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dev->port_78 = 0x40;
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else
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dev->port_78 = 0;
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return dev;
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}
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const device_t acc2168_device = {
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"ACC 2168",
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0,
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0,
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acc2168_init, acc2168_close, NULL,
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NULL, NULL, NULL,
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NULL
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};
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