566 lines
9.1 KiB
C
566 lines
9.1 KiB
C
#define MMX_GETSHIFT() \
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if (cpu_mod == 3) { \
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shift = (MMX_GETREG(cpu_rm)).b[0]; \
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CLOCK_CYCLES(1); \
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} else { \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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shift = readmemb(easeg, cpu_state.eaaddr); \
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if (cpu_state.abrt) \
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return 0; \
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CLOCK_CYCLES(2); \
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}
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static int
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opPSxxW_imm(uint32_t fetchdat)
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{
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int reg = fetchdat & 7;
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int op = fetchdat & 0x38;
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int shift = (fetchdat >> 8) & 0xff;
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MMX_REG *dst;
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cpu_state.pc += 2;
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MMX_ENTER();
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dst = MMX_GETREGP(reg);
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switch (op) {
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case 0x10: /*PSRLW*/
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if (shift > 15)
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dst->q = 0;
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else {
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dst->w[0] >>= shift;
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dst->w[1] >>= shift;
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dst->w[2] >>= shift;
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dst->w[3] >>= shift;
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}
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break;
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case 0x20: /*PSRAW*/
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if (shift > 15)
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shift = 15;
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dst->sw[0] >>= shift;
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dst->sw[1] >>= shift;
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dst->sw[2] >>= shift;
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dst->sw[3] >>= shift;
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break;
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case 0x30: /*PSLLW*/
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if (shift > 15)
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dst->q = 0;
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else {
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dst->w[0] <<= shift;
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dst->w[1] <<= shift;
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dst->w[2] <<= shift;
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dst->w[3] <<= shift;
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}
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break;
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default:
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cpu_state.pc = cpu_state.oldpc;
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x86illegal();
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return 0;
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}
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MMX_SETEXP(reg);
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CLOCK_CYCLES(1);
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return 0;
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}
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static int
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opPSLLW_a16(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_16(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 15)
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dst->q = 0;
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else {
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dst->w[0] <<= shift;
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dst->w[1] <<= shift;
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dst->w[2] <<= shift;
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dst->w[3] <<= shift;
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}
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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static int
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opPSLLW_a32(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_32(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 15)
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dst->q = 0;
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else {
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dst->w[0] <<= shift;
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dst->w[1] <<= shift;
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dst->w[2] <<= shift;
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dst->w[3] <<= shift;
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}
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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static int
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opPSRLW_a16(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_16(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 15)
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dst->q = 0;
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else {
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dst->w[0] >>= shift;
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dst->w[1] >>= shift;
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dst->w[2] >>= shift;
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dst->w[3] >>= shift;
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}
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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static int
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opPSRLW_a32(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_32(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 15)
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dst->q = 0;
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else {
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dst->w[0] >>= shift;
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dst->w[1] >>= shift;
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dst->w[2] >>= shift;
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dst->w[3] >>= shift;
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}
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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static int
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opPSRAW_a16(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_16(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 15)
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shift = 15;
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dst->sw[0] >>= shift;
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dst->sw[1] >>= shift;
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dst->sw[2] >>= shift;
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dst->sw[3] >>= shift;
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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static int
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opPSRAW_a32(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_32(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 15)
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shift = 15;
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dst->sw[0] >>= shift;
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dst->sw[1] >>= shift;
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dst->sw[2] >>= shift;
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dst->sw[3] >>= shift;
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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static int
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opPSxxD_imm(uint32_t fetchdat)
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{
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int reg = fetchdat & 7;
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int op = fetchdat & 0x38;
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int shift = (fetchdat >> 8) & 0xff;
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MMX_REG *dst;
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cpu_state.pc += 2;
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MMX_ENTER();
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dst = MMX_GETREGP(reg);
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switch (op) {
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case 0x10: /*PSRLD*/
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if (shift > 31)
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dst->q = 0;
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else {
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dst->l[0] >>= shift;
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dst->l[1] >>= shift;
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}
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break;
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case 0x20: /*PSRAD*/
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if (shift > 31)
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shift = 31;
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dst->sl[0] >>= shift;
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dst->sl[1] >>= shift;
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break;
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case 0x30: /*PSLLD*/
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if (shift > 31)
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dst->q = 0;
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else {
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dst->l[0] <<= shift;
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dst->l[1] <<= shift;
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}
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break;
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default:
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cpu_state.pc = cpu_state.oldpc;
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x86illegal();
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return 0;
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}
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MMX_SETEXP(reg);
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CLOCK_CYCLES(1);
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return 0;
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}
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static int
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opPSLLD_a16(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_16(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 31)
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dst->q = 0;
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else {
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dst->l[0] <<= shift;
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dst->l[1] <<= shift;
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}
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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static int
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opPSLLD_a32(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_32(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 31)
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dst->q = 0;
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else {
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dst->l[0] <<= shift;
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dst->l[1] <<= shift;
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}
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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static int
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opPSRLD_a16(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_16(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 31)
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dst->q = 0;
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else {
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dst->l[0] >>= shift;
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dst->l[1] >>= shift;
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}
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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static int
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opPSRLD_a32(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_32(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 31)
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dst->q = 0;
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else {
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dst->l[0] >>= shift;
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dst->l[1] >>= shift;
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}
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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static int
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opPSRAD_a16(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_16(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 31)
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shift = 31;
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dst->sl[0] >>= shift;
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dst->sl[1] >>= shift;
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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static int
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opPSRAD_a32(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_32(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 31)
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shift = 31;
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dst->sl[0] >>= shift;
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dst->sl[1] >>= shift;
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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static int
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opPSxxQ_imm(uint32_t fetchdat)
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{
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int reg = fetchdat & 7;
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int op = fetchdat & 0x38;
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int shift = (fetchdat >> 8) & 0xff;
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MMX_REG *dst;
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cpu_state.pc += 2;
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MMX_ENTER();
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dst = MMX_GETREGP(reg);
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switch (op) {
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case 0x10: /*PSRLW*/
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if (shift > 63)
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dst->q = 0;
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else
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dst->q >>= shift;
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break;
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case 0x20: /*PSRAW*/
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if (shift > 63)
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shift = 63;
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dst->sq >>= shift;
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break;
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case 0x30: /*PSLLW*/
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if (shift > 63)
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dst->q = 0;
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else
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dst->q <<= shift;
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break;
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default:
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cpu_state.pc = cpu_state.oldpc;
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x86illegal();
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return 0;
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}
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MMX_SETEXP(reg);
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CLOCK_CYCLES(1);
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return 0;
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}
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static int
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opPSLLQ_a16(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_16(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 63)
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dst->q = 0;
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else
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dst->q <<= shift;
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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static int
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opPSLLQ_a32(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_32(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 63)
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dst->q = 0;
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else
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dst->q <<= shift;
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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static int
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opPSRLQ_a16(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_16(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 63)
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dst->q = 0;
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else
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dst->q >>= shift;
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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static int
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opPSRLQ_a32(uint32_t fetchdat)
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{
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MMX_REG *dst;
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int shift;
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MMX_ENTER();
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fetch_ea_32(fetchdat);
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dst = MMX_GETREGP(cpu_reg);
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MMX_GETSHIFT();
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if (shift > 63)
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dst->q = 0;
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else
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dst->q >>= shift;
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MMX_SETEXP(cpu_reg);
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return 0;
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}
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