SCSI controller is now reset on x86 soft reset, fixes DOS driver hangs after soft reset; SCSI controller reset control is now implemented more accurately, on a 50 ms timer; For the PS/1 Model 2011, the Keyboard Input Port bit 6 now correctly reports if the currently selected (in FDC DOR) floppy drive is 3.5" or 5.25"; Commented out excess DMA logging; Added support for FDF floppy images; Fixed handling of CDB allocated length field for the CD-ROM INQUIRY command; (S)VGA port 03C1 write is back again (it was incorrectly gone in some builds); Commented out Compaq/Paradise VGA; PS/1 Model 2121+ISA now correctly allows selecting graphics card.
469 lines
16 KiB
C
469 lines
16 KiB
C
/* Copyright holders: Sarah Walker, Tenshi
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see COPYING for more details
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*/
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/*Paradise VGA emulation
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PC2086, PC3086 use PVGA1A
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MegaPC uses W90C11A
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*/
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#include <stdlib.h>
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#include "ibm.h"
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#include "device.h"
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#include "mem.h"
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#include "rom.h"
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#include "video.h"
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#include "vid_paradise.h"
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#include "vid_svga.h"
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#include "vid_svga_render.h"
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#include "vid_unk_ramdac.h"
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typedef struct paradise_t
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{
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svga_t svga;
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rom_t bios_rom;
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enum
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{
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PVGA1A = 0,
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WD90C11
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} type;
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uint32_t read_bank[4], write_bank[4];
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} paradise_t;
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void paradise_write(uint32_t addr, uint8_t val, void *p);
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uint8_t paradise_read(uint32_t addr, void *p);
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void paradise_remap(paradise_t *paradise);
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void paradise_out(uint16_t addr, uint8_t val, void *p)
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{
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paradise_t *paradise = (paradise_t *)p;
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svga_t *svga = ¶dise->svga;
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uint8_t old;
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if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
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addr ^= 0x60;
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// output = 3;
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// pclog("Paradise out %04X %02X %04X:%04X\n", addr, val, CS, pc);
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switch (addr)
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{
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case 0x3c5:
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if (svga->seqaddr > 7)
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{
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if (paradise->type < WD90C11 || svga->seqregs[6] != 0x48)
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return;
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svga->seqregs[svga->seqaddr & 0x1f] = val;
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if (svga->seqaddr == 0x11)
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paradise_remap(paradise);
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return;
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}
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break;
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case 0x3cf:
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if (svga->gdcaddr >= 0x9 && svga->gdcaddr < 0xf)
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{
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if ((svga->gdcreg[0xf] & 7) != 5)
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return;
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}
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if (svga->gdcaddr == 6)
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{
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if ((svga->gdcreg[6] & 0xc) != (val & 0xc))
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{
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// pclog("Write mapping %02X\n", val);
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switch (val&0xC)
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{
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case 0x0: /*128k at A0000*/
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mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000);
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svga->banked_mask = 0xffff;
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break;
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case 0x4: /*64k at A0000*/
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mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
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svga->banked_mask = 0xffff;
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break;
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case 0x8: /*32k at B0000*/
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mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);
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svga->banked_mask = 0x7fff;
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break;
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case 0xC: /*32k at B8000*/
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mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000);
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svga->banked_mask = 0x7fff;
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break;
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}
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}
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svga->gdcreg[6] = val;
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paradise_remap(paradise);
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return;
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}
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if (svga->gdcaddr == 0x9 || svga->gdcaddr == 0xa)
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{
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svga->gdcreg[svga->gdcaddr] = val;
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paradise_remap(paradise);
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return;
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}
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if (svga->gdcaddr == 0xe)
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{
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svga->gdcreg[0xe] = val;
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paradise_remap(paradise);
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return;
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}
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break;
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case 0x3D4:
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if (paradise->type == PVGA1A)
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svga->crtcreg = val & 0x1f;
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else
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svga->crtcreg = val & 0x3f;
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return;
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case 0x3D5:
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if (svga->crtcreg <= 0x18)
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val &= mask_crtc[svga->crtcreg];
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if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80))
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return;
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if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80))
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val = (svga->crtc[7] & ~0x10) | (val & 0x10);
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if (svga->crtcreg > 0x29 && (svga->crtc[0x29] & 7) != 5)
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return;
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if (svga->crtcreg >= 0x31 && svga->crtcreg <= 0x37)
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return;
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old = svga->crtc[svga->crtcreg];
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svga->crtc[svga->crtcreg] = val;
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if (old != val)
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{
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if (svga->crtcreg < 0xe || svga->crtcreg > 0x10)
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{
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svga->fullchange = changeframecount;
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svga_recalctimings(¶dise->svga);
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}
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}
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break;
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}
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svga_out(addr, val, svga);
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}
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uint8_t paradise_in(uint16_t addr, void *p)
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{
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paradise_t *paradise = (paradise_t *)p;
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svga_t *svga = ¶dise->svga;
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if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
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addr ^= 0x60;
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// if (addr != 0x3da) pclog("Paradise in %04X\n", addr);
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switch (addr)
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{
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case 0x3c2:
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return 0x10;
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case 0x3c5:
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if (svga->seqaddr > 7)
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{
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if (paradise->type < WD90C11 || svga->seqregs[6] != 0x48)
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return 0xff;
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if (svga->seqaddr > 0x12)
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return 0xff;
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return svga->seqregs[svga->seqaddr & 0x1f];
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}
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break;
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case 0x3cf:
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if (svga->gdcaddr >= 0x9 && svga->gdcaddr < 0xf)
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{
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if (svga->gdcreg[0xf] & 0x10)
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return 0xff;
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switch (svga->gdcaddr)
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{
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case 0xf:
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return (svga->gdcreg[0xf] & 0x17) | 0x80;
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}
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}
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break;
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case 0x3D4:
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return svga->crtcreg;
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case 0x3D5:
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if (svga->crtcreg > 0x29 && svga->crtcreg < 0x30 && (svga->crtc[0x29] & 0x88) != 0x80)
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return 0xff;
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return svga->crtc[svga->crtcreg];
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}
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return svga_in(addr, svga);
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}
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void paradise_remap(paradise_t *paradise)
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{
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svga_t *svga = ¶dise->svga;
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if (svga->seqregs[0x11] & 0x80)
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{
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// pclog("Remap 1\n");
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paradise->read_bank[0] = paradise->read_bank[2] = (svga->gdcreg[0x9] & 0x7f) << 12;
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paradise->read_bank[1] = paradise->read_bank[3] = ((svga->gdcreg[0x9] & 0x7f) << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
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paradise->write_bank[0] = paradise->write_bank[2] = (svga->gdcreg[0xa] & 0x7f) << 12;
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paradise->write_bank[1] = paradise->write_bank[3] = ((svga->gdcreg[0xa] & 0x7f) << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
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}
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else if (svga->gdcreg[0xe] & 0x08)
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{
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if (svga->gdcreg[0x6] & 0xc)
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{
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// pclog("Remap 2\n");
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paradise->read_bank[0] = paradise->read_bank[2] = (svga->gdcreg[0xa] & 0x7f) << 12;
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paradise->write_bank[0] = paradise->write_bank[2] = (svga->gdcreg[0xa] & 0x7f) << 12;
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paradise->read_bank[1] = paradise->read_bank[3] = ((svga->gdcreg[0x9] & 0x7f) << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
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paradise->write_bank[1] = paradise->write_bank[3] = ((svga->gdcreg[0x9] & 0x7f) << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
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}
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else
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{
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// pclog("Remap 3\n");
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paradise->read_bank[0] = paradise->write_bank[0] = (svga->gdcreg[0xa] & 0x7f) << 12;
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paradise->read_bank[1] = paradise->write_bank[1] = ((svga->gdcreg[0xa] & 0x7f) << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
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paradise->read_bank[2] = paradise->write_bank[2] = (svga->gdcreg[0x9] & 0x7f) << 12;
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paradise->read_bank[3] = paradise->write_bank[3] = ((svga->gdcreg[0x9] & 0x7f) << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
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}
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}
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else
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{
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// pclog("Remap 4\n");
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paradise->read_bank[0] = paradise->read_bank[2] = (svga->gdcreg[0x9] & 0x7f) << 12;
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paradise->read_bank[1] = paradise->read_bank[3] = ((svga->gdcreg[0x9] & 0x7f) << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
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paradise->write_bank[0] = paradise->write_bank[2] = (svga->gdcreg[0x9] & 0x7f) << 12;
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paradise->write_bank[1] = paradise->write_bank[3] = ((svga->gdcreg[0x9] & 0x7f) << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
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}
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// pclog("Remap - %04X %04X\n", paradise->read_bank[0], paradise->write_bank[0]);
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}
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void paradise_recalctimings(svga_t *svga)
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{
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svga->lowres = !(svga->gdcreg[0xe] & 0x01);
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if (svga->bpp == 8 && !svga->lowres)
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svga->render = svga_render_8bpp_highres;
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}
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void paradise_write(uint32_t addr, uint8_t val, void *p)
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{
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paradise_t *paradise = (paradise_t *)p;
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// pclog("paradise_write : %05X %02X ", addr, val);
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addr = (addr & 0x7fff) + paradise->write_bank[(addr >> 15) & 3];
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// pclog("%08X\n", addr);
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/* Horrible hack, I know, but it's the only way to fix the 440FX BIOS filling the VRAM with garbage until Tom fixes the memory emulation. */
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if ((cs == 0xE0000) && (cpu_state.pc == 0xBF2F) && (romset == ROM_440FX)) return;
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if ((cs == 0xE0000) && (cpu_state.pc == 0xBF77) && (romset == ROM_440FX)) return;
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svga_write_linear(addr, val, ¶dise->svga);
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}
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uint8_t paradise_read(uint32_t addr, void *p)
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{
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paradise_t *paradise = (paradise_t *)p;
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// pclog("paradise_read : %05X ", addr);
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addr = (addr & 0x7fff) + paradise->read_bank[(addr >> 15) & 3];
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// pclog("%08X\n", addr);
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return svga_read_linear(addr, ¶dise->svga);
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}
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void *paradise_pvga1a_init()
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{
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paradise_t *paradise = malloc(sizeof(paradise_t));
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svga_t *svga = ¶dise->svga;
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memset(paradise, 0, sizeof(paradise_t));
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io_sethandler(0x03c0, 0x0020, paradise_in, NULL, NULL, paradise_out, NULL, NULL, paradise);
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svga_init(¶dise->svga, paradise, 1 << 18, /*256kb*/
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NULL,
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paradise_in, paradise_out,
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NULL,
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NULL);
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mem_mapping_set_handler(¶dise->svga.mapping, paradise_read, NULL, NULL, paradise_write, NULL, NULL);
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mem_mapping_set_p(¶dise->svga.mapping, paradise);
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svga->crtc[0x31] = 'W';
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svga->crtc[0x32] = 'D';
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svga->crtc[0x33] = '9';
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svga->crtc[0x34] = '0';
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svga->crtc[0x35] = 'C';
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svga->bpp = 8;
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svga->miscout = 1;
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svga->linear_base = 0;
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paradise->type = PVGA1A;
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return paradise;
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}
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void *paradise_wd90c11_init()
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{
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paradise_t *paradise = malloc(sizeof(paradise_t));
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svga_t *svga = ¶dise->svga;
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memset(paradise, 0, sizeof(paradise_t));
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io_sethandler(0x03c0, 0x0020, paradise_in, NULL, NULL, paradise_out, NULL, NULL, paradise);
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svga_init(¶dise->svga, paradise, 1 << 19, /*512kb*/
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paradise_recalctimings,
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paradise_in, paradise_out,
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NULL,
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NULL);
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mem_mapping_set_handler(¶dise->svga.mapping, paradise_read, NULL, NULL, paradise_write, NULL, NULL);
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mem_mapping_set_p(¶dise->svga.mapping, paradise);
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svga->crtc[0x31] = 'W';
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svga->crtc[0x32] = 'D';
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svga->crtc[0x33] = '9';
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svga->crtc[0x34] = '0';
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svga->crtc[0x35] = 'C';
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svga->crtc[0x36] = '1';
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svga->crtc[0x37] = '1';
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svga->bpp = 8;
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svga->miscout = 1;
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svga->linear_base = 0;
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paradise->type = WD90C11;
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return paradise;
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}
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static void *paradise_pvga1a_pc2086_init()
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{
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paradise_t *paradise = paradise_pvga1a_init();
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if (paradise)
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rom_init(¶dise->bios_rom, "roms/pc2086/40186.ic171", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
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return paradise;
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}
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static void *paradise_pvga1a_pc3086_init()
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{
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paradise_t *paradise = paradise_pvga1a_init();
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if (paradise)
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rom_init(¶dise->bios_rom, "roms/pc3086/c000.bin", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
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return paradise;
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}
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static void *paradise_wd90c11_megapc_init()
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{
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paradise_t *paradise = paradise_wd90c11_init();
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if (paradise)
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rom_init_interleaved(¶dise->bios_rom,
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"roms/megapc/41651-bios lo.u18",
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"roms/megapc/211253-bios hi.u19",
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0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
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return paradise;
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}
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static int paradise_wd90c11_standalone_available()
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{
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return rom_present("roms/megapc/41651-bios lo.u18") && rom_present("roms/megapc/211253-bios hi.u19");
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}
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/* static void *cpqvga_init()
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{
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paradise_t *paradise = paradise_pvga1a_init();
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if (paradise)
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rom_init(¶dise->bios_rom, "roms/1988-05-18.rom", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
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return paradise;
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}
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static int cpqvga_standalone_available()
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{
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return rom_present("roms/1988-05-18.rom");
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} */
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void paradise_close(void *p)
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{
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paradise_t *paradise = (paradise_t *)p;
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svga_close(¶dise->svga);
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free(paradise);
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}
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void paradise_speed_changed(void *p)
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{
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paradise_t *paradise = (paradise_t *)p;
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svga_recalctimings(¶dise->svga);
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}
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void paradise_force_redraw(void *p)
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{
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paradise_t *paradise = (paradise_t *)p;
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paradise->svga.fullchange = changeframecount;
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}
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void paradise_add_status_info(char *s, int max_len, void *p)
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{
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paradise_t *paradise = (paradise_t *)p;
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svga_add_status_info(s, max_len, ¶dise->svga);
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}
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device_t paradise_pvga1a_pc2086_device =
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{
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"Paradise PVGA1A (Amstrad PC2086)",
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0,
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paradise_pvga1a_pc2086_init,
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paradise_close,
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NULL,
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paradise_speed_changed,
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paradise_force_redraw,
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paradise_add_status_info
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};
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device_t paradise_pvga1a_pc3086_device =
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{
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"Paradise PVGA1A (Amstrad PC3086)",
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0,
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paradise_pvga1a_pc3086_init,
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paradise_close,
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NULL,
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paradise_speed_changed,
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paradise_force_redraw,
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paradise_add_status_info
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};
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device_t paradise_wd90c11_megapc_device =
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{
|
|
"Paradise WD90C11 (Amstrad MegaPC)",
|
|
0,
|
|
paradise_wd90c11_megapc_init,
|
|
paradise_close,
|
|
NULL,
|
|
paradise_speed_changed,
|
|
paradise_force_redraw,
|
|
paradise_add_status_info
|
|
};
|
|
device_t paradise_wd90c11_device =
|
|
{
|
|
"Paradise WD90C11",
|
|
0,
|
|
paradise_wd90c11_megapc_init,
|
|
paradise_close,
|
|
paradise_wd90c11_standalone_available,
|
|
paradise_speed_changed,
|
|
paradise_force_redraw,
|
|
paradise_add_status_info
|
|
};
|
|
/* device_t cpqvga_device =
|
|
{
|
|
"Compaq/Paradise VGA",
|
|
0,
|
|
cpqvga_init,
|
|
paradise_close,
|
|
cpqvga_standalone_available,
|
|
paradise_speed_changed,
|
|
paradise_force_redraw,
|
|
paradise_add_status_info
|
|
}; */
|