666 lines
18 KiB
C
666 lines
18 KiB
C
#define PUSH_W_OP(reg) \
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static int opPUSH_##reg(uint32_t fetchdat) \
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{ \
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PUSH_W(reg); \
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CLOCK_CYCLES((is486) ? 1 : 2); \
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PREFETCH_RUN(2, 1, -1, 0, 0, 1, 0, 0); \
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return cpu_state.abrt; \
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}
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#define PUSH_L_OP(reg) \
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static int opPUSH_##reg(uint32_t fetchdat) \
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{ \
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PUSH_L(reg); \
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CLOCK_CYCLES((is486) ? 1 : 2); \
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PREFETCH_RUN(2, 1, -1, 0, 0, 0, 1, 0); \
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return cpu_state.abrt; \
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}
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#define POP_W_OP(reg) \
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static int opPOP_##reg(uint32_t fetchdat) \
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{ \
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reg = POP_W(); \
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CLOCK_CYCLES((is486) ? 1 : 4); \
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PREFETCH_RUN(4, 1, -1, 1, 0, 0, 0, 0); \
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return cpu_state.abrt; \
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}
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#define POP_L_OP(reg) \
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static int opPOP_##reg(uint32_t fetchdat) \
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{ \
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reg = POP_L(); \
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CLOCK_CYCLES((is486) ? 1 : 4); \
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PREFETCH_RUN(4, 1, -1, 0, 1, 0, 0, 0); \
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return cpu_state.abrt; \
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}
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PUSH_W_OP(AX)
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PUSH_W_OP(BX)
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PUSH_W_OP(CX)
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PUSH_W_OP(DX)
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PUSH_W_OP(SI)
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PUSH_W_OP(DI)
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PUSH_W_OP(BP)
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PUSH_W_OP(SP)
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PUSH_L_OP(EAX)
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PUSH_L_OP(EBX)
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PUSH_L_OP(ECX)
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PUSH_L_OP(EDX)
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PUSH_L_OP(ESI)
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PUSH_L_OP(EDI)
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PUSH_L_OP(EBP)
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PUSH_L_OP(ESP)
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POP_W_OP(AX)
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POP_W_OP(BX)
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POP_W_OP(CX)
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POP_W_OP(DX)
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POP_W_OP(SI)
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POP_W_OP(DI)
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POP_W_OP(BP)
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POP_W_OP(SP)
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POP_L_OP(EAX)
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POP_L_OP(EBX)
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POP_L_OP(ECX)
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POP_L_OP(EDX)
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POP_L_OP(ESI)
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POP_L_OP(EDI)
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POP_L_OP(EBP)
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POP_L_OP(ESP)
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static int
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opPUSHA_w(uint32_t fetchdat)
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{
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if (stack32) {
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writememw(ss, ESP - 2, AX);
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writememw(ss, ESP - 4, CX);
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writememw(ss, ESP - 6, DX);
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writememw(ss, ESP - 8, BX);
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writememw(ss, ESP - 10, SP);
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writememw(ss, ESP - 12, BP);
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writememw(ss, ESP - 14, SI);
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writememw(ss, ESP - 16, DI);
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if (!cpu_state.abrt)
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ESP -= 16;
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} else {
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writememw(ss, ((SP - 2) & 0xFFFF), AX);
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writememw(ss, ((SP - 4) & 0xFFFF), CX);
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writememw(ss, ((SP - 6) & 0xFFFF), DX);
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writememw(ss, ((SP - 8) & 0xFFFF), BX);
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writememw(ss, ((SP - 10) & 0xFFFF), SP);
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writememw(ss, ((SP - 12) & 0xFFFF), BP);
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writememw(ss, ((SP - 14) & 0xFFFF), SI);
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writememw(ss, ((SP - 16) & 0xFFFF), DI);
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if (!cpu_state.abrt)
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SP -= 16;
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}
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CLOCK_CYCLES((is486) ? 11 : 18);
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PREFETCH_RUN(18, 1, -1, 0, 0, 8, 0, 0);
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return cpu_state.abrt;
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}
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static int
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opPUSHA_l(uint32_t fetchdat)
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{
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if (stack32) {
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writememl(ss, ESP - 4, EAX);
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writememl(ss, ESP - 8, ECX);
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writememl(ss, ESP - 12, EDX);
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writememl(ss, ESP - 16, EBX);
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writememl(ss, ESP - 20, ESP);
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writememl(ss, ESP - 24, EBP);
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writememl(ss, ESP - 28, ESI);
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writememl(ss, ESP - 32, EDI);
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if (!cpu_state.abrt)
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ESP -= 32;
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} else {
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writememl(ss, ((SP - 4) & 0xFFFF), EAX);
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writememl(ss, ((SP - 8) & 0xFFFF), ECX);
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writememl(ss, ((SP - 12) & 0xFFFF), EDX);
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writememl(ss, ((SP - 16) & 0xFFFF), EBX);
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writememl(ss, ((SP - 20) & 0xFFFF), ESP);
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writememl(ss, ((SP - 24) & 0xFFFF), EBP);
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writememl(ss, ((SP - 28) & 0xFFFF), ESI);
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writememl(ss, ((SP - 32) & 0xFFFF), EDI);
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if (!cpu_state.abrt)
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SP -= 32;
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}
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CLOCK_CYCLES((is486) ? 11 : 18);
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PREFETCH_RUN(18, 1, -1, 0, 0, 0, 8, 0);
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return cpu_state.abrt;
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}
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static int
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opPOPA_w(uint32_t fetchdat)
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{
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if (stack32) {
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DI = readmemw(ss, ESP);
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if (cpu_state.abrt)
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return 1;
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SI = readmemw(ss, ESP + 2);
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if (cpu_state.abrt)
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return 1;
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BP = readmemw(ss, ESP + 4);
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if (cpu_state.abrt)
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return 1;
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BX = readmemw(ss, ESP + 8);
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if (cpu_state.abrt)
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return 1;
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DX = readmemw(ss, ESP + 10);
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if (cpu_state.abrt)
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return 1;
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CX = readmemw(ss, ESP + 12);
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if (cpu_state.abrt)
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return 1;
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AX = readmemw(ss, ESP + 14);
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if (cpu_state.abrt)
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return 1;
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ESP += 16;
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} else {
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DI = readmemw(ss, ((SP) &0xFFFF));
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if (cpu_state.abrt)
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return 1;
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SI = readmemw(ss, ((SP + 2) & 0xFFFF));
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if (cpu_state.abrt)
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return 1;
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BP = readmemw(ss, ((SP + 4) & 0xFFFF));
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if (cpu_state.abrt)
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return 1;
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BX = readmemw(ss, ((SP + 8) & 0xFFFF));
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if (cpu_state.abrt)
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return 1;
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DX = readmemw(ss, ((SP + 10) & 0xFFFF));
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if (cpu_state.abrt)
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return 1;
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CX = readmemw(ss, ((SP + 12) & 0xFFFF));
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if (cpu_state.abrt)
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return 1;
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AX = readmemw(ss, ((SP + 14) & 0xFFFF));
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if (cpu_state.abrt)
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return 1;
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SP += 16;
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}
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CLOCK_CYCLES((is486) ? 9 : 24);
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PREFETCH_RUN(24, 1, -1, 7, 0, 0, 0, 0);
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return 0;
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}
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static int
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opPOPA_l(uint32_t fetchdat)
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{
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if (stack32) {
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EDI = readmeml(ss, ESP); if (cpu_state.abrt) return 1;
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ESI = readmeml(ss, ESP + 4); if (cpu_state.abrt) return 1;
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EBP = readmeml(ss, ESP + 8); if (cpu_state.abrt) return 1;
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EBX = readmeml(ss, ESP + 16); if (cpu_state.abrt) return 1;
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EDX = readmeml(ss, ESP + 20); if (cpu_state.abrt) return 1;
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ECX = readmeml(ss, ESP + 24); if (cpu_state.abrt) return 1;
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EAX = readmeml(ss, ESP + 28); if (cpu_state.abrt) return 1;
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ESP += 32;
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} else {
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EDI = readmeml(ss, ((SP) & 0xFFFF)); if (cpu_state.abrt) return 1;
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ESI = readmeml(ss, ((SP + 4) & 0xFFFF)); if (cpu_state.abrt) return 1;
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EBP = readmeml(ss, ((SP + 8) & 0xFFFF)); if (cpu_state.abrt) return 1;
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EBX = readmeml(ss, ((SP + 16) & 0xFFFF)); if (cpu_state.abrt) return 1;
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EDX = readmeml(ss, ((SP + 20) & 0xFFFF)); if (cpu_state.abrt) return 1;
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ECX = readmeml(ss, ((SP + 24) & 0xFFFF)); if (cpu_state.abrt) return 1;
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EAX = readmeml(ss, ((SP + 28) & 0xFFFF)); if (cpu_state.abrt) return 1;
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SP += 32;
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}
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CLOCK_CYCLES((is486) ? 9 : 24);
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PREFETCH_RUN(24, 1, -1, 0,7,0,0, 0);
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return 0;
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}
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static int
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opPUSH_imm_w(uint32_t fetchdat)
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{
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uint16_t val = getwordf();
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PUSH_W(val);
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CLOCK_CYCLES(2);
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PREFETCH_RUN(2, 3, -1, 0, 0, 1, 0, 0);
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return cpu_state.abrt;
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}
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static int
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opPUSH_imm_l(uint32_t fetchdat)
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{
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uint32_t val = getlong();
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if (cpu_state.abrt)
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return 1;
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PUSH_L(val);
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CLOCK_CYCLES(2);
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PREFETCH_RUN(2, 3, -1, 0, 0, 0, 1, 0);
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return cpu_state.abrt;
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}
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static int
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opPUSH_imm_bw(uint32_t fetchdat)
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{
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uint16_t tempw = getbytef();
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if (tempw & 0x80)
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tempw |= 0xFF00;
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PUSH_W(tempw);
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CLOCK_CYCLES(2);
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PREFETCH_RUN(2, 2, -1, 0, 0, 1, 0, 0);
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return cpu_state.abrt;
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}
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static int
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opPUSH_imm_bl(uint32_t fetchdat)
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{
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uint32_t templ = getbytef();
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if (templ & 0x80)
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templ |= 0xFFFFFF00;
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PUSH_L(templ);
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CLOCK_CYCLES(2);
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PREFETCH_RUN(2, 2, -1, 0, 0, 0, 1, 0);
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return cpu_state.abrt;
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}
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static int
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opPOPW_a16(uint32_t fetchdat)
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{
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uint16_t temp;
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temp = POP_W();
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if (cpu_state.abrt)
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return 1;
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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seteaw(temp);
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if (cpu_state.abrt) {
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if (stack32)
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ESP -= 2;
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else
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SP -= 2;
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}
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if (is486) {
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CLOCK_CYCLES((cpu_mod == 3) ? 1 : 6);
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} else {
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CLOCK_CYCLES((cpu_mod == 3) ? 4 : 5);
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}
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PREFETCH_RUN((cpu_mod == 3) ? 4 : 5, 2, rmdat, 1, 0, (cpu_mod == 3) ? 0 : 1, 0, 0);
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return cpu_state.abrt;
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}
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static int
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opPOPW_a32(uint32_t fetchdat)
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{
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uint16_t temp;
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temp = POP_W();
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if (cpu_state.abrt)
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return 1;
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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seteaw(temp);
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if (cpu_state.abrt) {
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if (stack32)
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ESP -= 2;
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else
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SP -= 2;
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}
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if (is486) {
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CLOCK_CYCLES((cpu_mod == 3) ? 1 : 6);
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} else {
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CLOCK_CYCLES((cpu_mod == 3) ? 4 : 5);
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}
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PREFETCH_RUN((cpu_mod == 3) ? 4 : 5, 2, rmdat, 1, 0, (cpu_mod == 3) ? 0 : 1, 0, 1);
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return cpu_state.abrt;
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}
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static int
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opPOPL_a16(uint32_t fetchdat)
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{
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uint32_t temp;
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temp = POP_L();
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if (cpu_state.abrt)
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return 1;
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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seteal(temp);
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if (cpu_state.abrt) {
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if (stack32)
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ESP -= 4;
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else
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SP -= 4;
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}
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if (is486) {
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CLOCK_CYCLES((cpu_mod == 3) ? 1 : 6);
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} else {
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CLOCK_CYCLES((cpu_mod == 3) ? 4 : 5);
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}
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PREFETCH_RUN((cpu_mod == 3) ? 4 : 5, 2, rmdat, 0, 1, 0, (cpu_mod == 3) ? 0 : 1, 0);
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return cpu_state.abrt;
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}
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static int
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opPOPL_a32(uint32_t fetchdat)
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{
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uint32_t temp;
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temp = POP_L();
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if (cpu_state.abrt)
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return 1;
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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seteal(temp);
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if (cpu_state.abrt) {
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if (stack32)
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ESP -= 4;
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else
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SP -= 4;
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}
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if (is486) {
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CLOCK_CYCLES((cpu_mod == 3) ? 1 : 6);
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} else {
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CLOCK_CYCLES((cpu_mod == 3) ? 4 : 5);
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}
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PREFETCH_RUN((cpu_mod == 3) ? 4 : 5, 2, rmdat, 0, 1, 0, (cpu_mod == 3) ? 0 : 1, 1);
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return cpu_state.abrt;
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}
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static int
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opENTER_w(uint32_t fetchdat)
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{
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uint16_t offset;
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int count;
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uint32_t tempEBP, tempESP, frame_ptr;
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#ifndef IS_DYNAREC
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int reads = 0, writes = 1, instr_cycles = 0;
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#endif
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uint16_t tempw;
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offset = getwordf();
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count = (fetchdat >> 16) & 0xff;
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cpu_state.pc++;
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tempEBP = EBP;
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tempESP = ESP;
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PUSH_W(BP);
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if (cpu_state.abrt)
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return 1;
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frame_ptr = ESP;
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if (count > 0) {
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while (--count) {
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BP -= 2;
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tempw = readmemw(ss, BP);
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if (cpu_state.abrt) {
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ESP = tempESP;
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EBP = tempEBP;
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return 1;
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}
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PUSH_W(tempw);
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if (cpu_state.abrt) {
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ESP = tempESP;
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EBP = tempEBP;
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return 1;
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}
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CLOCK_CYCLES((is486) ? 3 : 4);
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#ifndef IS_DYNAREC
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reads++;
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writes++;
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instr_cycles += (is486) ? 3 : 4;
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#endif
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}
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PUSH_W(frame_ptr);
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if (cpu_state.abrt) {
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ESP = tempESP;
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EBP = tempEBP;
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return 1;
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}
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CLOCK_CYCLES((is486) ? 3 : 5);
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#ifndef IS_DYNAREC
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writes++;
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instr_cycles += (is486) ? 3 : 5;
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#endif
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}
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BP = frame_ptr;
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if (stack32)
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ESP -= offset;
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else
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SP -= offset;
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CLOCK_CYCLES((is486) ? 14 : 10);
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#ifndef IS_DYNAREC
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instr_cycles += (is486) ? 14 : 10;
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PREFETCH_RUN(instr_cycles, 3, -1, reads, 0, writes, 0, 0);
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#endif
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return 0;
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}
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static int
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opENTER_l(uint32_t fetchdat)
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{
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uint16_t offset;
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int count;
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uint32_t tempEBP, tempESP, frame_ptr;
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#ifndef IS_DYNAREC
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int reads = 0, writes = 1, instr_cycles = 0;
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#endif
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uint32_t templ;
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offset = getwordf();
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count = (fetchdat >> 16) & 0xff;
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cpu_state.pc++;
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tempEBP = EBP;
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tempESP = ESP;
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PUSH_L(EBP);
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if (cpu_state.abrt)
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return 1;
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frame_ptr = ESP;
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if (count > 0) {
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while (--count) {
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EBP -= 4;
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templ = readmeml(ss, EBP);
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if (cpu_state.abrt) {
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ESP = tempESP;
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EBP = tempEBP;
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return 1;
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}
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PUSH_L(templ);
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if (cpu_state.abrt) {
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ESP = tempESP;
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EBP = tempEBP;
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return 1;
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}
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CLOCK_CYCLES((is486) ? 3 : 4);
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#ifndef IS_DYNAREC
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reads++;
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writes++;
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instr_cycles += (is486) ? 3 : 4;
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#endif
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}
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PUSH_L(frame_ptr);
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if (cpu_state.abrt) {
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ESP = tempESP;
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EBP = tempEBP;
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return 1;
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}
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CLOCK_CYCLES((is486) ? 3 : 5);
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#ifndef IS_DYNAREC
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writes++;
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instr_cycles += (is486) ? 3 : 5;
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#endif
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}
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EBP = frame_ptr;
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|
if (stack32)
|
|
ESP -= offset;
|
|
else
|
|
SP -= offset;
|
|
CLOCK_CYCLES((is486) ? 14 : 10);
|
|
#ifndef IS_DYNAREC
|
|
instr_cycles += (is486) ? 14 : 10;
|
|
PREFETCH_RUN(instr_cycles, 3, -1, reads, 0, writes, 0, 0);
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
opLEAVE_w(uint32_t fetchdat)
|
|
{
|
|
uint32_t tempESP = ESP;
|
|
uint16_t temp;
|
|
|
|
SP = BP;
|
|
temp = POP_W();
|
|
if (cpu_state.abrt) {
|
|
ESP = tempESP;
|
|
return 1;
|
|
}
|
|
BP = temp;
|
|
|
|
CLOCK_CYCLES(4);
|
|
PREFETCH_RUN(4, 1, -1, 1, 0, 0, 0, 0);
|
|
return 0;
|
|
}
|
|
static int
|
|
opLEAVE_l(uint32_t fetchdat)
|
|
{
|
|
uint32_t tempESP = ESP;
|
|
uint32_t temp;
|
|
|
|
ESP = EBP;
|
|
temp = POP_L();
|
|
if (cpu_state.abrt) {
|
|
ESP = tempESP;
|
|
return 1;
|
|
}
|
|
EBP = temp;
|
|
|
|
CLOCK_CYCLES(4);
|
|
PREFETCH_RUN(4, 1, -1, 0, 1, 0, 0, 0);
|
|
return 0;
|
|
}
|
|
|
|
#define PUSH_SEG_OPS(seg) \
|
|
static int opPUSH_##seg##_w(uint32_t fetchdat) \
|
|
{ \
|
|
PUSH_W(seg); \
|
|
CLOCK_CYCLES(2); \
|
|
PREFETCH_RUN(2, 1, -1, 0, 0, 1, 0, 0); \
|
|
return cpu_state.abrt; \
|
|
} \
|
|
static int opPUSH_##seg##_l(uint32_t fetchdat) \
|
|
{ \
|
|
PUSH_L(seg); \
|
|
CLOCK_CYCLES(2); \
|
|
PREFETCH_RUN(2, 1, -1, 0, 0, 0, 1, 0); \
|
|
return cpu_state.abrt; \
|
|
}
|
|
|
|
#define POP_SEG_OPS(seg, realseg) \
|
|
static int opPOP_##seg##_w(uint32_t fetchdat) \
|
|
{ \
|
|
uint16_t temp_seg; \
|
|
uint32_t temp_esp = ESP; \
|
|
temp_seg = POP_W(); \
|
|
if (cpu_state.abrt) \
|
|
return 1; \
|
|
loadseg(temp_seg, realseg); \
|
|
if (cpu_state.abrt) \
|
|
ESP = temp_esp; \
|
|
CLOCK_CYCLES(is486 ? 3 : 7); \
|
|
PREFETCH_RUN(is486 ? 3 : 7, 1, -1, 0, 0, 1, 0, 0); \
|
|
return cpu_state.abrt; \
|
|
} \
|
|
static int opPOP_##seg##_l(uint32_t fetchdat) \
|
|
{ \
|
|
uint32_t temp_seg; \
|
|
uint32_t temp_esp = ESP; \
|
|
temp_seg = POP_L(); \
|
|
if (cpu_state.abrt) \
|
|
return 1; \
|
|
loadseg(temp_seg & 0xffff, realseg); \
|
|
if (cpu_state.abrt) \
|
|
ESP = temp_esp; \
|
|
CLOCK_CYCLES(is486 ? 3 : 7); \
|
|
PREFETCH_RUN(is486 ? 3 : 7, 1, -1, 0, 0, 1, 0, 0); \
|
|
return cpu_state.abrt; \
|
|
}
|
|
|
|
PUSH_SEG_OPS(CS)
|
|
PUSH_SEG_OPS(DS)
|
|
PUSH_SEG_OPS(ES)
|
|
PUSH_SEG_OPS(FS)
|
|
PUSH_SEG_OPS(GS)
|
|
PUSH_SEG_OPS(SS)
|
|
POP_SEG_OPS(DS, &cpu_state.seg_ds)
|
|
POP_SEG_OPS(ES, &cpu_state.seg_es)
|
|
POP_SEG_OPS(FS, &cpu_state.seg_fs)
|
|
POP_SEG_OPS(GS, &cpu_state.seg_gs)
|
|
|
|
static int
|
|
opPOP_SS_w(uint32_t fetchdat)
|
|
{
|
|
uint16_t temp_seg;
|
|
uint32_t temp_esp = ESP;
|
|
temp_seg = POP_W();
|
|
if (cpu_state.abrt)
|
|
return 1;
|
|
loadseg(temp_seg, &cpu_state.seg_ss);
|
|
if (cpu_state.abrt) {
|
|
ESP = temp_esp;
|
|
return 1;
|
|
}
|
|
CLOCK_CYCLES(is486 ? 3 : 7);
|
|
PREFETCH_RUN(is486 ? 3 : 7, 1, -1, 0, 0, 1, 0, 0);
|
|
|
|
cpu_state.oldpc = cpu_state.pc;
|
|
cpu_state.op32 = use32;
|
|
cpu_state.ssegs = 0;
|
|
cpu_state.ea_seg = &cpu_state.seg_ds;
|
|
fetchdat = fastreadl(cs + cpu_state.pc);
|
|
cpu_state.pc++;
|
|
if (cpu_state.abrt)
|
|
return 1;
|
|
x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8);
|
|
|
|
return 1;
|
|
}
|
|
static int
|
|
opPOP_SS_l(uint32_t fetchdat)
|
|
{
|
|
uint32_t temp_seg;
|
|
uint32_t temp_esp = ESP;
|
|
temp_seg = POP_L();
|
|
if (cpu_state.abrt)
|
|
return 1;
|
|
loadseg(temp_seg & 0xffff, &cpu_state.seg_ss);
|
|
if (cpu_state.abrt) {
|
|
ESP = temp_esp;
|
|
return 1;
|
|
}
|
|
CLOCK_CYCLES(is486 ? 3 : 7);
|
|
PREFETCH_RUN(is486 ? 3 : 7, 1, -1, 0, 0, 1, 0, 0);
|
|
|
|
cpu_state.oldpc = cpu_state.pc;
|
|
cpu_state.op32 = use32;
|
|
cpu_state.ssegs = 0;
|
|
cpu_state.ea_seg = &cpu_state.seg_ds;
|
|
fetchdat = fastreadl(cs + cpu_state.pc);
|
|
cpu_state.pc++;
|
|
if (cpu_state.abrt)
|
|
return 1;
|
|
x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8);
|
|
|
|
return 1;
|
|
}
|