602 lines
18 KiB
C
602 lines
18 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* x87 FPU instructions core.
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*
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*
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*
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* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
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* Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2008-2019 Sarah Walker.
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* Copyright 2016-2019 Miran Grca.
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*/
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static int
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opFILDiw_a16(uint32_t fetchdat)
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{
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int16_t temp;
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteaw();
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if (cpu_state.abrt)
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return 1;
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x87_push((double) temp);
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_16) : (x87_timings.fild_16 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_16) : (x87_concurrency.fild_16 * cpu_multi));
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return 0;
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}
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#ifndef FPU_8087
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static int
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opFILDiw_a32(uint32_t fetchdat)
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{
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int16_t temp;
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteaw();
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if (cpu_state.abrt)
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return 1;
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x87_push((double) temp);
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_16) : (x87_timings.fild_16 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_16) : (x87_concurrency.fild_16 * cpu_multi));
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return 0;
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}
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#endif
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static int
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opFISTiw_a16(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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seteaw(x87_fround16(ST(0)));
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_16) : (x87_concurrency.fist_16 * cpu_multi));
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return cpu_state.abrt;
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}
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#ifndef FPU_8087
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static int
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opFISTiw_a32(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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seteaw(x87_fround16(ST(0)));
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_16) : (x87_concurrency.fist_16 * cpu_multi));
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return cpu_state.abrt;
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}
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#endif
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static int
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opFISTPiw_a16(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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seteaw(x87_fround16(ST(0)));
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if (cpu_state.abrt)
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return 1;
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x87_pop();
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_16) : (x87_concurrency.fist_16 * cpu_multi));
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return 0;
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}
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#ifndef FPU_8087
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static int
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opFISTPiw_a32(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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seteaw(x87_fround16(ST(0)));
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if (cpu_state.abrt)
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return 1;
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x87_pop();
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_16) : (x87_timings.fist_16 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_16) : (x87_concurrency.fist_16 * cpu_multi));
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return 0;
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}
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#endif
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static int
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opFILDiq_a16(uint32_t fetchdat)
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{
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int64_t temp64;
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp64 = geteaq();
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if (cpu_state.abrt)
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return 1;
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x87_push((double) temp64);
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cpu_state.MM[cpu_state.TOP & 7].q = temp64;
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FP_TAG_DEFAULT;
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_64) : (x87_timings.fild_64 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_64) : (x87_concurrency.fild_64 * cpu_multi));
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return 0;
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}
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#ifndef FPU_8087
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static int
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opFILDiq_a32(uint32_t fetchdat)
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{
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int64_t temp64;
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp64 = geteaq();
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if (cpu_state.abrt)
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return 1;
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x87_push((double) temp64);
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cpu_state.MM[cpu_state.TOP & 7].q = temp64;
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FP_TAG_DEFAULT;
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_64) : (x87_timings.fild_64 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_64) : (x87_concurrency.fild_64 * cpu_multi));
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return 0;
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}
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#endif
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static int
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FBSTP_a16(uint32_t fetchdat)
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{
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double dt;
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double tempd;
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int c;
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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tempd = ST(0);
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if (tempd < 0.0)
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tempd = -tempd;
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for (c = 0; c < 9; c++) {
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dt = floor(fmod(tempd, 10.0));
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uint8_t tempc = (uint8_t) dt;
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tempd -= floor(fmod(tempd, 10.0));
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tempd /= 10.0;
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dt = floor(fmod(tempd, 10.0));
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tempc |= ((uint8_t) dt) << 4;
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tempd -= floor(fmod(tempd, 10.0));
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tempd /= 10.0;
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writememb(easeg, cpu_state.eaaddr + c, tempc);
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}
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dt = floor(fmod(tempd, 10.0));
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tempc = (uint8_t) dt;
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if (ST(0) < 0.0)
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tempc |= 0x80;
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writememb(easeg, cpu_state.eaaddr + 9, tempc);
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if (cpu_state.abrt)
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return 1;
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x87_pop();
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fbstp) : (x87_timings.fbstp * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fbstp) : (x87_concurrency.fbstp * cpu_multi));
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return 0;
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}
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#ifndef FPU_8087
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static int
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FBSTP_a32(uint32_t fetchdat)
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{
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double tempd;
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int c;
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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tempd = ST(0);
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if (tempd < 0.0)
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tempd = -tempd;
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for (c = 0; c < 9; c++) {
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uint8_t tempc = (uint8_t) floor(fmod(tempd, 10.0));
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tempd -= floor(fmod(tempd, 10.0));
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tempd /= 10.0;
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tempc |= ((uint8_t) floor(fmod(tempd, 10.0))) << 4;
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tempd -= floor(fmod(tempd, 10.0));
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tempd /= 10.0;
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writememb(easeg, cpu_state.eaaddr + c, tempc);
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}
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tempc = (uint8_t) floor(fmod(tempd, 10.0));
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if (ST(0) < 0.0)
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tempc |= 0x80;
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writememb(easeg, cpu_state.eaaddr + 9, tempc);
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if (cpu_state.abrt)
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return 1;
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x87_pop();
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fbstp) : (x87_timings.fbstp * cpu_multi));
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return 0;
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}
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#endif
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static int
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FISTPiq_a16(uint32_t fetchdat)
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{
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int64_t temp64;
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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if (cpu_state.tag[cpu_state.TOP & 7] & TAG_UINT64)
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temp64 = cpu_state.MM[cpu_state.TOP & 7].q;
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else
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temp64 = x87_fround(ST(0));
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seteaq(temp64);
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if (cpu_state.abrt)
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return 1;
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x87_pop();
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_64) : (x87_timings.fist_64 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_64) : (x87_concurrency.fist_64 * cpu_multi));
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return 0;
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}
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#ifndef FPU_8087
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static int
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FISTPiq_a32(uint32_t fetchdat)
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{
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int64_t temp64;
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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if (cpu_state.tag[cpu_state.TOP & 7] & TAG_UINT64)
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temp64 = cpu_state.MM[cpu_state.TOP & 7].q;
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else
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temp64 = x87_fround(ST(0));
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seteaq(temp64);
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if (cpu_state.abrt)
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return 1;
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x87_pop();
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_64) : (x87_timings.fist_64 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_64) : (x87_concurrency.fist_64 * cpu_multi));
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return 0;
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}
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#endif
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static int
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opFILDil_a16(uint32_t fetchdat)
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{
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int32_t templ;
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_READ(cpu_state.ea_seg);
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templ = geteal();
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if (cpu_state.abrt)
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return 1;
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x87_push((double) templ);
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_32) : (x87_timings.fild_32 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_32) : (x87_concurrency.fild_32 * cpu_multi));
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return 0;
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}
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#ifndef FPU_8087
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static int
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opFILDil_a32(uint32_t fetchdat)
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{
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int32_t templ;
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_READ(cpu_state.ea_seg);
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templ = geteal();
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if (cpu_state.abrt)
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return 1;
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x87_push((double) templ);
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fild_32) : (x87_timings.fild_32 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fild_32) : (x87_concurrency.fild_32 * cpu_multi));
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return 0;
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}
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#endif
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static int
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opFISTil_a16(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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seteal(x87_fround32(ST(0)));
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_32) : (x87_concurrency.fist_32 * cpu_multi));
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return cpu_state.abrt;
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}
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#ifndef FPU_8087
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static int
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opFISTil_a32(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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seteal(x87_fround32(ST(0)));
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_32) : (x87_concurrency.fist_32 * cpu_multi));
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return cpu_state.abrt;
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}
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#endif
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static int
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opFISTPil_a16(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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seteal(x87_fround32(ST(0)));
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if (cpu_state.abrt)
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return 1;
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x87_pop();
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_32) : (x87_concurrency.fist_32 * cpu_multi));
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return 0;
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}
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#ifndef FPU_8087
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static int
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opFISTPil_a32(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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seteal(x87_fround32(ST(0)));
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if (cpu_state.abrt)
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return 1;
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x87_pop();
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fist_32) : (x87_timings.fist_32 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fist_32) : (x87_concurrency.fist_32 * cpu_multi));
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return 0;
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}
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#endif
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static int
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opFLDe_a16(uint32_t fetchdat)
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{
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double t;
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_READ(cpu_state.ea_seg);
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t = x87_ld80();
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if (cpu_state.abrt)
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return 1;
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x87_push(t);
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_80) : (x87_concurrency.fld_80 * cpu_multi));
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return 0;
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}
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#ifndef FPU_8087
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static int
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opFLDe_a32(uint32_t fetchdat)
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{
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double t;
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_READ(cpu_state.ea_seg);
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t = x87_ld80();
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if (cpu_state.abrt)
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return 1;
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x87_push(t);
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_80) : (x87_concurrency.fld_80 * cpu_multi));
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return 0;
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}
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#endif
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static int
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opFSTPe_a16(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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x87_st80(ST(0));
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if (cpu_state.abrt)
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return 1;
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x87_pop();
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_80) : (x87_concurrency.fld_80 * cpu_multi));
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return 0;
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}
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#ifndef FPU_8087
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static int
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opFSTPe_a32(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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x87_st80(ST(0));
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if (cpu_state.abrt)
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return 1;
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x87_pop();
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CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_80) : (x87_timings.fld_80 * cpu_multi));
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CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_80) : (x87_concurrency.fld_80 * cpu_multi));
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return 0;
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}
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#endif
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static int
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opFLDd_a16(uint32_t fetchdat)
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{
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x87_td t;
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_READ(cpu_state.ea_seg);
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t.i = geteaq();
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if (cpu_state.abrt)
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return 1;
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x87_push(t.d);
|
|
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_64) : (x87_timings.fld_64 * cpu_multi));
|
|
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_64) : (x87_concurrency.fld_64 * cpu_multi));
|
|
return 0;
|
|
}
|
|
#ifndef FPU_8087
|
|
static int
|
|
opFLDd_a32(uint32_t fetchdat)
|
|
{
|
|
x87_td t;
|
|
FP_ENTER();
|
|
fetch_ea_32(fetchdat);
|
|
SEG_CHECK_READ(cpu_state.ea_seg);
|
|
t.i = geteaq();
|
|
if (cpu_state.abrt)
|
|
return 1;
|
|
x87_push(t.d);
|
|
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fld_64) : (x87_timings.fld_64 * cpu_multi));
|
|
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fld_64) : (x87_concurrency.fld_64 * cpu_multi));
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static int
|
|
opFSTd_a16(uint32_t fetchdat)
|
|
{
|
|
x87_td t;
|
|
FP_ENTER();
|
|
fetch_ea_16(fetchdat);
|
|
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
|
t.d = ST(0);
|
|
seteaq(t.i);
|
|
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
|
|
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_64) : (x87_concurrency.fst_64 * cpu_multi));
|
|
return cpu_state.abrt;
|
|
}
|
|
#ifndef FPU_8087
|
|
static int
|
|
opFSTd_a32(uint32_t fetchdat)
|
|
{
|
|
x87_td t;
|
|
FP_ENTER();
|
|
fetch_ea_32(fetchdat);
|
|
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
|
t.d = ST(0);
|
|
seteaq(t.i);
|
|
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
|
|
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_64) : (x87_concurrency.fst_64 * cpu_multi));
|
|
return cpu_state.abrt;
|
|
}
|
|
#endif
|
|
|
|
static int
|
|
opFSTPd_a16(uint32_t fetchdat)
|
|
{
|
|
x87_td t;
|
|
FP_ENTER();
|
|
fetch_ea_16(fetchdat);
|
|
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
|
t.d = ST(0);
|
|
seteaq(t.i);
|
|
if (cpu_state.abrt)
|
|
return 1;
|
|
x87_pop();
|
|
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
|
|
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_64) : (x87_concurrency.fst_64 * cpu_multi));
|
|
return 0;
|
|
}
|
|
#ifndef FPU_8087
|
|
static int
|
|
opFSTPd_a32(uint32_t fetchdat)
|
|
{
|
|
x87_td t;
|
|
FP_ENTER();
|
|
fetch_ea_32(fetchdat);
|
|
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
|
t.d = ST(0);
|
|
seteaq(t.i);
|
|
if (cpu_state.abrt)
|
|
return 1;
|
|
x87_pop();
|
|
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_64) : (x87_timings.fst_64 * cpu_multi));
|
|
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_64) : (x87_concurrency.fst_64 * cpu_multi));
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static int
|
|
opFLDs_a16(uint32_t fetchdat)
|
|
{
|
|
x87_ts ts;
|
|
FP_ENTER();
|
|
fetch_ea_16(fetchdat);
|
|
SEG_CHECK_READ(cpu_state.ea_seg);
|
|
ts.i = geteal();
|
|
if (cpu_state.abrt)
|
|
return 1;
|
|
x87_push((double) ts.s);
|
|
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
|
|
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
|
|
return 0;
|
|
}
|
|
#ifndef FPU_8087
|
|
static int
|
|
opFLDs_a32(uint32_t fetchdat)
|
|
{
|
|
x87_ts ts;
|
|
FP_ENTER();
|
|
fetch_ea_32(fetchdat);
|
|
SEG_CHECK_READ(cpu_state.ea_seg);
|
|
ts.i = geteal();
|
|
if (cpu_state.abrt)
|
|
return 1;
|
|
x87_push((double) ts.s);
|
|
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
|
|
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static int
|
|
opFSTs_a16(uint32_t fetchdat)
|
|
{
|
|
x87_ts ts;
|
|
FP_ENTER();
|
|
fetch_ea_16(fetchdat);
|
|
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
|
ts.s = (float) ST(0);
|
|
seteal(ts.i);
|
|
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
|
|
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
|
|
return cpu_state.abrt;
|
|
}
|
|
#ifndef FPU_8087
|
|
static int
|
|
opFSTs_a32(uint32_t fetchdat)
|
|
{
|
|
x87_ts ts;
|
|
FP_ENTER();
|
|
fetch_ea_32(fetchdat);
|
|
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
|
ts.s = (float) ST(0);
|
|
seteal(ts.i);
|
|
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
|
|
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
|
|
return cpu_state.abrt;
|
|
}
|
|
#endif
|
|
|
|
static int
|
|
opFSTPs_a16(uint32_t fetchdat)
|
|
{
|
|
x87_ts ts;
|
|
FP_ENTER();
|
|
fetch_ea_16(fetchdat);
|
|
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
|
ts.s = (float) ST(0);
|
|
seteal(ts.i);
|
|
if (cpu_state.abrt)
|
|
return 1;
|
|
x87_pop();
|
|
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
|
|
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
|
|
return 0;
|
|
}
|
|
#ifndef FPU_8087
|
|
static int
|
|
opFSTPs_a32(uint32_t fetchdat)
|
|
{
|
|
x87_ts ts;
|
|
FP_ENTER();
|
|
fetch_ea_32(fetchdat);
|
|
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
|
ts.s = (float) ST(0);
|
|
seteal(ts.i);
|
|
if (cpu_state.abrt)
|
|
return 1;
|
|
x87_pop();
|
|
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.fst_32) : (x87_timings.fst_32 * cpu_multi));
|
|
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.fst_32) : (x87_concurrency.fst_32 * cpu_multi));
|
|
return 0;
|
|
}
|
|
#endif
|