934 lines
27 KiB
C
934 lines
27 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of an SST flash chip.
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*
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*
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*
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* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
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* Miran Grca, <mgrca8@gmail.com>
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* Melissa Goad, <mszoopers@protonmail.com>
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* Jasmine Iwanek, <jriwanek@gmail.com>
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*
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* Copyright 2008-2020 Sarah Walker.
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* Copyright 2016-2020 Miran Grca.
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* Copyright 2020 Melissa Goad.
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* Copyright 2022-2023 Jasmine Iwanek.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <stdlib.h>
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#include <wchar.h>
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/mem.h>
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#include <86box/machine.h>
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#include <86box/timer.h>
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#include <86box/nvr.h>
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#include <86box/plat.h>
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#include <86box/m_xt_xi8088.h>
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typedef struct sst_t {
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uint8_t manufacturer, id, has_bbp, is_39,
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page_bytes, sdp, bbp_first_8k, bbp_last_8k;
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int command_state, id_mode,
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dirty;
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uint32_t size, mask,
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page_mask, page_base,
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last_addr;
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uint8_t page_buffer[128],
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page_dirty[128];
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uint8_t *array;
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mem_mapping_t mapping[8], mapping_h[8];
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pc_timer_t page_write_timer;
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} sst_t;
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static char flash_path[1024];
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#define SST_CHIP_ERASE 0x10 /* Both 29 and 39, 6th cycle */
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#define SST_SDP_DISABLE 0x20 /* Only 29, Software data protect disable and write - treat as write */
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#define SST_SECTOR_ERASE 0x30 /* Only 39, 6th cycle */
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#define W_BOOT_BLOCK_PROT 0x40 /* Only W29C020 */
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#define SST_SET_ID_MODE_ALT 0x60 /* Only 29, 6th cycle */
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#define SST_ERASE 0x80 /* Both 29 and 39 */
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/* With data 60h on 6th cycle, it's alt. ID */
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#define SST_SET_ID_MODE 0x90 /* Both 29 and 39 */
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#define SST_BYTE_PROGRAM 0xa0 /* Both 29 and 39 */
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#define SST_CLEAR_ID_MODE 0xf0 /* Both 29 and 39 */
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/* 1st cycle variant only on 39 */
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#define SST 0xbf /* SST Manufacturer's ID */
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#define SST29EE512 0x5d00
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#define SST29LE_VE512 0x3d00
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#define SST29EE010 0x0700
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#define SST29LE_VE010 0x0800
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#define SST29EE020 0x1000
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#define SST29LE_VE020 0x1200
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#define SST39SF512 0xb400
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#define SST39SF010 0xb500
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#define SST39SF020 0xb600
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#define SST39SF040 0xb700
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#define SST39LF512 0xd400
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#define SST39LF010 0xd500
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#define SST39LF020 0xd600
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#define SST39LF040 0xd700
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#define SST39LF080 0xd800
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#define SST39LF016 0xd900
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/*
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// 16 wide
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#define SST39WF400 0x272f
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#define SST39WF400B 0x272e
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#define SST39WF800 0x273f
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#define SST39WF800B 0x273e
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#define SST39WF1601 0xbf274b
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#define SST39WF1602 0xbf274a
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#define SST39LF100 0x2788
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#define SST39LF200 0x2789
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#define SST39LF400 0x2780
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#define SST39LF800 0x2781
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#define SST39LF160 0x2782
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*/
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#define SST49LF002 0x5700
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#define SST49LF020 0x6100
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#define SST49LF020A 0x5200
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#define SST49LF003 0x1b00
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#define SST49LF004 0x6000
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#define SST49LF004C 0x5400
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#define SST49LF040 0x5100
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#define SST49LF008 0x5a00
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#define SST49LF008C 0x5900
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#define SST49LF080 0x5b00
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#define SST49LF030 0x1c00
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#define SST49LF160 0x4c00
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#define SST49LF016 0x5c00
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#define WINBOND 0xda /* Winbond Manufacturer's ID */
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#define W29C512 0xc800
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#define W29C010 0xc100
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#define W29C020 0x4500
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#define W29C040 0x4600
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#define SIZE_512K 0x010000
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#define SIZE_1M 0x020000
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#define SIZE_2M 0x040000
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#define SIZE_3M 0x060000
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#define SIZE_4M 0x080000
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#define SIZE_8M 0x100000
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#define SIZE_16M 0x200000
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static void
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sst_sector_erase(sst_t *dev, uint32_t addr)
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{
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uint32_t base = addr & (dev->mask & ~0xfff);
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if ((base < 0x2000) && (dev->bbp_first_8k & 0x01))
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return;
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else if ((base >= (dev->size - 0x2000)) && (dev->bbp_last_8k & 0x01))
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return;
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memset(&dev->array[base], 0xff, 4096);
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dev->dirty = 1;
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}
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static void
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sst_new_command(sst_t *dev, uint32_t addr, uint8_t val)
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{
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uint32_t base = 0x00000, size = dev->size;
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if (dev->command_state == 5)
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switch (val) {
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case SST_CHIP_ERASE:
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if (dev->bbp_first_8k & 0x01) {
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base += 0x2000;
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size -= 0x2000;
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}
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if (dev->bbp_last_8k & 0x01)
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size -= 0x2000;
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memset(&(dev->array[base]), 0xff, size);
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dev->command_state = 0;
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break;
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case SST_SDP_DISABLE:
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if (!dev->is_39)
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dev->sdp = 0;
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dev->command_state = 0;
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break;
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case SST_SECTOR_ERASE:
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if (dev->is_39)
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sst_sector_erase(dev, addr);
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dev->command_state = 0;
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break;
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case SST_SET_ID_MODE_ALT:
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dev->id_mode = 1;
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dev->command_state = 0;
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break;
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default:
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dev->command_state = 0;
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break;
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}
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else
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switch (val) {
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case SST_ERASE:
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dev->command_state = 3;
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break;
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case SST_SET_ID_MODE:
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dev->id_mode = 1;
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dev->command_state = 0;
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break;
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case SST_BYTE_PROGRAM:
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if (!dev->is_39) {
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dev->sdp = 1;
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memset(dev->page_buffer, 0xff, 128);
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memset(dev->page_dirty, 0x00, 128);
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dev->page_bytes = 0;
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dev->last_addr = 0xffffffff;
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timer_on_auto(&dev->page_write_timer, 210.0);
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}
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dev->command_state = 6;
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break;
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case W_BOOT_BLOCK_PROT:
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dev->command_state = dev->has_bbp ? 8 : 0;
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break;
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case SST_CLEAR_ID_MODE:
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dev->id_mode = 0;
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dev->command_state = 0;
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break;
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default:
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dev->command_state = 0;
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break;
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}
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}
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static void
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sst_page_write(void *priv)
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{
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sst_t *dev = (sst_t *) priv;
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int i;
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if (dev->last_addr != 0xffffffff) {
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dev->page_base = dev->last_addr & dev->page_mask;
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for (i = 0; i < 128; i++) {
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if (dev->page_dirty[i]) {
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if (((dev->page_base + i) < 0x2000) && (dev->bbp_first_8k & 0x01))
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continue;
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else if (((dev->page_base + i) >= (dev->size - 0x2000)) && (dev->bbp_last_8k & 0x01))
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continue;
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dev->array[dev->page_base + i] = dev->page_buffer[i];
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dev->dirty |= 1;
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}
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}
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}
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dev->page_bytes = 0;
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dev->command_state = 0;
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timer_disable(&dev->page_write_timer);
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}
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static uint8_t
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sst_read_id(uint32_t addr, void *p)
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{
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sst_t *dev = (sst_t *) p;
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uint8_t ret = 0x00;
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if ((addr & 0xffff) == 0)
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ret = dev->manufacturer;
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else if ((addr & 0xffff) == 1)
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ret = dev->id;
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#ifdef UNKNOWN_FLASH
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else if ((addr & 0xffff) == 0x100)
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ret = 0x1c;
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else if ((addr & 0xffff) == 0x101)
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ret = 0x92;
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#endif
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else if (dev->has_bbp) {
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if (addr == 0x00002)
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ret = dev->bbp_first_8k;
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else if (addr == 0x3fff2)
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ret = dev->bbp_last_8k;
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}
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return ret;
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}
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static void
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sst_buf_write(sst_t *dev, uint32_t addr, uint8_t val)
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{
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dev->page_buffer[addr & 0x0000007f] = val;
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dev->page_dirty[addr & 0x0000007f] = 1;
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dev->page_bytes++;
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dev->last_addr = addr;
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if (dev->page_bytes >= 128) {
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sst_page_write(dev);
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} else
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timer_on_auto(&dev->page_write_timer, 210.0);
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}
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static void
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sst_write(uint32_t addr, uint8_t val, void *p)
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{
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sst_t *dev = (sst_t *) p;
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switch (dev->command_state) {
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case 0:
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case 3:
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/* 1st and 4th Bus Write Cycle */
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if ((val == 0xf0) && dev->is_39 && (dev->command_state == 0)) {
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if (dev->id_mode)
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dev->id_mode = 0;
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dev->command_state = 0;
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} else if (((addr & 0x7fff) == 0x5555) && (val == 0xaa))
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dev->command_state++;
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else {
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if (!dev->is_39 && !dev->sdp && (dev->command_state == 0)) {
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/* 29 series, software data protection off, start loading the page. */
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memset(dev->page_buffer, 0xff, 128);
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memset(dev->page_dirty, 0x00, 128);
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dev->page_bytes = 0;
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dev->command_state = 7;
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sst_buf_write(dev, addr, val);
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} else
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dev->command_state = 0;
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}
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break;
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case 1:
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case 4:
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/* 2nd and 5th Bus Write Cycle */
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if (((addr & 0x7fff) == 0x2aaa) && (val == 0x55))
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dev->command_state++;
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else
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dev->command_state = 0;
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break;
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case 2:
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case 5:
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/* 3rd and 6th Bus Write Cycle */
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if ((dev->command_state == 5) && (val == SST_SECTOR_ERASE)) {
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/* Sector erase - can be on any address. */
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sst_new_command(dev, addr, val);
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} else if ((addr & 0x7fff) == 0x5555)
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sst_new_command(dev, addr, val);
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else
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dev->command_state = 0;
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break;
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case 6:
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/* Page Load Cycle (29) / Data Write Cycle (39SF) */
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if (dev->is_39) {
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dev->command_state = 0;
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dev->array[addr & dev->mask] = val;
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dev->dirty = 1;
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} else {
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dev->command_state++;
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sst_buf_write(dev, addr, val);
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}
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break;
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case 7:
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if (!dev->is_39)
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sst_buf_write(dev, addr, val);
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break;
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case 8:
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if ((addr == 0x00000) && (val == 0x00))
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dev->bbp_first_8k = 0xff;
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else if ((addr == 0x3ffff) && (val == 0xff))
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dev->bbp_last_8k = 0xff;
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dev->command_state = 0;
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break;
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}
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}
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static uint8_t
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sst_read(uint32_t addr, void *p)
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{
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sst_t *dev = (sst_t *) p;
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uint8_t ret = 0xff;
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addr &= 0x000fffff;
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if (dev->id_mode)
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ret = sst_read_id(addr, p);
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else {
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if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
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ret = dev->array[addr - biosaddr];
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}
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return ret;
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}
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static uint16_t
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sst_readw(uint32_t addr, void *p)
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{
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sst_t *dev = (sst_t *) p;
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uint16_t ret = 0xffff;
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addr &= 0x000fffff;
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if (dev->id_mode)
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ret = sst_read(addr, p) | (sst_read(addr + 1, p) << 8);
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else {
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if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
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ret = *(uint16_t *) &dev->array[addr - biosaddr];
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}
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return ret;
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}
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static uint32_t
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sst_readl(uint32_t addr, void *p)
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{
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sst_t *dev = (sst_t *) p;
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uint32_t ret = 0xffffffff;
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addr &= 0x000fffff;
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if (dev->id_mode)
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ret = sst_readw(addr, p) | (sst_readw(addr + 2, p) << 16);
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else {
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if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
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ret = *(uint32_t *) &dev->array[addr - biosaddr];
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}
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return ret;
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}
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static void
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sst_add_mappings(sst_t *dev)
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{
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int i = 0, count;
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uint32_t base, fbase;
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uint32_t root_base;
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count = dev->size >> 16;
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root_base = 0x100000 - dev->size;
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for (i = 0; i < count; i++) {
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base = root_base + (i << 16);
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fbase = base & biosmask;
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memcpy(&dev->array[fbase], &rom[base & biosmask], 0x10000);
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if (base >= 0xe0000) {
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mem_mapping_add(&(dev->mapping[i]), base, 0x10000,
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sst_read, sst_readw, sst_readl,
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sst_write, NULL, NULL,
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dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
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}
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if (is6117) {
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mem_mapping_add(&(dev->mapping_h[i]), (base | 0x3f00000), 0x10000,
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sst_read, sst_readw, sst_readl,
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sst_write, NULL, NULL,
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dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
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} else {
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mem_mapping_add(&(dev->mapping_h[i]), (base | (cpu_16bitbus ? 0xf00000 : 0xfff00000)), 0x10000,
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sst_read, sst_readw, sst_readl,
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sst_write, NULL, NULL,
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dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev);
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}
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}
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}
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static void *
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sst_init(const device_t *info)
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{
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FILE *f;
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sst_t *dev = malloc(sizeof(sst_t));
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memset(dev, 0, sizeof(sst_t));
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sprintf(flash_path, "%s.bin", machine_get_internal_name_ex(machine));
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mem_mapping_disable(&bios_mapping);
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mem_mapping_disable(&bios_high_mapping);
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dev->array = (uint8_t *) malloc(biosmask + 1);
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memset(dev->array, 0xff, biosmask + 1);
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dev->manufacturer = info->local & 0xff;
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dev->id = (info->local >> 8) & 0xff;
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dev->has_bbp = (dev->manufacturer == WINBOND) && ((info->local & 0xff00) >= W29C020);
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dev->is_39 = (dev->manufacturer == SST) && ((info->local & 0xff00) >= SST39SF512);
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dev->size = info->local & 0xffff0000;
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if ((dev->size == 0x20000) && (strstr(machine_get_internal_name_ex(machine), "xi8088")) && !xi8088_bios_128kb())
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dev->size = 0x10000;
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dev->mask = dev->size - 1;
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dev->page_mask = dev->mask & 0xffffff80; /* Filter out A0-A6. */
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dev->sdp = 1;
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dev->bbp_first_8k = dev->bbp_last_8k = 0xfe;
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sst_add_mappings(dev);
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f = nvr_fopen(flash_path, "rb");
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if (f) {
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if (fread(&(dev->array[0x00000]), 1, dev->size, f) != dev->size)
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pclog("Less than %i bytes read from the SST Flash ROM file\n", dev->size);
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fclose(f);
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} else
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dev->dirty = 1; /* It is by definition dirty on creation. */
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if (!dev->is_39)
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timer_add(&dev->page_write_timer, sst_page_write, dev, 0);
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return dev;
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}
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|
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static void
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sst_close(void *p)
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{
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FILE *f;
|
|
sst_t *dev = (sst_t *) p;
|
|
|
|
if (dev->dirty) {
|
|
f = nvr_fopen(flash_path, "wb");
|
|
if (f != NULL) {
|
|
fwrite(&(dev->array[0x00000]), dev->size, 1, f);
|
|
fclose(f);
|
|
}
|
|
}
|
|
|
|
free(dev->array);
|
|
dev->array = NULL;
|
|
|
|
free(dev);
|
|
}
|
|
|
|
const device_t sst_flash_29ee010_device = {
|
|
.name = "SST 29EE010 Flash BIOS",
|
|
.internal_name = "sst_flash_29ee010",
|
|
.flags = 0,
|
|
.local = SST | SST29EE010 | SIZE_1M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_29ee020_device = {
|
|
.name = "SST 29EE020 Flash BIOS",
|
|
.internal_name = "sst_flash_29ee020",
|
|
.flags = 0,
|
|
.local = SST | SST29EE020 | SIZE_2M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t winbond_flash_w29c512_device = {
|
|
.name = "Winbond W29C512 Flash BIOS",
|
|
.internal_name = "winbond_flash_w29c512",
|
|
.flags = 0,
|
|
.local = WINBOND | W29C010 | SIZE_512K,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t winbond_flash_w29c010_device = {
|
|
.name = "Winbond W29C010 Flash BIOS",
|
|
.internal_name = "winbond_flash_w29c010",
|
|
.flags = 0,
|
|
.local = WINBOND | W29C010 | SIZE_1M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t winbond_flash_w29c020_device = {
|
|
.name = "Winbond W29C020 Flash BIOS",
|
|
.internal_name = "winbond_flash_w29c020",
|
|
.flags = 0,
|
|
.local = WINBOND | W29C020 | SIZE_2M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t winbond_flash_w29c040_device = {
|
|
.name = "Winbond W29C040 Flash BIOS",
|
|
.internal_name = "winbond_flash_w29c040",
|
|
.flags = 0,
|
|
.local = WINBOND | W29C040 | SIZE_4M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_39sf512_device = {
|
|
.name = "SST 39SF512 Flash BIOS",
|
|
.internal_name = "sst_flash_39sf512",
|
|
.flags = 0,
|
|
.local = SST | SST39SF512 | SIZE_512K,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_39sf010_device = {
|
|
.name = "SST 39SF010 Flash BIOS",
|
|
.internal_name = "sst_flash_39sf010",
|
|
.flags = 0,
|
|
.local = SST | SST39SF010 | SIZE_1M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_39sf020_device = {
|
|
.name = "SST 39SF020 Flash BIOS",
|
|
.internal_name = "sst_flash_39sf020",
|
|
.flags = 0,
|
|
.local = SST | SST39SF020 | SIZE_2M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_39sf040_device = {
|
|
.name = "SST 39SF040 Flash BIOS",
|
|
.internal_name = "sst_flash_39sf040",
|
|
.flags = 0,
|
|
.local = SST | SST39SF040 | SIZE_4M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_39lf512_device = {
|
|
.name = "SST 39LF512 Flash BIOS",
|
|
.internal_name = "sst_flash_39lf512",
|
|
.flags = 0,
|
|
.local = SST | SST39LF512 | SIZE_512K,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_39lf010_device = {
|
|
.name = "SST 39LF010 Flash BIOS",
|
|
.internal_name = "sst_flash_39lf010",
|
|
.flags = 0,
|
|
.local = SST | SST39LF010 | SIZE_1M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_39lf020_device = {
|
|
.name = "SST 39LF020 Flash BIOS",
|
|
.internal_name = "sst_flash_39lf020",
|
|
.flags = 0,
|
|
.local = SST | SST39LF020 | SIZE_2M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_39lf040_device = {
|
|
.name = "SST 39LF040 Flash BIOS",
|
|
.internal_name = "sst_flash_39lf040",
|
|
.flags = 0,
|
|
.local = SST | SST39LF040 | SIZE_4M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_39lf080_device = {
|
|
.name = "SST 39LF080 Flash BIOS",
|
|
.internal_name = "sst_flash_39lf080",
|
|
.flags = 0,
|
|
.local = SST | SST39LF080 | SIZE_8M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_39lf016_device = {
|
|
.name = "SST 39LF016 Flash BIOS",
|
|
.internal_name = "sst_flash_39lf016",
|
|
.flags = 0,
|
|
.local = SST | SST39LF016 | SIZE_16M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
/*
|
|
* Firmware Hubs. The FWH signals are not implemented yet. Firmware Hubs do write cycles
|
|
* to read/write on the flash. SST Flashes still do traditional flashing via PP Mode. Our
|
|
* BIOS firmwares don't seem to utilize FWH R/W thus the FWH ports remain unknown for an
|
|
* implementation. We just contain the ID's so the BIOS can do ESCD & DMI writes with no
|
|
* worries.
|
|
*/
|
|
|
|
const device_t sst_flash_49lf002_device = {
|
|
.name = "SST 49LF002 Firmware Hub",
|
|
.internal_name = "sst_flash_49lf002",
|
|
.flags = 0,
|
|
.local = SST | SST49LF002 | SIZE_2M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_49lf020_device = {
|
|
.name = "SST 49LF020 Firmware Hub",
|
|
.internal_name = "sst_flash_49lf0020",
|
|
.flags = 0,
|
|
.local = SST | SST49LF020 | SIZE_2M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_49lf020a_device = {
|
|
.name = "SST 49LF020A Firmware Hub",
|
|
.internal_name = "sst_flash_49lf0020a",
|
|
.flags = 0,
|
|
.local = SST | SST49LF020A | SIZE_2M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_49lf003_device = {
|
|
.name = "SST 49LF003 Firmware Hub",
|
|
.internal_name = "sst_flash_49lf003",
|
|
.flags = 0,
|
|
.local = SST | SST49LF003 | SIZE_3M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_49lf030_device = {
|
|
.name = "SST 49LF030 Firmware Hub",
|
|
.internal_name = "sst_flash_49lf030",
|
|
.flags = 0,
|
|
.local = SST | SST49LF030 | SIZE_3M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_49lf004_device = {
|
|
.name = "SST 49LF004 Firmware Hub",
|
|
.internal_name = "sst_flash_49lf004",
|
|
.flags = 0,
|
|
.local = SST | SST49LF004 | SIZE_4M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_49lf004c_device = {
|
|
.name = "SST 49LF004C Firmware Hub",
|
|
.internal_name = "sst_flash_49lf004c",
|
|
.flags = 0,
|
|
.local = SST | SST49LF004C | SIZE_4M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_49lf040_device = {
|
|
.name = "SST 49LF040 Firmware Hub",
|
|
.internal_name = "sst_flash_49lf040",
|
|
.flags = 0,
|
|
.local = SST | SST49LF040 | SIZE_4M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_49lf008_device = {
|
|
.name = "SST 49LF008 Firmware Hub",
|
|
.internal_name = "sst_flash_49lf008",
|
|
.flags = 0,
|
|
.local = SST | SST49LF008 | SIZE_8M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_49lf008c_device = {
|
|
.name = "SST 49LF008C Firmware Hub",
|
|
.internal_name = "sst_flash_49lf008c",
|
|
.flags = 0,
|
|
.local = SST | SST49LF008C | SIZE_8M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_49lf080_device = {
|
|
.name = "SST 49LF080 Firmware Hub",
|
|
.internal_name = "sst_flash_49lf080",
|
|
.flags = 0,
|
|
.local = SST | SST49LF080 | SIZE_8M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_49lf016_device = {
|
|
.name = "SST 49LF016 Firmware Hub",
|
|
.internal_name = "sst_flash_49lf016",
|
|
.flags = 0,
|
|
.local = SST | SST49LF016 | SIZE_16M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t sst_flash_49lf160_device = {
|
|
|
|
.name = "SST 49LF160 Firmware Hub",
|
|
.internal_name = "sst_flash_49lf160",
|
|
.flags = 0,
|
|
.local = SST | SST49LF160 | SIZE_16M,
|
|
.init = sst_init,
|
|
.close = sst_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|