Files
86Box/src/cpu/x86_ops_io.h
OBattler 2792da5432 Refactored AHA-154x and BusLogic emulation and made them use a common core;
Fixed AHA-154x scatter/gather transfers;
Two-phased SCSI read-direction commands;
Made scsi_bus.c use a dynamically malloc'd buffer instead of a giant fixed-size buffer;
The AHA-154x/BusLogic thread now uses mutexes;
The BusLogic BT-545C is now the BT-545S;
Added the BusLogic BT-542BH;
The AHA-1542CF now again uses the v2.11 BIOS as the CD booting now works;
Applied PCem commit that adds NMI support to the recompiler;
Applied PCem commit that adds the IBM XT 286;
Applied PCem commits that have to do with sound, including the ES1371;
Fixed the NCR5380 output data register;
Moved the SLiRP mutex stuff from win.c to the appropriate network files;
Added sanity checks to everything in win_thread.c.
2017-10-14 07:03:19 +02:00

147 lines
3.9 KiB
C

static int opIN_AL_imm(uint32_t fetchdat)
{
uint16_t port = (uint16_t)getbytef();
check_io_perm(port);
AL = inb(port);
CLOCK_CYCLES(12);
PREFETCH_RUN(12, 2, -1, 1,0,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opIN_AX_imm(uint32_t fetchdat)
{
uint16_t port = (uint16_t)getbytef();
check_io_perm(port);
check_io_perm(port + 1);
AX = inw(port);
CLOCK_CYCLES(12);
PREFETCH_RUN(12, 2, -1, 1,0,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opIN_EAX_imm(uint32_t fetchdat)
{
uint16_t port = (uint16_t)getbytef();
check_io_perm(port);
check_io_perm(port + 1);
check_io_perm(port + 2);
check_io_perm(port + 3);
EAX = inl(port);
CLOCK_CYCLES(12);
PREFETCH_RUN(12, 2, -1, 0,1,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opOUT_AL_imm(uint32_t fetchdat)
{
uint16_t port = (uint16_t)getbytef();
check_io_perm(port);
outb(port, AL);
CLOCK_CYCLES(10);
PREFETCH_RUN(10, 2, -1, 0,0,1,0, 0);
if (port == 0x64)
return x86_was_reset;
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opOUT_AX_imm(uint32_t fetchdat)
{
uint16_t port = (uint16_t)getbytef();
check_io_perm(port);
check_io_perm(port + 1);
outw(port, AX);
CLOCK_CYCLES(10);
PREFETCH_RUN(10, 2, -1, 0,0,1,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opOUT_EAX_imm(uint32_t fetchdat)
{
uint16_t port = (uint16_t)getbytef();
check_io_perm(port);
check_io_perm(port + 1);
check_io_perm(port + 2);
check_io_perm(port + 3);
outl(port, EAX);
CLOCK_CYCLES(10);
PREFETCH_RUN(10, 2, -1, 0,0,0,1, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opIN_AL_DX(uint32_t fetchdat)
{
check_io_perm(DX);
AL = inb(DX);
CLOCK_CYCLES(12);
PREFETCH_RUN(12, 1, -1, 1,0,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opIN_AX_DX(uint32_t fetchdat)
{
check_io_perm(DX);
check_io_perm(DX + 1);
AX = inw(DX);
CLOCK_CYCLES(12);
PREFETCH_RUN(12, 1, -1, 1,0,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opIN_EAX_DX(uint32_t fetchdat)
{
check_io_perm(DX);
check_io_perm(DX + 1);
check_io_perm(DX + 2);
check_io_perm(DX + 3);
EAX = inl(DX);
CLOCK_CYCLES(12);
PREFETCH_RUN(12, 1, -1, 0,1,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opOUT_AL_DX(uint32_t fetchdat)
{
check_io_perm(DX);
outb(DX, AL);
CLOCK_CYCLES(11);
PREFETCH_RUN(11, 1, -1, 0,0,1,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return x86_was_reset;
}
static int opOUT_AX_DX(uint32_t fetchdat)
{
check_io_perm(DX);
check_io_perm(DX + 1);
outw(DX, AX);
CLOCK_CYCLES(11);
PREFETCH_RUN(11, 1, -1, 0,0,1,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}
static int opOUT_EAX_DX(uint32_t fetchdat)
{
check_io_perm(DX);
check_io_perm(DX + 1);
check_io_perm(DX + 2);
check_io_perm(DX + 3);
outl(DX, EAX);
PREFETCH_RUN(11, 1, -1, 0,0,0,1, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0;
}