412 lines
10 KiB
C
412 lines
10 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Functions common to all emulated x86 CPU's.
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*
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* Authors: Andrew Jenner, <https://www.reenigne.org>
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* Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2015-2020 Andrew Jenner.
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* Copyright 2016-2020 Miran Grca.
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*/
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#include <math.h>
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#include <stdarg.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include "cpu.h"
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#include "x86.h"
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#include "x86seg_common.h"
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#include "x86seg.h"
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#include <86box/machine.h>
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#include <86box/device.h>
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#include <86box/dma.h>
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#include <86box/io.h>
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#include <86box/keyboard.h>
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#include <86box/mem.h>
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#include <86box/rom.h>
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#include <86box/nmi.h>
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#include <86box/pic.h>
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#include <86box/pci.h>
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#include <86box/ppi.h>
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#include <86box/timer.h>
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#include <86box/video.h>
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#include <86box/vid_svga.h>
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/* The opcode of the instruction currently being executed. */
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uint8_t opcode;
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/* The tables to speed up the setting of the Z, N, and P cpu_state.flags. */
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uint8_t znptable8[256];
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uint16_t znptable16[65536];
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/* A 16-bit zero, needed because some speed-up arrays contain pointers to it. */
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uint16_t zero = 0;
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/* MOD and R/M stuff. */
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uint16_t *mod1add[2][8];
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uint32_t *mod1seg[8];
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uint32_t rmdat;
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/* XT CPU multiplier. */
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uint64_t xt_cpu_multi;
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/* Variables for handling the non-maskable interrupts. */
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int nmi = 0;
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int nmi_auto_clear = 0;
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/* Was the CPU ever reset? */
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int x86_was_reset = 0;
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int soft_reset_pci = 0;
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/* Is the TRAP flag on? */
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int trap = 0;
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/* The current effective address's segment. */
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uint32_t easeg;
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/* This is for the OPTI 283 special reset handling mode. */
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int reset_on_hlt;
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int hlt_reset_pending;
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int fpu_cycles = 0;
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int in_lock = 0;
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#ifdef ENABLE_X86_LOG
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#if 0
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void dumpregs(int);
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#endif
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int x86_do_log = ENABLE_X86_LOG;
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int indump = 0;
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static void
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x86_log(const char *fmt, ...)
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{
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va_list ap;
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if (x86_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#if 0
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void
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dumpregs(int force)
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{
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int c;
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char *seg_names[4] = { "ES", "CS", "SS", "DS" };
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/* Only dump when needed, and only once.. */
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if (indump || (!force && !dump_on_exit))
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return;
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x86_log("EIP=%08X CS=%04X DS=%04X ES=%04X SS=%04X FLAGS=%04X\n",
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cpu_state.pc, CS, DS, ES, SS, cpu_state.flags);
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x85_log("Old CS:EIP: %04X:%08X; %i ins\n", oldcs, cpu_state.oldpc, ins);
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for (c = 0; c < 4; c++) {
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x86_log("%s : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",
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seg_names[c], _opseg[c]->base, _opseg[c]->limit,
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_opseg[c]->access, _opseg[c]->limit_low, _opseg[c]->limit_high);
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}
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if (is386) {
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x86_log("FS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",
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seg_fs, cpu_state.seg_fs.limit, cpu_state.seg_fs.access, cpu_state.seg_fs.limit_low,
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cpu_state.seg_fs.limit_high);
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x86_log("GS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",
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gs, cpu_state.seg_gs.limit, cpu_state.seg_gs.access, cpu_state.seg_gs.limit_low,
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cpu_state.seg_gs.limit_high);
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x86_log("GDT : base=%06X limit=%04X\n", gdt.base, gdt.limit);
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x86_log("LDT : base=%06X limit=%04X\n", ldt.base, ldt.limit);
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x86_log("IDT : base=%06X limit=%04X\n", idt.base, idt.limit);
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x86_log("TR : base=%06X limit=%04X\n", tr.base, tr.limit);
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x86_log("386 in %s mode: %i-bit data, %-i-bit stack\n",
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(msw & 1) ? ((cpu_state.eflags & VM_FLAG) ? "V86" : "protected") : "real",
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(use32) ? 32 : 16, (stack32) ? 32 : 16);
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x86_log("CR0=%08X CR2=%08X CR3=%08X CR4=%08x\n", cr0, cr2, cr3, cr4);
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x86_log("EAX=%08X EBX=%08X ECX=%08X EDX=%08X\nEDI=%08X ESI=%08X EBP=%08X ESP=%08X\n",
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EAX, EBX, ECX, EDX, EDI, ESI, EBP, ESP);
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} else {
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x86_log("808x/286 in %s mode\n", (msw & 1) ? "protected" : "real");
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x86_log("AX=%04X BX=%04X CX=%04X DX=%04X DI=%04X SI=%04X BP=%04X SP=%04X\n",
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AX, BX, CX, DX, DI, SI, BP, SP);
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}
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x86_log("Entries in readlookup : %i writelookup : %i\n", readlnum, writelnum);
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x87_dumpregs();
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indump = 0;
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}
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#endif
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#else
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# define x86_log(fmt, ...)
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#endif
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/* Preparation of the various arrays needed to speed up the MOD and R/M work. */
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static void
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makemod1table(void)
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{
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mod1add[0][0] = &BX;
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mod1add[0][1] = &BX;
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mod1add[0][2] = &BP;
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mod1add[0][3] = &BP;
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mod1add[0][4] = &SI;
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mod1add[0][5] = &DI;
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mod1add[0][6] = &BP;
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mod1add[0][7] = &BX;
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mod1add[1][0] = &SI;
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mod1add[1][1] = &DI;
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mod1add[1][2] = &SI;
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mod1add[1][3] = &DI;
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mod1add[1][4] = &zero;
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mod1add[1][5] = &zero;
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mod1add[1][6] = &zero;
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mod1add[1][7] = &zero;
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mod1seg[0] = &ds;
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mod1seg[1] = &ds;
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mod1seg[2] = &ss;
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mod1seg[3] = &ss;
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mod1seg[4] = &ds;
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mod1seg[5] = &ds;
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mod1seg[6] = &ss;
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mod1seg[7] = &ds;
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}
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/* Prepare the ZNP table needed to speed up the setting of the Z, N, and P cpu_state.flags. */
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static void
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makeznptable(void)
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{
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int c;
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int d;
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int e;
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for (c = 0; c < 256; c++) {
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d = 0;
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for (e = 0; e < 8; e++) {
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if (c & (1 << e))
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d++;
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}
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if (d & 1)
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znptable8[c] = 0;
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else
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znptable8[c] = P_FLAG;
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#ifdef ENABLE_X86_LOG
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if (c == 0xb1)
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x86_log("znp8 b1 = %i %02X\n", d, znptable8[c]);
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#endif
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if (!c)
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znptable8[c] |= Z_FLAG;
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if (c & 0x80)
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znptable8[c] |= N_FLAG;
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}
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for (c = 0; c < 65536; c++) {
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d = 0;
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for (e = 0; e < 8; e++) {
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if (c & (1 << e))
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d++;
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}
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if (d & 1)
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znptable16[c] = 0;
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else
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znptable16[c] = P_FLAG;
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#ifdef ENABLE_X86_LOG
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if (c == 0xb1)
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x86_log("znp16 b1 = %i %02X\n", d, znptable16[c]);
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if (c == 0x65b1)
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x86_log("znp16 65b1 = %i %02X\n", d, znptable16[c]);
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#endif
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if (!c)
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znptable16[c] |= Z_FLAG;
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if (c & 0x8000)
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znptable16[c] |= N_FLAG;
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}
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}
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/* Common reset function. */
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static void
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reset_common(int hard)
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{
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#ifdef ENABLE_X86_LOG
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if (hard)
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x86_log("x86 reset\n");
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#endif
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if (!hard && reset_on_hlt) {
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hlt_reset_pending++;
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if (hlt_reset_pending == 2)
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hlt_reset_pending = 0;
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else
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return;
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}
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/* Make sure to gracefully leave SMM. */
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if (in_smm)
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leave_smm();
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/* Needed for the ALi M1533. */
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if (is486 && (hard || soft_reset_pci)) {
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pci_reset();
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if (!hard && soft_reset_pci) {
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dma_reset();
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/* TODO: Hack, but will do for time being, because all AT machines currently are 286+,
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and vice-versa. */
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dma_set_at(is286);
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device_reset_all(DEVICE_ALL);
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}
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}
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use32 = 0;
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cpu_cur_status = 0;
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stack32 = 0;
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msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
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msw = 0;
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if (hascache)
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cr0 = 1 << 30;
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else
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cr0 = 0;
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if (is386 && !is486 && (fpu_type == FPU_387))
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cr0 |= 0x10;
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cpu_cache_int_enabled = 0;
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cpu_update_waitstates();
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cr4 = 0;
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cpu_state.eflags = 0;
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cgate32 = 0;
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#ifdef USE_DEBUG_REGS_486
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if (is386) {
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#else
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if (is386 && !is486) {
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#endif
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for (uint8_t i = 0; i < 4; i++)
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dr[i] = 0x00000000;
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dr[6] = 0xffff1ff0;
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dr[7] = 0x00000400;
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}
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if (is286) {
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if (is486)
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loadcs(0xF000);
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else
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loadcs_2386(0xF000);
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cpu_state.pc = 0xFFF0;
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if (hard) {
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rammask = cpu_16bitbus ? 0xFFFFFF : 0xFFFFFFFF;
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if (is6117)
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rammask |= 0x03000000;
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mem_a20_key = mem_a20_alt = mem_a20_state = 0;
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}
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}
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idt.base = 0;
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cpu_state.flags = 2;
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trap = 0;
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idt.limit = is386 ? 0x03ff : 0xffff;
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if (is386 || hard)
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EAX = EBX = ECX = EDX = ESI = EDI = EBP = ESP = 0;
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if (hard) {
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makeznptable();
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resetreadlookup();
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makemod1table();
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cpu_set_edx();
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mmu_perm = 4;
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}
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x86seg_reset();
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#ifdef USE_DYNAREC
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if (hard)
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codegen_reset();
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#endif
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cpu_flush_pending = 0;
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cpu_old_paging = 0;
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if (!hard)
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flushmmucache();
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x86_was_reset = 1;
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cpu_alt_reset = 0;
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cpu_ven_reset();
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in_smm = smi_latched = 0;
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smi_line = smm_in_hlt = 0;
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smi_block = 0;
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if (hard) {
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if (is486)
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smbase = is_am486dxl ? 0x00060000 : 0x00030000;
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ppi_reset();
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}
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in_sys = 0;
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shadowbios = shadowbios_write = 0;
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alt_access = cpu_end_block_after_ins = 0;
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if (hard) {
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reset_on_hlt = hlt_reset_pending = 0;
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cache_index = 0;
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memset(_tr, 0x00, sizeof(_tr));
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memset(_cache, 0x00, sizeof(_cache));
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/* If we have an AT or PS/2 keyboard controller, make sure the A20 state
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is correct. */
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device_reset_all(DEVICE_KBC);
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} else
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device_reset_all(DEVICE_SOFTRESET);
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if (!is286)
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reset_808x(hard);
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in_lock = 0;
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cpu_cpurst_on_sr = 0;
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}
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/* Hard reset. */
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void
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resetx86(void)
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{
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reset_common(1);
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soft_reset_mask = 0;
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}
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/* Soft reset. */
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void
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softresetx86(void)
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{
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if (soft_reset_mask)
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return;
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if (ibm8514_active || xga_active)
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vga_on = 1;
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reset_common(0);
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}
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/* Actual hard reset. */
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void
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hardresetx86(void)
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{
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dma_reset();
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/* TODO: Hack, but will do for time being, because all AT machines currently are 286+,
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and vice-versa. */
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dma_set_at(is286);
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device_reset_all(DEVICE_ALL);
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cpu_alt_reset = 0;
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mem_a20_alt = 0;
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mem_a20_recalc();
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flushmmucache();
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resetx86();
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}
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