1509 lines
49 KiB
C
1509 lines
49 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Driver for IBM PS/2 ESDI disk controller (MCA)
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*
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* AdapterID: 0xDDFF
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* AdapterName: "ESDI Fixed Disk Controller"
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* NumBytes 2
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* I/O base: 0x3510-0x3517
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* IRQ: 14
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*
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* Primary Board pos[0]=XXxx xx0X 0x3510
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* Secondary Board pos[0]=XXxx xx1X 0x3518
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*
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* DMA 5 pos[0]=XX01 01XX
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* DMA 6 pos[0]=XX01 10XX
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* DMA 7 pos[0]=XX01 11XX
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* DMA 0 pos[0]=XX00 00XX
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* DMA 1 pos[0]=XX00 01XX
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* DMA 3 pos[0]=XX00 11XX
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* DMA 4 pos[0]=XX01 00XX
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*
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* MCA Fairness ON pos[0]=X1XX XXXX
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* MCA Fairness OFF pos[0]=X0XX XXXX
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*
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* ROM C000 pos[1]=XXXX 0000
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* ROM C400 pos[1]=XXXX 0001
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* ROM C800 pos[1]=XXXX 0010
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* ROM CC00 pos[1]=XXXX 0011
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* ROM D000 pos[1]=XXXX 0100
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* ROM D400 pos[1]=XXXX 0101
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* ROM D800 pos[1]=XXXX 0110
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* ROM DC00 pos[1]=XXXX 0111
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* ROM Disabled pos[1]=XXXX 1XXX
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*
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* DMA Burst 8 pos[1]=XX01 XXXX
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* DMA Burst 16 pos[1]=XX10 XXXX
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* DMA Burst 24 pos[1]=XX11 XXXX
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* DMA Disabled pos[1]=XX00 XXXX
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*
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* Although this is an MCA device, meaning that the system
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* software will take care of device configuration, the ESDI
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* controller is a somewhat weird one.. it's I/O base address
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* and IRQ channel are locked to 0x3510 and IRQ14, possibly
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* to enforce compatibility with the IBM MFM disk controller
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* that was also in use on these systems. All other settings,
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* however, are auto-configured by the system software as
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* shown above.
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*
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*
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*
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* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
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* Fred N. van Kempen, <decwiz@yahoo.com>
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*
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* Copyright 2008-2018 Sarah Walker.
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* Copyright 2017-2018 Fred N. van Kempen.
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*/
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#include <stdarg.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <wchar.h>
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#include <inttypes.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/dma.h>
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#include <86box/io.h>
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#include <86box/mca.h>
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#include <86box/mem.h>
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#include <86box/pic.h>
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#include <86box/rom.h>
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#include <86box/timer.h>
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#include <86box/ui.h>
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#include <86box/hdc.h>
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#include <86box/hdd.h>
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#include <86box/plat_unused.h>
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/* These are hardwired. */
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#define ESDI_IOADDR_PRI 0x3510
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#define ESDI_IOADDR_SEC 0x3518
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#define ESDI_IRQCHAN 14
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#define BIOS_FILE_L "roms/hdd/esdi/90x8969.bin"
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#define BIOS_FILE_H "roms/hdd/esdi/90x8970.bin"
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#define ESDI_TIME 500.0
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#define CMD_ADAPTER 0
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typedef struct esdi_drive_t {
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int spt;
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int hpc;
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int tracks;
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int sectors;
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int present;
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int hdd_num;
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} drive_t;
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typedef struct esdi_t {
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int8_t dma;
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uint32_t bios;
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rom_t bios_rom;
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uint8_t basic_ctrl;
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uint8_t status;
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uint8_t irq_status;
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int irq_ena_disable;
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int irq_in_progress;
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int cmd_req_in_progress;
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int cmd_pos;
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uint16_t cmd_data[4];
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int cmd_dev;
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int status_pos;
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int status_len;
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uint16_t status_data[256];
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int data_pos;
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uint16_t data[256];
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uint16_t sector_buffer[256][256];
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int sector_pos;
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int sector_count;
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int command;
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int cmd_state;
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int in_reset;
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pc_timer_t timer;
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uint32_t rba;
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struct cmds {
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int req_in_progress;
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} cmds[3];
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drive_t drives[2];
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uint8_t pos_regs[8];
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} esdi_t;
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enum {
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ESDI_IS_ADAPTER,
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ESDI_IS_INTEGRATED
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};
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#define STATUS_DMA_ENA (1 << 7)
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#define STATUS_IRQ_PENDING (1 << 6)
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#define STATUS_CMD_IN_PROGRESS (1 << 5)
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#define STATUS_BUSY (1 << 4)
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#define STATUS_STATUS_OUT_FULL (1 << 3)
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#define STATUS_CMD_IR_FULL (1 << 2)
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#define STATUS_TRANSFER_REQ (1 << 1)
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#define STATUS_IRQ (1 << 0)
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#define CTRL_RESET (1 << 7)
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#define CTRL_DMA_ENA (1 << 1)
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#define CTRL_IRQ_ENA (1 << 0)
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#define IRQ_HOST_ADAPTER (7 << 5)
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#define IRQ_DEVICE_0 (0 << 5)
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#define IRQ_CMD_COMPLETE_SUCCESS 0x1
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#define IRQ_RESET_COMPLETE 0xa
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#define IRQ_DATA_TRANSFER_READY 0xb
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#define IRQ_CMD_COMPLETE_FAILURE 0xc
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#define ATTN_DEVICE_SEL (7 << 5)
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#define ATTN_HOST_ADAPTER (7 << 5)
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#define ATTN_DEVICE_0 (0 << 5)
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#define ATTN_DEVICE_1 (1 << 5)
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#define ATTN_REQ_MASK 0x0f
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#define ATTN_CMD_REQ 1
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#define ATTN_EOI 2
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#define ATTN_RESET 4
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#define CMD_SIZE_4 (1 << 14)
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#define CMD_DEVICE_SEL (7 << 5)
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#define CMD_MASK 0x1f
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#define CMD_READ 0x01
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#define CMD_WRITE 0x02
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#define CMD_READ_VERIFY 0x03
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#define CMD_WRITE_VERIFY 0x04
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#define CMD_SEEK 0x05
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#define CMD_PARK_HEADS 0x06
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#define CMD_GET_DEV_STATUS 0x08
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#define CMD_GET_DEV_CONFIG 0x09
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#define CMD_GET_POS_INFO 0x0a
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#define CMD_FORMAT_UNIT 0x16
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#define CMD_FORMAT_PREPARE 0x17
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#define STATUS_LEN(x) ((x) << 8)
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#define STATUS_DEVICE(x) ((x) << 5)
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#define STATUS_DEVICE_HOST_ADAPTER (7 << 5)
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#ifdef ENABLE_ESDI_MCA_LOG
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int esdi_mca_do_log = ENABLE_ESDI_MCA_LOG;
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static void
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esdi_mca_log(const char *fmt, ...)
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{
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va_list ap;
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if (esdi_mca_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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# define esdi_mca_log(fmt, ...)
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#endif
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static __inline void
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set_irq(esdi_t *dev)
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{
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dev->irq_ena_disable = 1;
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esdi_mca_log("Set IRQ 14: bit=%x, cmd=%02x.\n", dev->basic_ctrl & CTRL_IRQ_ENA, dev->command);
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if (dev->basic_ctrl & CTRL_IRQ_ENA)
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picint_common(1 << ESDI_IRQCHAN, PIC_IRQ_EDGE, 1, NULL);
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}
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static __inline void
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clear_irq(esdi_t *dev)
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{
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dev->irq_ena_disable = 0;
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esdi_mca_log("Clear IRQ 14: bit=%x, cmd=%02x.\n", dev->basic_ctrl & CTRL_IRQ_ENA, dev->command);
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if (dev->basic_ctrl & CTRL_IRQ_ENA)
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picint_common(1 << ESDI_IRQCHAN, PIC_IRQ_EDGE, 0, NULL);
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}
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static __inline void
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update_irq(esdi_t *dev)
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{
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uint8_t set = (dev->basic_ctrl & CTRL_IRQ_ENA) && dev->irq_ena_disable;
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picint_common(1 << ESDI_IRQCHAN, PIC_IRQ_EDGE, set, NULL);
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}
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static void
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esdi_mca_set_callback(esdi_t *dev, double callback)
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{
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if (!dev) {
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return;
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}
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if (callback == 0.0) {
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esdi_mca_log("Callback Stopped.\n");
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timer_stop(&dev->timer);
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} else {
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timer_on_auto(&dev->timer, callback);
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}
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}
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static double
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esdi_mca_get_xfer_time(UNUSED(esdi_t *esdi), int size)
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{
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/* 390.625 us per sector at 10 Mbit/s = 1280 kB/s. */
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return (3125.0 / 8.0) * (double) size;
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}
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static void
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cmd_unsupported(esdi_t *dev)
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{
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dev->status_len = 9;
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dev->status_data[0] = dev->command | STATUS_LEN(9) | dev->cmd_dev;
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dev->status_data[1] = 0x0f03; /*Attention error, command not supported*/
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dev->status_data[2] = 0x0002; /*Interface fault*/
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dev->status_data[3] = 0;
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dev->status_data[4] = 0;
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dev->status_data[5] = 0;
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dev->status_data[6] = 0;
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dev->status_data[7] = 0;
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dev->status_data[8] = 0;
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dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
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dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_FAILURE;
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dev->irq_in_progress = 1;
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set_irq(dev);
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ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
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ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
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}
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static void
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device_not_present(esdi_t *dev)
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{
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dev->status_len = 9;
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dev->status_data[0] = dev->command | STATUS_LEN(9) | dev->cmd_dev;
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dev->status_data[1] = 0x0c11; /*Command failed, internal hardware error*/
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dev->status_data[2] = 0x000b; /*Selection error*/
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dev->status_data[3] = 0;
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dev->status_data[4] = 0;
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dev->status_data[5] = 0;
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dev->status_data[6] = 0;
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dev->status_data[7] = 0;
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dev->status_data[8] = 0;
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dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
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dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_FAILURE;
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dev->irq_in_progress = 1;
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set_irq(dev);
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ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
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ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
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}
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static void
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rba_out_of_range(esdi_t *dev)
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{
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dev->status_len = 9;
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dev->status_data[0] = dev->command | STATUS_LEN(9) | dev->cmd_dev;
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dev->status_data[1] = 0x0e01; /*Command block error, invalid parameter*/
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dev->status_data[2] = 0x0007; /*RBA out of range*/
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dev->status_data[3] = 0;
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dev->status_data[4] = 0;
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dev->status_data[5] = 0;
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dev->status_data[6] = 0;
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dev->status_data[7] = 0;
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dev->status_data[8] = 0;
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dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
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dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_FAILURE;
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dev->irq_in_progress = 1;
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set_irq(dev);
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ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
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ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
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}
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static void
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defective_block(esdi_t *dev)
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{
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dev->status_len = 9;
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dev->status_data[0] = dev->command | STATUS_LEN(9) | dev->cmd_dev;
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dev->status_data[1] = 0x0e01; /*Command block error, invalid parameter*/
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dev->status_data[2] = 0x0009; /*Defective block*/
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dev->status_data[3] = 0;
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dev->status_data[4] = 0;
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dev->status_data[5] = 0;
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dev->status_data[6] = 0;
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dev->status_data[7] = 0;
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dev->status_data[8] = 0;
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dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
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dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_FAILURE;
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dev->irq_in_progress = 1;
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set_irq(dev);
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ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
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ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
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}
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static void
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complete_command_status(esdi_t *dev)
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{
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dev->status_len = 7;
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if (dev->cmd_dev == ATTN_DEVICE_0)
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dev->status_data[0] = dev->command | STATUS_LEN(7) | STATUS_DEVICE(0);
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else
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dev->status_data[0] = dev->command | STATUS_LEN(7) | STATUS_DEVICE(1);
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dev->status_data[1] = 0x0000; /*Error bits*/
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dev->status_data[2] = 0x1900; /*Device status*/
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dev->status_data[3] = 0; /*Number of blocks left to do*/
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dev->status_data[4] = (dev->rba - 1) & 0xffff; /*Last RBA processed*/
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dev->status_data[5] = (dev->rba - 1) >> 8;
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dev->status_data[6] = 0; /*Number of blocks requiring error recovery*/
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ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
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ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
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}
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#define ESDI_ADAPTER_ONLY() \
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if (dev->cmd_dev != ATTN_HOST_ADAPTER) { \
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cmd_unsupported(dev); \
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return; \
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}
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#define ESDI_DRIVE_ONLY() \
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if (dev->cmd_dev != ATTN_DEVICE_0 && dev->cmd_dev != ATTN_DEVICE_1) { \
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cmd_unsupported(dev); \
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return; \
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} \
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if (dev->cmd_dev == ATTN_DEVICE_0) \
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drive = &dev->drives[0]; \
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else \
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drive = &dev->drives[1];
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static void
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esdi_callback(void *priv)
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{
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esdi_t *dev = (esdi_t *) priv;
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const drive_t *drive;
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int val;
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double cmd_time = 0.0;
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/* If we are returning from a RESET, handle this first. */
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if (dev->in_reset) {
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esdi_mca_log("ESDI reset.\n");
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dev->in_reset = 0;
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dev->status = STATUS_IRQ | STATUS_TRANSFER_REQ | STATUS_STATUS_OUT_FULL;
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dev->status_len = 1; /*ToDo: better implementation for Xenix?*/
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dev->status_data[0] = STATUS_LEN(1) | ATTN_HOST_ADAPTER;
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dev->irq_status = IRQ_HOST_ADAPTER | IRQ_RESET_COMPLETE;
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return;
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}
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esdi_mca_log("Command=%02x.\n", dev->command);
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switch (dev->command) {
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case CMD_READ:
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case 0x15:
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ESDI_DRIVE_ONLY();
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if (!drive->present) {
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device_not_present(dev);
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return;
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}
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switch (dev->cmd_state) {
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case 0:
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if (dev->command == CMD_READ)
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dev->rba = (dev->cmd_data[2] | (dev->cmd_data[3] << 16)) & 0x0fffffff;
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dev->sector_pos = 0;
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dev->sector_count = dev->cmd_data[1];
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if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) {
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rba_out_of_range(dev);
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return;
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}
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dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ;
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dev->irq_status = dev->cmd_dev | IRQ_DATA_TRANSFER_READY;
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dev->irq_in_progress = 1;
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set_irq(dev);
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dev->cmd_state = 1;
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esdi_mca_set_callback(dev, ESDI_TIME);
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dev->data_pos = 0;
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break;
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case 1:
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if (!(dev->basic_ctrl & CTRL_DMA_ENA)) {
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esdi_mca_set_callback(dev, ESDI_TIME);
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return;
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}
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while (dev->sector_pos < dev->sector_count) {
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if (!dev->data_pos) {
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if (dev->rba >= drive->sectors)
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fatal("Read past end of drive\n");
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if (hdd_image_read(drive->hdd_num, dev->rba, 1, (uint8_t *) dev->data) < 0) {
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defective_block(dev);
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return;
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}
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cmd_time += hdd_timing_read(&hdd[drive->hdd_num], dev->rba, 1);
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cmd_time += esdi_mca_get_xfer_time(dev, 1);
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}
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while (dev->data_pos < 256) {
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val = dma_channel_write(dev->dma, dev->data[dev->data_pos]);
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if (val == DMA_NODATA) {
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esdi_mca_set_callback(dev, ESDI_TIME + cmd_time);
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return;
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}
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dev->data_pos++;
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}
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dev->data_pos = 0;
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dev->sector_pos++;
|
|
dev->rba++;
|
|
}
|
|
|
|
dev->status = STATUS_CMD_IN_PROGRESS;
|
|
dev->cmd_state = 2;
|
|
esdi_mca_set_callback(dev, cmd_time);
|
|
break;
|
|
|
|
case 2:
|
|
complete_command_status(dev);
|
|
dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
|
|
dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
break;
|
|
|
|
case CMD_WRITE:
|
|
case CMD_WRITE_VERIFY:
|
|
ESDI_DRIVE_ONLY();
|
|
if (!drive->present) {
|
|
device_not_present(dev);
|
|
return;
|
|
}
|
|
|
|
switch (dev->cmd_state) {
|
|
case 0:
|
|
dev->rba = (dev->cmd_data[2] | (dev->cmd_data[3] << 16)) & 0x0fffffff;
|
|
|
|
dev->sector_pos = 0;
|
|
dev->sector_count = dev->cmd_data[1];
|
|
|
|
if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) {
|
|
rba_out_of_range(dev);
|
|
return;
|
|
}
|
|
|
|
dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ;
|
|
dev->irq_status = dev->cmd_dev | IRQ_DATA_TRANSFER_READY;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
|
|
dev->cmd_state = 1;
|
|
esdi_mca_set_callback(dev, ESDI_TIME);
|
|
dev->data_pos = 0;
|
|
break;
|
|
|
|
case 1:
|
|
if (!(dev->basic_ctrl & CTRL_DMA_ENA)) {
|
|
esdi_mca_set_callback(dev, ESDI_TIME);
|
|
return;
|
|
}
|
|
|
|
while (dev->sector_pos < dev->sector_count) {
|
|
while (dev->data_pos < 256) {
|
|
val = dma_channel_read(dev->dma);
|
|
|
|
if (val == DMA_NODATA) {
|
|
esdi_mca_set_callback(dev, ESDI_TIME + cmd_time);
|
|
return;
|
|
}
|
|
|
|
dev->data[dev->data_pos++] = val & 0xffff;
|
|
}
|
|
|
|
if (dev->rba >= drive->sectors)
|
|
fatal("Write past end of drive\n");
|
|
if (hdd_image_write(drive->hdd_num, dev->rba, 1, (uint8_t *) dev->data) < 0) {
|
|
defective_block(dev);
|
|
return;
|
|
}
|
|
cmd_time += hdd_timing_write(&hdd[drive->hdd_num], dev->rba, 1);
|
|
cmd_time += esdi_mca_get_xfer_time(dev, 1);
|
|
dev->rba++;
|
|
dev->sector_pos++;
|
|
dev->data_pos = 0;
|
|
}
|
|
|
|
dev->status = STATUS_CMD_IN_PROGRESS;
|
|
dev->cmd_state = 2;
|
|
esdi_mca_set_callback(dev, cmd_time);
|
|
break;
|
|
|
|
case 2:
|
|
complete_command_status(dev);
|
|
dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
|
|
dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
break;
|
|
|
|
case CMD_READ_VERIFY:
|
|
ESDI_DRIVE_ONLY();
|
|
|
|
if (!drive->present) {
|
|
device_not_present(dev);
|
|
return;
|
|
}
|
|
|
|
switch (dev->cmd_state) {
|
|
case 0:
|
|
dev->rba = (dev->cmd_data[2] | (dev->cmd_data[3] << 16)) & 0x0fffffff;
|
|
dev->sector_count = dev->cmd_data[1];
|
|
|
|
if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) {
|
|
rba_out_of_range(dev);
|
|
return;
|
|
}
|
|
|
|
cmd_time = hdd_timing_read(&hdd[drive->hdd_num], dev->rba, dev->sector_count);
|
|
esdi_mca_set_callback(dev, ESDI_TIME + cmd_time);
|
|
dev->cmd_state = 1;
|
|
break;
|
|
|
|
case 1:
|
|
complete_command_status(dev);
|
|
dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
|
|
dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
break;
|
|
|
|
case CMD_SEEK:
|
|
ESDI_DRIVE_ONLY();
|
|
|
|
if (!drive->present) {
|
|
device_not_present(dev);
|
|
return;
|
|
}
|
|
|
|
if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) {
|
|
rba_out_of_range(dev);
|
|
return;
|
|
}
|
|
|
|
switch (dev->cmd_state) {
|
|
case 0:
|
|
dev->rba = (dev->cmd_data[2] | (dev->cmd_data[3] << 16)) & 0x0fffffff;
|
|
cmd_time = hdd_seek_get_time(&hdd[drive->hdd_num], dev->rba, HDD_OP_SEEK, 0, 0.0);
|
|
esdi_mca_set_callback(dev, ESDI_TIME + cmd_time);
|
|
dev->cmd_state = 1;
|
|
break;
|
|
|
|
case 1:
|
|
complete_command_status(dev);
|
|
dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
|
|
dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
break;
|
|
|
|
case CMD_PARK_HEADS:
|
|
ESDI_DRIVE_ONLY();
|
|
|
|
if (!drive->present) {
|
|
device_not_present(dev);
|
|
return;
|
|
}
|
|
|
|
switch (dev->cmd_state) {
|
|
case 0:
|
|
dev->rba = 0x00000000;
|
|
cmd_time = hdd_seek_get_time(&hdd[drive->hdd_num], dev->rba, HDD_OP_SEEK, 0, 0.0);
|
|
esdi_mca_set_callback(dev, ESDI_TIME + cmd_time);
|
|
dev->cmd_state = 1;
|
|
break;
|
|
|
|
case 1:
|
|
complete_command_status(dev);
|
|
dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
|
|
dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
break;
|
|
|
|
case CMD_GET_DEV_STATUS:
|
|
ESDI_DRIVE_ONLY();
|
|
|
|
if (!drive->present) {
|
|
device_not_present(dev);
|
|
return;
|
|
}
|
|
|
|
if ((dev->status & STATUS_IRQ) || dev->irq_in_progress)
|
|
fatal("IRQ in progress %02x %i\n", dev->status, dev->irq_in_progress);
|
|
|
|
dev->status_len = 9;
|
|
dev->status_data[0] = CMD_GET_DEV_STATUS | STATUS_LEN(9) | STATUS_DEVICE_HOST_ADAPTER;
|
|
dev->status_data[1] = 0x0000; /*Error bits*/
|
|
dev->status_data[2] = 0x1900; /*Device status*/
|
|
dev->status_data[3] = 0; /*ESDI Standard Status*/
|
|
dev->status_data[4] = 0; /*ESDI Vendor Unique Status*/
|
|
dev->status_data[5] = 0;
|
|
dev->status_data[6] = 0;
|
|
dev->status_data[7] = 0;
|
|
dev->status_data[8] = 0;
|
|
|
|
dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
|
|
dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
|
|
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
|
|
break;
|
|
|
|
case CMD_GET_DEV_CONFIG:
|
|
if (dev->cmd_dev == ATTN_HOST_ADAPTER)
|
|
{
|
|
if ((dev->status & STATUS_IRQ) || dev->irq_in_progress)
|
|
fatal("IRQ in progress %02x %i\n", dev->status, dev->irq_in_progress);
|
|
/* INT 13, AX=1C0B - ESDI FIXED DISK - GET ADAPTER CONFIGURATION */
|
|
/* The PS/55 will test sector buffer after this request is done. */
|
|
dev->status_len = 6;
|
|
dev->status_data[0] = CMD_GET_DEV_CONFIG | STATUS_LEN(6) | STATUS_DEVICE_HOST_ADAPTER;
|
|
dev->status_data[1] = 0;
|
|
dev->status_data[2] = 0;
|
|
/* bit 15-12: chip revision = 0011b, bit 11-8: sector buffer size = n * 256 bytes (n must be < 6) */
|
|
dev->status_data[3] = 0x3200;
|
|
dev->status_data[4] = 0;
|
|
dev->status_data[5] = 0;
|
|
}
|
|
else
|
|
{
|
|
ESDI_DRIVE_ONLY();
|
|
if (!drive->present) {
|
|
device_not_present(dev);
|
|
return;
|
|
}
|
|
|
|
if ((dev->status & STATUS_IRQ) || dev->irq_in_progress)
|
|
fatal("IRQ in progress %02x %i\n", dev->status, dev->irq_in_progress);
|
|
|
|
dev->status_len = 6;
|
|
dev->status_data[0] = CMD_GET_DEV_CONFIG | STATUS_LEN(6) | STATUS_DEVICE_HOST_ADAPTER;
|
|
dev->status_data[1] = 0x10; /*Zero defect*/
|
|
dev->status_data[2] = drive->sectors & 0xffff;
|
|
dev->status_data[3] = drive->sectors >> 16;
|
|
dev->status_data[4] = drive->tracks;
|
|
dev->status_data[5] = drive->hpc | (drive->spt << 16);
|
|
}
|
|
esdi_mca_log("CMD_GET_DEV_CONFIG %i %04x %04x %04x %04x %04x %04x\n",
|
|
drive->sectors,
|
|
dev->status_data[0], dev->status_data[1],
|
|
dev->status_data[2], dev->status_data[3],
|
|
dev->status_data[4], dev->status_data[5]);
|
|
|
|
dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
|
|
dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
|
|
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
|
|
break;
|
|
|
|
case CMD_GET_POS_INFO:
|
|
ESDI_ADAPTER_ONLY();
|
|
|
|
if ((dev->status & STATUS_IRQ) || dev->irq_in_progress)
|
|
fatal("IRQ in progress %02x %i\n", dev->status, dev->irq_in_progress);
|
|
|
|
dev->status_len = 5;
|
|
dev->status_data[0] = CMD_GET_POS_INFO | STATUS_LEN(5) | STATUS_DEVICE_HOST_ADAPTER;
|
|
dev->status_data[1] = dev->pos_regs[1] | (dev->pos_regs[0] << 8); /*MCA ID*/
|
|
dev->status_data[2] = dev->pos_regs[3] | (dev->pos_regs[2] << 8);
|
|
dev->status_data[3] = 0xff;
|
|
dev->status_data[4] = 0xff;
|
|
|
|
dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
|
|
dev->irq_status = IRQ_HOST_ADAPTER | IRQ_CMD_COMPLETE_SUCCESS;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
|
|
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
|
|
break;
|
|
|
|
case 0x10:
|
|
ESDI_ADAPTER_ONLY();
|
|
switch (dev->cmd_state) {
|
|
case 0:
|
|
dev->sector_pos = 0;
|
|
dev->sector_count = dev->cmd_data[1];
|
|
if (dev->sector_count > 256)
|
|
fatal("Write sector buffer count %04x\n", dev->cmd_data[1]);
|
|
|
|
dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ;
|
|
dev->irq_status = IRQ_HOST_ADAPTER | IRQ_DATA_TRANSFER_READY;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
|
|
dev->cmd_state = 1;
|
|
esdi_mca_set_callback(dev, ESDI_TIME);
|
|
dev->data_pos = 0;
|
|
break;
|
|
|
|
case 1:
|
|
if (!(dev->basic_ctrl & CTRL_DMA_ENA)) {
|
|
esdi_mca_set_callback(dev, ESDI_TIME);
|
|
return;
|
|
}
|
|
while (dev->sector_pos < dev->sector_count) {
|
|
while (dev->data_pos < 256) {
|
|
val = dma_channel_read(dev->dma);
|
|
|
|
if (val == DMA_NODATA) {
|
|
esdi_mca_set_callback(dev, ESDI_TIME);
|
|
return;
|
|
}
|
|
|
|
dev->data[dev->data_pos++] = val & 0xffff;
|
|
}
|
|
|
|
memcpy(dev->sector_buffer[dev->sector_pos++], dev->data, 512);
|
|
dev->data_pos = 0;
|
|
}
|
|
|
|
dev->status = STATUS_CMD_IN_PROGRESS;
|
|
dev->cmd_state = 2;
|
|
esdi_mca_set_callback(dev, ESDI_TIME);
|
|
break;
|
|
|
|
case 2:
|
|
dev->status = STATUS_IRQ;
|
|
dev->irq_status = IRQ_HOST_ADAPTER | IRQ_CMD_COMPLETE_SUCCESS;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
|
|
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
break;
|
|
|
|
case 0x11:
|
|
ESDI_ADAPTER_ONLY();
|
|
switch (dev->cmd_state) {
|
|
case 0:
|
|
dev->sector_pos = 0;
|
|
dev->sector_count = dev->cmd_data[1];
|
|
if (dev->sector_count > 256)
|
|
fatal("Read sector buffer count %04x\n", dev->cmd_data[1]);
|
|
|
|
dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ;
|
|
dev->irq_status = IRQ_HOST_ADAPTER | IRQ_DATA_TRANSFER_READY;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
|
|
dev->cmd_state = 1;
|
|
esdi_mca_set_callback(dev, ESDI_TIME);
|
|
dev->data_pos = 0;
|
|
break;
|
|
|
|
case 1:
|
|
if (!(dev->basic_ctrl & CTRL_DMA_ENA)) {
|
|
esdi_mca_set_callback(dev, ESDI_TIME);
|
|
return;
|
|
}
|
|
|
|
while (dev->sector_pos < dev->sector_count) {
|
|
if (!dev->data_pos)
|
|
memcpy(dev->data, dev->sector_buffer[dev->sector_pos++], 512);
|
|
while (dev->data_pos < 256) {
|
|
val = dma_channel_write(dev->dma, dev->data[dev->data_pos]);
|
|
|
|
if (val == DMA_NODATA) {
|
|
esdi_mca_set_callback(dev, ESDI_TIME);
|
|
return;
|
|
}
|
|
|
|
dev->data_pos++;
|
|
}
|
|
|
|
dev->data_pos = 0;
|
|
}
|
|
|
|
dev->status = STATUS_CMD_IN_PROGRESS;
|
|
dev->cmd_state = 2;
|
|
esdi_mca_set_callback(dev, ESDI_TIME);
|
|
break;
|
|
|
|
case 2:
|
|
dev->status = STATUS_IRQ;
|
|
dev->irq_status = IRQ_HOST_ADAPTER | IRQ_CMD_COMPLETE_SUCCESS;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
break;
|
|
|
|
case 0x12:
|
|
ESDI_ADAPTER_ONLY();
|
|
if ((dev->status & STATUS_IRQ) || dev->irq_in_progress)
|
|
fatal("IRQ in progress %02x %i\n", dev->status, dev->irq_in_progress);
|
|
|
|
dev->status_len = 2;
|
|
dev->status_data[0] = 0x12 | STATUS_LEN(5) | STATUS_DEVICE_HOST_ADAPTER;
|
|
dev->status_data[1] = 0;
|
|
|
|
dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
|
|
dev->irq_status = IRQ_HOST_ADAPTER | IRQ_CMD_COMPLETE_SUCCESS;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
|
|
break;
|
|
|
|
case CMD_FORMAT_UNIT:
|
|
case CMD_FORMAT_PREPARE:
|
|
ESDI_DRIVE_ONLY();
|
|
|
|
if (!drive->present) {
|
|
device_not_present(dev);
|
|
return;
|
|
}
|
|
|
|
switch (dev->cmd_state) {
|
|
case 0:
|
|
dev->rba = hdd_image_get_last_sector(drive->hdd_num);
|
|
|
|
if (dev->command == CMD_FORMAT_UNIT)
|
|
dev->sector_count = dev->cmd_data[1];
|
|
else
|
|
dev->sector_count = 0;
|
|
|
|
dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ;
|
|
dev->irq_status = dev->cmd_dev | IRQ_DATA_TRANSFER_READY;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
|
|
dev->cmd_state = 1;
|
|
esdi_mca_set_callback(dev, ESDI_TIME);
|
|
break;
|
|
|
|
case 1:
|
|
if (!(dev->basic_ctrl & CTRL_DMA_ENA)) {
|
|
esdi_mca_set_callback(dev, ESDI_TIME);
|
|
return;
|
|
}
|
|
|
|
if (dev->command == CMD_FORMAT_UNIT)
|
|
hdd_image_zero(drive->hdd_num, 0, hdd_image_get_last_sector(drive->hdd_num) + 1);
|
|
|
|
dev->status = STATUS_CMD_IN_PROGRESS;
|
|
dev->cmd_state = 2;
|
|
esdi_mca_set_callback(dev, ESDI_TIME);
|
|
break;
|
|
|
|
case 2:
|
|
complete_command_status(dev);
|
|
dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
|
|
dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS;
|
|
dev->irq_in_progress = 1;
|
|
set_irq(dev);
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
fatal("BAD COMMAND %02x %i\n", dev->command, dev->cmd_dev);
|
|
}
|
|
}
|
|
|
|
static uint8_t
|
|
esdi_read(uint16_t port, void *priv)
|
|
{
|
|
esdi_t *dev = (esdi_t *) priv;
|
|
uint8_t ret = 0x00;
|
|
|
|
switch (port & 7) {
|
|
case 2: /*Basic status register*/
|
|
ret = dev->status;
|
|
break;
|
|
|
|
case 3: /*IRQ status*/
|
|
dev->status &= ~STATUS_IRQ;
|
|
ret = dev->irq_status;
|
|
break;
|
|
|
|
default:
|
|
esdi_mca_log("esdi_read port=%04x\n", port);
|
|
break;
|
|
}
|
|
|
|
esdi_mca_log("ESDI: rr(%04x, %02x)\n", port & 7, ret);
|
|
return ret;
|
|
}
|
|
|
|
static void
|
|
esdi_write(uint16_t port, uint8_t val, void *priv)
|
|
{
|
|
esdi_t *dev = (esdi_t *) priv;
|
|
uint8_t old;
|
|
|
|
esdi_mca_log("ESDI: wr(%04x, %02x)\n", port & 7, val);
|
|
|
|
switch (port & 7) {
|
|
case 2: /*Basic control register*/
|
|
if ((dev->basic_ctrl & CTRL_RESET) && !(val & CTRL_RESET)) {
|
|
dev->in_reset = 1;
|
|
esdi_mca_set_callback(dev, ESDI_TIME * 50);
|
|
dev->status = STATUS_BUSY;
|
|
} else if (!(dev->basic_ctrl & CTRL_RESET) && (val & CTRL_RESET)) {
|
|
esdi_mca_set_callback(dev, 0.0);
|
|
dev->status = STATUS_BUSY;
|
|
}
|
|
old = dev->basic_ctrl;
|
|
dev->basic_ctrl = val;
|
|
if ((val & CTRL_IRQ_ENA) && !(old & CTRL_IRQ_ENA))
|
|
update_irq(dev);
|
|
break;
|
|
|
|
case 3: /*Attention register*/
|
|
switch (val & ATTN_DEVICE_SEL) {
|
|
case ATTN_HOST_ADAPTER:
|
|
switch (val & ATTN_REQ_MASK) {
|
|
case ATTN_CMD_REQ:
|
|
if (dev->cmd_req_in_progress)
|
|
fatal("Try to start command on in_progress adapter\n");
|
|
dev->cmd_req_in_progress = 1;
|
|
dev->cmd_dev = ATTN_HOST_ADAPTER;
|
|
dev->status |= STATUS_BUSY;
|
|
dev->cmd_pos = 0;
|
|
dev->status_pos = 0;
|
|
break;
|
|
|
|
case ATTN_EOI:
|
|
dev->irq_in_progress = 0;
|
|
dev->status &= ~STATUS_IRQ;
|
|
clear_irq(dev);
|
|
break;
|
|
|
|
case ATTN_RESET:
|
|
dev->in_reset = 1;
|
|
esdi_mca_set_callback(dev, ESDI_TIME * 50);
|
|
dev->status = STATUS_BUSY;
|
|
break;
|
|
|
|
default:
|
|
fatal("Bad attention request %02x\n", val);
|
|
}
|
|
break;
|
|
|
|
case ATTN_DEVICE_0:
|
|
esdi_mca_log("ATTN Device 0.\n");
|
|
switch (val & ATTN_REQ_MASK) {
|
|
case ATTN_CMD_REQ:
|
|
if (dev->cmd_req_in_progress)
|
|
fatal("Try to start command on in_progress device0\n");
|
|
dev->cmd_req_in_progress = 1;
|
|
dev->cmd_dev = ATTN_DEVICE_0;
|
|
dev->status |= STATUS_BUSY;
|
|
dev->cmd_pos = 0;
|
|
dev->status_pos = 0;
|
|
break;
|
|
|
|
case ATTN_EOI:
|
|
esdi_mca_log("EOI.\n");
|
|
dev->irq_in_progress = 0;
|
|
dev->status &= ~STATUS_IRQ;
|
|
clear_irq(dev);
|
|
break;
|
|
|
|
default:
|
|
fatal("Bad attention request %02x\n", val);
|
|
}
|
|
break;
|
|
|
|
case ATTN_DEVICE_1:
|
|
switch (val & ATTN_REQ_MASK) {
|
|
case ATTN_CMD_REQ:
|
|
if (dev->cmd_req_in_progress)
|
|
fatal("Try to start command on in_progress device0\n");
|
|
dev->cmd_req_in_progress = 1;
|
|
dev->cmd_dev = ATTN_DEVICE_1;
|
|
dev->status |= STATUS_BUSY;
|
|
dev->cmd_pos = 0;
|
|
dev->status_pos = 0;
|
|
break;
|
|
|
|
case ATTN_EOI:
|
|
dev->irq_in_progress = 0;
|
|
dev->status &= ~STATUS_IRQ;
|
|
clear_irq(dev);
|
|
break;
|
|
|
|
default:
|
|
fatal("Bad attention request %02x\n", val);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
fatal("Attention to unknown device %02x\n", val);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
fatal("esdi_write port=%04x val=%02x\n", port, val);
|
|
}
|
|
}
|
|
|
|
static uint16_t
|
|
esdi_readw(uint16_t port, void *priv)
|
|
{
|
|
esdi_t *dev = (esdi_t *) priv;
|
|
uint16_t ret = 0xffff;
|
|
|
|
switch (port & 7) {
|
|
case 0: /*Status Interface Register*/
|
|
if (dev->status_pos >= dev->status_len) {
|
|
esdi_mca_log("esdi_readw port=%04x, ret=0000 (pos=%d, len=%d).\n", port, dev->status_pos, dev->status_len);
|
|
return 0;
|
|
}
|
|
ret = dev->status_data[dev->status_pos++];
|
|
if (dev->status_pos >= dev->status_len) {
|
|
dev->status &= ~STATUS_STATUS_OUT_FULL;
|
|
dev->status_pos = dev->status_len = 0;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
fatal("esdi_readw port=%04x\n", port);
|
|
}
|
|
|
|
esdi_mca_log("esdi_readw port=%04x, ret=%04x.\n", port, ret);
|
|
return ret;
|
|
}
|
|
|
|
static void
|
|
esdi_writew(uint16_t port, uint16_t val, void *priv)
|
|
{
|
|
esdi_t *dev = (esdi_t *) priv;
|
|
|
|
esdi_mca_log("ESDI: wrw(%04x, %04x)\n", port & 7, val);
|
|
|
|
switch (port & 7) {
|
|
case 0: /*Command Interface Register*/
|
|
if (dev->cmd_pos >= 4)
|
|
fatal("CIR pos 4\n");
|
|
dev->cmd_data[dev->cmd_pos++] = val;
|
|
if (((dev->cmd_data[0] & CMD_SIZE_4) && dev->cmd_pos == 4) || (!(dev->cmd_data[0] & CMD_SIZE_4) && dev->cmd_pos == 2)) {
|
|
dev->cmd_pos = 0;
|
|
dev->cmd_req_in_progress = 0;
|
|
dev->cmd_state = 0;
|
|
|
|
if ((dev->cmd_data[0] & CMD_DEVICE_SEL) != dev->cmd_dev)
|
|
fatal("Command device mismatch with attn\n");
|
|
dev->command = dev->cmd_data[0] & CMD_MASK;
|
|
esdi_mca_set_callback(dev, ESDI_TIME);
|
|
dev->status = STATUS_BUSY;
|
|
dev->data_pos = 0;
|
|
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
fatal("esdi_writew port=%04x val=%04x\n", port, val);
|
|
}
|
|
}
|
|
|
|
static uint8_t
|
|
esdi_mca_read(int port, void *priv)
|
|
{
|
|
const esdi_t *dev = (esdi_t *) priv;
|
|
|
|
esdi_mca_log("ESDI: mcard(%04x)\n", port);
|
|
|
|
return (dev->pos_regs[port & 7]);
|
|
}
|
|
|
|
static void
|
|
esdi_mca_write(int port, uint8_t val, void *priv)
|
|
{
|
|
esdi_t *dev = (esdi_t *) priv;
|
|
|
|
esdi_mca_log("ESDI: mcawr(%04x, %02x) pos[2]=%02x pos[3]=%02x\n",
|
|
port, val, dev->pos_regs[2], dev->pos_regs[3]);
|
|
|
|
if (port < 0x102)
|
|
return;
|
|
|
|
/* Save the new value. */
|
|
dev->pos_regs[port & 7] = val;
|
|
|
|
io_removehandler(ESDI_IOADDR_PRI, 8,
|
|
esdi_read, esdi_readw, NULL,
|
|
esdi_write, esdi_writew, NULL, dev);
|
|
mem_mapping_disable(&dev->bios_rom.mapping);
|
|
|
|
switch (dev->pos_regs[2] & 0x3c) {
|
|
case 0x14:
|
|
dev->dma = 5;
|
|
break;
|
|
case 0x18:
|
|
dev->dma = 6;
|
|
break;
|
|
case 0x1c:
|
|
dev->dma = 7;
|
|
break;
|
|
case 0x00:
|
|
dev->dma = 0;
|
|
break;
|
|
case 0x04:
|
|
dev->dma = 1;
|
|
break;
|
|
case 0x0c:
|
|
dev->dma = 3;
|
|
break;
|
|
case 0x10:
|
|
dev->dma = 4;
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
if (!(dev->pos_regs[3] & 8)) {
|
|
switch (dev->pos_regs[3] & 7) {
|
|
case 2:
|
|
dev->bios = 0xc8000;
|
|
break;
|
|
case 3:
|
|
dev->bios = 0xcc000;
|
|
break;
|
|
case 4:
|
|
dev->bios = 0xd0000;
|
|
break;
|
|
case 5:
|
|
dev->bios = 0xd4000;
|
|
break;
|
|
case 6:
|
|
dev->bios = 0xd8000;
|
|
break;
|
|
case 7:
|
|
dev->bios = 0xdc000;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
} else
|
|
dev->bios = 0;
|
|
|
|
if (dev->pos_regs[2] & 1) {
|
|
io_sethandler(ESDI_IOADDR_PRI, 8,
|
|
esdi_read, esdi_readw, NULL,
|
|
esdi_write, esdi_writew, NULL, dev);
|
|
|
|
if (dev->bios) {
|
|
mem_mapping_enable(&dev->bios_rom.mapping);
|
|
mem_mapping_set_addr(&dev->bios_rom.mapping, dev->bios, 0x4000);
|
|
}
|
|
|
|
/* Say hello. */
|
|
esdi_mca_log("ESDI: I/O=3510, IRQ=14, DMA=%d, BIOS @%05X\n",
|
|
dev->dma, dev->bios);
|
|
}
|
|
}
|
|
|
|
static void
|
|
esdi_integrated_mca_write(int port, uint8_t val, void* priv)
|
|
{
|
|
esdi_t* dev = (esdi_t*)priv;
|
|
|
|
esdi_mca_log("ESDI: mcawr(%04x, %02x) pos[2]=%02x pos[3]=%02x\n",
|
|
port, val, dev->pos_regs[2], dev->pos_regs[3]);
|
|
|
|
if (port < 0x102)
|
|
return;
|
|
|
|
/* Save the new value. */
|
|
dev->pos_regs[port & 7] = val;
|
|
|
|
io_removehandler(ESDI_IOADDR_PRI, 8,
|
|
esdi_read, esdi_readw, NULL,
|
|
esdi_write, esdi_writew, NULL, dev);
|
|
|
|
switch (dev->pos_regs[2] & 0x3c) {
|
|
case 0x14:
|
|
dev->dma = 5;
|
|
break;
|
|
case 0x18:
|
|
dev->dma = 6;
|
|
break;
|
|
case 0x1c:
|
|
dev->dma = 7;
|
|
break;
|
|
case 0x00:
|
|
dev->dma = 0;
|
|
break;
|
|
case 0x04:
|
|
dev->dma = 1;
|
|
break;
|
|
case 0x0c:
|
|
dev->dma = 3;
|
|
break;
|
|
case 0x10:
|
|
dev->dma = 4;
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
if (dev->pos_regs[2] & 1) {
|
|
io_sethandler(ESDI_IOADDR_PRI, 8,
|
|
esdi_read, esdi_readw, NULL,
|
|
esdi_write, esdi_writew, NULL, dev);
|
|
|
|
/* Say hello. */
|
|
esdi_mca_log("ESDI: I/O=3510, IRQ=14, DMA=%d\n",
|
|
dev->dma);
|
|
}
|
|
}
|
|
|
|
static uint8_t
|
|
esdi_mca_feedb(void *priv)
|
|
{
|
|
const esdi_t *dev = (esdi_t *) priv;
|
|
|
|
return (dev->pos_regs[2] & 1);
|
|
}
|
|
|
|
static void esdi_reset(void* priv)
|
|
{
|
|
esdi_t* dev = (esdi_t*)priv;
|
|
if (!dev->in_reset) {
|
|
dev->in_reset = 1;
|
|
esdi_mca_set_callback(dev, ESDI_TIME * 50);
|
|
dev->status = STATUS_BUSY;
|
|
}
|
|
}
|
|
|
|
static void *
|
|
esdi_init(UNUSED(const device_t *info))
|
|
{
|
|
drive_t *drive;
|
|
esdi_t *dev;
|
|
uint8_t c;
|
|
uint8_t i;
|
|
|
|
dev = calloc(1, sizeof(esdi_t));
|
|
if (dev == NULL)
|
|
return (NULL);
|
|
|
|
/* Mark as unconfigured. */
|
|
dev->irq_status = 0xff;
|
|
|
|
if (info->local == ESDI_IS_ADAPTER) {
|
|
rom_init_interleaved(&dev->bios_rom,
|
|
BIOS_FILE_H, BIOS_FILE_L,
|
|
0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL);
|
|
mem_mapping_disable(&dev->bios_rom.mapping);
|
|
}
|
|
|
|
dev->drives[0].present = dev->drives[1].present = 0;
|
|
|
|
for (c = 0, i = 0; i < HDD_NUM; i++) {
|
|
if ((hdd[i].bus_type == HDD_BUS_ESDI) && (hdd[i].esdi_channel < ESDI_NUM)) {
|
|
/* This is an ESDI drive. */
|
|
drive = &dev->drives[hdd[i].esdi_channel];
|
|
|
|
/* Try to load an image for the drive. */
|
|
if (!hdd_image_load(i)) {
|
|
/* Nope. */
|
|
drive->present = 0;
|
|
continue;
|
|
}
|
|
|
|
hdd_preset_apply(i);
|
|
|
|
/* OK, so fill in geometry info. */
|
|
drive->spt = hdd[i].spt;
|
|
drive->hpc = hdd[i].hpc;
|
|
drive->tracks = hdd[i].tracks;
|
|
drive->sectors = hdd_image_get_last_sector(i);
|
|
drive->hdd_num = i;
|
|
|
|
/* Mark drive as present. */
|
|
drive->present = 1;
|
|
}
|
|
|
|
if (++c >= ESDI_NUM)
|
|
break;
|
|
}
|
|
|
|
/* Set the MCA ID for this controller. */
|
|
if (info->local == ESDI_IS_ADAPTER) {
|
|
dev->pos_regs[0] = 0xff;
|
|
dev->pos_regs[1] = 0xdd;
|
|
} else if (info->local == ESDI_IS_INTEGRATED) {
|
|
dev->pos_regs[0] = 0x9f;
|
|
dev->pos_regs[1] = 0xdf;
|
|
}
|
|
|
|
/* Enable the device. */
|
|
if (info->local == ESDI_IS_INTEGRATED) {
|
|
/* The slot number of this controller is fixed by the planar. IBM PS/55 5551-T assigns it #5. */
|
|
int slotno = device_get_config_int("in_esdi_slot");
|
|
if (slotno)
|
|
mca_add_to_slot(esdi_mca_read, esdi_integrated_mca_write, esdi_mca_feedb, esdi_reset, dev, slotno - 1);
|
|
else
|
|
mca_add(esdi_mca_read, esdi_integrated_mca_write, esdi_mca_feedb, esdi_reset, dev);
|
|
} else
|
|
mca_add(esdi_mca_read, esdi_mca_write, esdi_mca_feedb, NULL, dev);
|
|
|
|
/* Mark for a reset. */
|
|
dev->in_reset = 1;
|
|
esdi_mca_set_callback(dev, ESDI_TIME * 50);
|
|
dev->status = STATUS_BUSY;
|
|
|
|
/* Set the reply timer. */
|
|
timer_add(&dev->timer, esdi_callback, dev, 0);
|
|
|
|
return dev;
|
|
}
|
|
|
|
static void
|
|
esdi_close(void *priv)
|
|
{
|
|
esdi_t *dev = (esdi_t *) priv;
|
|
const drive_t *drive;
|
|
|
|
dev->drives[0].present = dev->drives[1].present = 0;
|
|
|
|
for (uint8_t d = 0; d < 2; d++) {
|
|
drive = &dev->drives[d];
|
|
|
|
hdd_image_close(drive->hdd_num);
|
|
}
|
|
|
|
free(dev);
|
|
}
|
|
|
|
static int
|
|
esdi_available(void)
|
|
{
|
|
return (rom_present(BIOS_FILE_L) && rom_present(BIOS_FILE_H));
|
|
}
|
|
|
|
const device_t esdi_ps2_device = {
|
|
.name = "IBM PS/2 ESDI Fixed Disk Adapter (MCA)",
|
|
.internal_name = "esdi_mca",
|
|
.flags = DEVICE_MCA,
|
|
.local = ESDI_IS_ADAPTER,
|
|
.init = esdi_init,
|
|
.close = esdi_close,
|
|
.reset = NULL,
|
|
.available = esdi_available,
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
static device_config_t
|
|
esdi_integrated_config[] = {
|
|
{
|
|
.name = "in_esdi_slot",
|
|
.description = "Slot #",
|
|
.type = CONFIG_SELECTION,
|
|
.selection = {
|
|
{ .description = "Auto", .value = 0 },
|
|
{ .description = "1", .value = 1 },
|
|
{ .description = "2", .value = 2 },
|
|
{ .description = "3", .value = 3 },
|
|
{ .description = "4", .value = 4 },
|
|
{ .description = "5", .value = 5 },
|
|
{ .description = "6", .value = 6 },
|
|
{ .description = "7", .value = 7 },
|
|
{ .description = "8", .value = 8 }
|
|
},
|
|
.default_int = 0
|
|
},
|
|
{ .type = -1 }
|
|
};
|
|
|
|
/*
|
|
Device for an IBM DBA (Direct Bus Attachment) hard disk.
|
|
The Disk BIOS is included in the System ROM.
|
|
Some models have an exclusive channel slot for the DBA hard disk.
|
|
Following IBM machines are supported:
|
|
* PS/2 model 55SX
|
|
* PS/2 model 65SX
|
|
* PS/2 model 70 type 3 (Slot #4)
|
|
* PS/2 model 70 type 4 (Slot #4)
|
|
* PS/55 model 5550-T (Slot #5)
|
|
* PS/55 model 5550-V (Slot #5)
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*/
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const device_t
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esdi_integrated_device = {
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.name = "IBM Integrated Fixed Disk and Controller (MCA)",
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.internal_name = "esdi_integrated_mca",
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.flags = DEVICE_MCA,
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.local = ESDI_IS_INTEGRATED,
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.init = esdi_init,
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.close = esdi_close,
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.reset = esdi_reset,
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.available = NULL,
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.speed_changed = NULL,
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.force_redraw = NULL,
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.config = esdi_integrated_config
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};
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